From db71887817e665c5c226e8775ad2d5814babac6e Mon Sep 17 00:00:00 2001 From: xoviat Date: Sat, 26 Aug 2023 20:37:01 -0500 Subject: tests/stm32: add stop and cleanpu --- tests/stm32/src/bin/stop.rs | 53 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 tests/stm32/src/bin/stop.rs (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/stop.rs b/tests/stm32/src/bin/stop.rs new file mode 100644 index 000000000..4a49bde9d --- /dev/null +++ b/tests/stm32/src/bin/stop.rs @@ -0,0 +1,53 @@ +// required-features: stop,chrono + +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] +#[path = "../common.rs"] +mod common; + +use chrono::NaiveDate; +use common::*; +use cortex_m_rt::entry; +use embassy_executor::Spawner; +use embassy_stm32::low_power::{stop_with_rtc, Executor}; +use embassy_stm32::rtc::{Rtc, RtcClockSource, RtcConfig}; +use embassy_time::{Duration, Timer}; +use static_cell::make_static; + +#[entry] +fn main() -> ! { + let executor = Executor::take(); + executor.run(|spawner| { + unwrap!(spawner.spawn(async_main(spawner))); + }); +} + +#[embassy_executor::task] +async fn async_main(_spawner: Spawner) { + let mut config = config(); + + config.rcc.rtc = Some(RtcClockSource::LSI); + + let p = embassy_stm32::init(config); + info!("Hello World!"); + + let now = NaiveDate::from_ymd_opt(2020, 5, 15) + .unwrap() + .and_hms_opt(10, 30, 15) + .unwrap(); + + let mut rtc = Rtc::new(p.RTC, RtcConfig::default()); + + rtc.set_datetime(now.into()).expect("datetime not set"); + + let rtc = make_static!(rtc); + + stop_with_rtc(rtc); + + info!("Waiting 5 seconds"); + Timer::after(Duration::from_secs(5)).await; + + info!("Test OK"); + cortex_m::asm::bkpt(); +} -- cgit From fb942e6675097540b6ca3f5fa37e0696337c2fc0 Mon Sep 17 00:00:00 2001 From: xoviat Date: Sun, 27 Aug 2023 09:25:14 -0500 Subject: stm32: re-export rtcclocksource --- tests/stm32/src/bin/rtc.rs | 3 ++- tests/stm32/src/bin/stop.rs | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/rtc.rs b/tests/stm32/src/bin/rtc.rs index 7df415b44..1a64dd387 100644 --- a/tests/stm32/src/bin/rtc.rs +++ b/tests/stm32/src/bin/rtc.rs @@ -10,7 +10,8 @@ use chrono::{NaiveDate, NaiveDateTime}; use common::*; use defmt::assert; use embassy_executor::Spawner; -use embassy_stm32::rtc::{Rtc, RtcClockSource, RtcConfig}; +use embassy_stm32::rcc::RtcClockSource; +use embassy_stm32::rtc::{Rtc, RtcConfig}; use embassy_time::{Duration, Timer}; #[embassy_executor::main] diff --git a/tests/stm32/src/bin/stop.rs b/tests/stm32/src/bin/stop.rs index 4a49bde9d..0b3f4a300 100644 --- a/tests/stm32/src/bin/stop.rs +++ b/tests/stm32/src/bin/stop.rs @@ -11,7 +11,8 @@ use common::*; use cortex_m_rt::entry; use embassy_executor::Spawner; use embassy_stm32::low_power::{stop_with_rtc, Executor}; -use embassy_stm32::rtc::{Rtc, RtcClockSource, RtcConfig}; +use embassy_stm32::rcc::RtcClockSource; +use embassy_stm32::rtc::{Rtc, RtcConfig}; use embassy_time::{Duration, Timer}; use static_cell::make_static; -- cgit From e981cd496827c01cba11fd6ba40b2b7ed482e49b Mon Sep 17 00:00:00 2001 From: xoviat Date: Sun, 27 Aug 2023 21:15:57 -0500 Subject: stm32: fix rtc wakeup timing and add dbg --- tests/stm32/src/bin/stop.rs | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/stop.rs b/tests/stm32/src/bin/stop.rs index 0b3f4a300..a490d7b8c 100644 --- a/tests/stm32/src/bin/stop.rs +++ b/tests/stm32/src/bin/stop.rs @@ -46,8 +46,10 @@ async fn async_main(_spawner: Spawner) { stop_with_rtc(rtc); - info!("Waiting 5 seconds"); - Timer::after(Duration::from_secs(5)).await; + info!("Waiting..."); + Timer::after(Duration::from_secs(2)).await; + info!("Waiting..."); + Timer::after(Duration::from_secs(3)).await; info!("Test OK"); cortex_m::asm::bkpt(); -- cgit From 0dcb34fc7d6134ff8d8c4795209d2feb217920dc Mon Sep 17 00:00:00 2001 From: xoviat Date: Sun, 17 Sep 2023 19:03:45 -0500 Subject: ci: fix tests --- tests/stm32/src/bin/rtc.rs | 4 +++- tests/stm32/src/bin/stop.rs | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/rtc.rs b/tests/stm32/src/bin/rtc.rs index 1a64dd387..22be6fac5 100644 --- a/tests/stm32/src/bin/rtc.rs +++ b/tests/stm32/src/bin/rtc.rs @@ -12,13 +12,15 @@ use defmt::assert; use embassy_executor::Spawner; use embassy_stm32::rcc::RtcClockSource; use embassy_stm32::rtc::{Rtc, RtcConfig}; +use embassy_stm32::time::Hertz; use embassy_time::{Duration, Timer}; #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = config(); - config.rcc.rtc = Some(RtcClockSource::LSI); + config.rcc.lse = Some(Hertz(32_768)); + config.rcc.rtc = Some(RtcClockSource::LSE); let p = embassy_stm32::init(config); info!("Hello World!"); diff --git a/tests/stm32/src/bin/stop.rs b/tests/stm32/src/bin/stop.rs index a490d7b8c..f60ab271a 100644 --- a/tests/stm32/src/bin/stop.rs +++ b/tests/stm32/src/bin/stop.rs @@ -13,6 +13,7 @@ use embassy_executor::Spawner; use embassy_stm32::low_power::{stop_with_rtc, Executor}; use embassy_stm32::rcc::RtcClockSource; use embassy_stm32::rtc::{Rtc, RtcConfig}; +use embassy_stm32::time::Hertz; use embassy_time::{Duration, Timer}; use static_cell::make_static; @@ -28,7 +29,8 @@ fn main() -> ! { async fn async_main(_spawner: Spawner) { let mut config = config(); - config.rcc.rtc = Some(RtcClockSource::LSI); + config.rcc.lse = Some(Hertz(32_768)); + config.rcc.rtc = Some(RtcClockSource::LSE); let p = embassy_stm32::init(config); info!("Hello World!"); -- cgit From 83b4c0127337c55c6a445abee6ab5eac4c993f9c Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 19 Sep 2023 04:22:57 +0200 Subject: stm32/rcc: unify h5 and h7. --- tests/stm32/src/common.rs | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index ca5cb43ac..3a1b5c3ec 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -31,9 +31,32 @@ pub fn config() -> Config { #[cfg(feature = "stm32h755zi")] { - config.rcc.sys_ck = Some(Hertz(400_000_000)); - config.rcc.pll1.q_ck = Some(Hertz(100_000_000)); - config.rcc.adc_clock_source = embassy_stm32::rcc::AdcClockSource::PerCk; + use embassy_stm32::rcc::*; + config.rcc.hsi = Some(Hsi::Mhz64); + config.rcc.csi = true; + config.rcc.pll_src = PllSource::Hsi; + config.rcc.pll1 = Some(Pll { + prediv: 4, + mul: 50, + divp: Some(2), + divq: Some(8), // SPI1 cksel defaults to pll1_q + divr: None, + }); + config.rcc.pll2 = Some(Pll { + prediv: 4, + mul: 50, + divp: Some(8), // 100mhz + divq: None, + divr: None, + }); + config.rcc.sys = Sysclk::Pll1P; // 400 Mhz + config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz + config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.voltage_scale = VoltageScale::Scale1; + config.rcc.adc_clock_source = AdcClockSource::PLL2_P; } #[cfg(feature = "stm32u585ai")] -- cgit From 7cf327130e97f2569e1be73054a778ba5bf39d5b Mon Sep 17 00:00:00 2001 From: xoviat Date: Thu, 21 Sep 2023 19:32:48 -0500 Subject: stm32/low-power: create one critical-section for all time ops --- tests/stm32/src/bin/stop.rs | 33 +++++++++++++++++++++++---------- 1 file changed, 23 insertions(+), 10 deletions(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/stop.rs b/tests/stm32/src/bin/stop.rs index f60ab271a..48d59b794 100644 --- a/tests/stm32/src/bin/stop.rs +++ b/tests/stm32/src/bin/stop.rs @@ -19,14 +19,32 @@ use static_cell::make_static; #[entry] fn main() -> ! { - let executor = Executor::take(); - executor.run(|spawner| { + Executor::take().run(|spawner| { unwrap!(spawner.spawn(async_main(spawner))); }); } #[embassy_executor::task] -async fn async_main(_spawner: Spawner) { +async fn task_1() { + for _ in 0..9 { + info!("task 1: waiting for 500ms..."); + Timer::after(Duration::from_millis(500)).await; + } +} + +#[embassy_executor::task] +async fn task_2() { + for _ in 0..5 { + info!("task 2: waiting for 1000ms..."); + Timer::after(Duration::from_millis(1000)).await; + } + + info!("Test OK"); + cortex_m::asm::bkpt(); +} + +#[embassy_executor::task] +async fn async_main(spawner: Spawner) { let mut config = config(); config.rcc.lse = Some(Hertz(32_768)); @@ -48,11 +66,6 @@ async fn async_main(_spawner: Spawner) { stop_with_rtc(rtc); - info!("Waiting..."); - Timer::after(Duration::from_secs(2)).await; - info!("Waiting..."); - Timer::after(Duration::from_secs(3)).await; - - info!("Test OK"); - cortex_m::asm::bkpt(); + spawner.spawn(task_1()).unwrap(); + spawner.spawn(task_2()).unwrap(); } -- cgit From 4b695120fce8bb434bf8f20eb964358e37417765 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 25 Sep 2023 22:34:18 +0200 Subject: tests/stm32: centralize pin configuration. --- tests/stm32/src/bin/gpio.rs | 20 +---- tests/stm32/src/bin/spi.rs | 22 +----- tests/stm32/src/bin/spi_dma.rs | 24 ++---- tests/stm32/src/bin/usart.rs | 55 ++------------ tests/stm32/src/bin/usart_dma.rs | 51 ++----------- tests/stm32/src/bin/usart_rx_ringbuffered.rs | 105 +++------------------------ tests/stm32/src/common.rs | 85 ++++++++++++++++++++++ 7 files changed, 119 insertions(+), 243 deletions(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/gpio.rs b/tests/stm32/src/bin/gpio.rs index aad174431..49d9a60f7 100644 --- a/tests/stm32/src/bin/gpio.rs +++ b/tests/stm32/src/bin/gpio.rs @@ -16,24 +16,8 @@ async fn main(_spawner: Spawner) { // Arduino pins D0 and D1 // They're connected together with a 1K resistor. - #[cfg(feature = "stm32f103c8")] - let (mut a, mut b) = (p.PA9, p.PA10); - #[cfg(feature = "stm32g491re")] - let (mut a, mut b) = (p.PC4, p.PC5); - #[cfg(feature = "stm32g071rb")] - let (mut a, mut b) = (p.PC4, p.PC5); - #[cfg(feature = "stm32f429zi")] - let (mut a, mut b) = (p.PG14, p.PG9); - #[cfg(feature = "stm32wb55rg")] - let (mut a, mut b) = (p.PA3, p.PA2); - #[cfg(feature = "stm32h755zi")] - let (mut a, mut b) = (p.PB6, p.PB7); - #[cfg(feature = "stm32u585ai")] - let (mut a, mut b) = (p.PD9, p.PD8); - #[cfg(feature = "stm32h563zi")] - let (mut a, mut b) = (p.PB6, p.PB7); - #[cfg(feature = "stm32c031c6")] - let (mut a, mut b) = (p.PB6, p.PB7); + let mut a = peri!(p, UART_RX); + let mut b = peri!(p, UART_TX); // Test initial output { diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs index e51dd5bf2..b0fb75d69 100644 --- a/tests/stm32/src/bin/spi.rs +++ b/tests/stm32/src/bin/spi.rs @@ -16,24 +16,10 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(config()); info!("Hello World!"); - #[cfg(feature = "stm32f103c8")] - let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6); - #[cfg(feature = "stm32f429zi")] - let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6); - #[cfg(feature = "stm32h755zi")] - let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PB5, p.PA6); - #[cfg(feature = "stm32g491re")] - let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6); - #[cfg(feature = "stm32g071rb")] - let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6); - #[cfg(feature = "stm32wb55rg")] - let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6); - #[cfg(feature = "stm32u585ai")] - let (spi, sck, mosi, miso) = (p.SPI1, p.PE13, p.PE15, p.PE14); - #[cfg(feature = "stm32h563zi")] - let (spi, sck, mosi, miso) = (p.SPI4, p.PE12, p.PE14, p.PE13); - #[cfg(feature = "stm32c031c6")] - let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6); + let spi = peri!(p, SPI); + let sck = peri!(p, SPI_SCK); + let mosi = peri!(p, SPI_MOSI); + let miso = peri!(p, SPI_MISO); let mut spi_config = spi::Config::default(); spi_config.frequency = Hertz(1_000_000); diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs index d45cbe45b..212cfae5d 100644 --- a/tests/stm32/src/bin/spi_dma.rs +++ b/tests/stm32/src/bin/spi_dma.rs @@ -15,24 +15,12 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(config()); info!("Hello World!"); - #[cfg(feature = "stm32f103c8")] - let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH3, p.DMA1_CH2); - #[cfg(feature = "stm32f429zi")] - let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA2_CH3, p.DMA2_CH2); - #[cfg(feature = "stm32h755zi")] - let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PB5, p.PA6, p.DMA1_CH0, p.DMA1_CH1); - #[cfg(feature = "stm32g491re")] - let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2); - #[cfg(feature = "stm32g071rb")] - let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2); - #[cfg(feature = "stm32wb55rg")] - let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2); - #[cfg(feature = "stm32u585ai")] - let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1); - #[cfg(feature = "stm32h563zi")] - let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1); - #[cfg(feature = "stm32c031c6")] - let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2); + let spi = peri!(p, SPI); + let sck = peri!(p, SPI_SCK); + let mosi = peri!(p, SPI_MOSI); + let miso = peri!(p, SPI_MISO); + let tx_dma = peri!(p, SPI_TX_DMA); + let rx_dma = peri!(p, SPI_RX_DMA); let mut spi_config = spi::Config::default(); spi_config.frequency = Hertz(1_000_000); diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs index 394005b82..e789e543d 100644 --- a/tests/stm32/src/bin/usart.rs +++ b/tests/stm32/src/bin/usart.rs @@ -9,35 +9,8 @@ use defmt::assert_eq; use embassy_executor::Spawner; use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Error, Uart}; -use embassy_stm32::{bind_interrupts, peripherals, usart}; use embassy_time::{Duration, Instant}; -#[cfg(any( - feature = "stm32f103c8", - feature = "stm32g491re", - feature = "stm32g071rb", - feature = "stm32h755zi", - feature = "stm32c031c6", -))] -bind_interrupts!(struct Irqs { - USART1 => usart::InterruptHandler; -}); - -#[cfg(feature = "stm32u585ai")] -bind_interrupts!(struct Irqs { - USART3 => usart::InterruptHandler; -}); - -#[cfg(feature = "stm32f429zi")] -bind_interrupts!(struct Irqs { - USART6 => usart::InterruptHandler; -}); - -#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))] -bind_interrupts!(struct Irqs { - LPUART1 => usart::InterruptHandler; -}); - #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_stm32::init(config()); @@ -45,28 +18,14 @@ async fn main(_spawner: Spawner) { // Arduino pins D0 and D1 // They're connected together with a 1K resistor. - #[cfg(feature = "stm32f103c8")] - let (mut tx, mut rx, mut usart) = (p.PA9, p.PA10, p.USART1); - #[cfg(feature = "stm32g491re")] - let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1); - #[cfg(feature = "stm32g071rb")] - let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1); - #[cfg(feature = "stm32f429zi")] - let (mut tx, mut rx, mut usart) = (p.PG14, p.PG9, p.USART6); - #[cfg(feature = "stm32wb55rg")] - let (mut tx, mut rx, mut usart) = (p.PA2, p.PA3, p.LPUART1); - #[cfg(feature = "stm32h755zi")] - let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1); - #[cfg(feature = "stm32u585ai")] - let (mut tx, mut rx, mut usart) = (p.PD8, p.PD9, p.USART3); - #[cfg(feature = "stm32h563zi")] - let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.LPUART1); - #[cfg(feature = "stm32c031c6")] - let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1); + let mut usart = peri!(p, UART); + let mut rx = peri!(p, UART_RX); + let mut tx = peri!(p, UART_TX); + let irq = irqs!(UART); { let config = Config::default(); - let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config); + let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config); // We can't send too many bytes, they have to fit in the FIFO. // This is because we aren't sending+receiving at the same time. @@ -82,7 +41,7 @@ async fn main(_spawner: Spawner) { // Test error handling with with an overflow error { let config = Config::default(); - let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config); + let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config); // Send enough bytes to fill the RX FIFOs off all USART versions. let data = [0xC0, 0xDE, 0x12, 0x23, 0x34]; @@ -116,7 +75,7 @@ async fn main(_spawner: Spawner) { let mut config = Config::default(); config.baudrate = baudrate; - let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config); + let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config); let n = (baudrate as usize / 100).max(64); diff --git a/tests/stm32/src/bin/usart_dma.rs b/tests/stm32/src/bin/usart_dma.rs index c34d9574b..f203ebb56 100644 --- a/tests/stm32/src/bin/usart_dma.rs +++ b/tests/stm32/src/bin/usart_dma.rs @@ -9,33 +9,6 @@ use defmt::assert_eq; use embassy_executor::Spawner; use embassy_futures::join::join; use embassy_stm32::usart::{Config, Uart}; -use embassy_stm32::{bind_interrupts, peripherals, usart}; - -#[cfg(any( - feature = "stm32f103c8", - feature = "stm32g491re", - feature = "stm32g071rb", - feature = "stm32h755zi", - feature = "stm32c031c6", -))] -bind_interrupts!(struct Irqs { - USART1 => usart::InterruptHandler; -}); - -#[cfg(feature = "stm32u585ai")] -bind_interrupts!(struct Irqs { - USART3 => usart::InterruptHandler; -}); - -#[cfg(feature = "stm32f429zi")] -bind_interrupts!(struct Irqs { - USART6 => usart::InterruptHandler; -}); - -#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))] -bind_interrupts!(struct Irqs { - LPUART1 => usart::InterruptHandler; -}); #[embassy_executor::main] async fn main(_spawner: Spawner) { @@ -44,24 +17,12 @@ async fn main(_spawner: Spawner) { // Arduino pins D0 and D1 // They're connected together with a 1K resistor. - #[cfg(feature = "stm32f103c8")] - let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, Irqs, p.DMA1_CH4, p.DMA1_CH5); - #[cfg(feature = "stm32g491re")] - let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2); - #[cfg(feature = "stm32g071rb")] - let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2); - #[cfg(feature = "stm32f429zi")] - let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, Irqs, p.DMA2_CH6, p.DMA2_CH1); - #[cfg(feature = "stm32wb55rg")] - let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, Irqs, p.DMA1_CH1, p.DMA1_CH2); - #[cfg(feature = "stm32h755zi")] - let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH0, p.DMA1_CH1); - #[cfg(feature = "stm32u585ai")] - let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1); - #[cfg(feature = "stm32h563zi")] - let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.LPUART1, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1); - #[cfg(feature = "stm32c031c6")] - let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2); + let usart = peri!(p, UART); + let rx = peri!(p, UART_RX); + let tx = peri!(p, UART_TX); + let rx_dma = peri!(p, UART_RX_DMA); + let tx_dma = peri!(p, UART_TX_DMA); + let irq = irqs!(UART); let config = Config::default(); let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config); diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs index c8dd2643b..fdbeb9f6a 100644 --- a/tests/stm32/src/bin/usart_rx_ringbuffered.rs +++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs @@ -10,87 +10,10 @@ use common::*; use defmt::{assert_eq, panic}; use embassy_executor::Spawner; use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx}; -use embassy_stm32::{bind_interrupts, peripherals, usart}; use embassy_time::{Duration, Timer}; use rand_chacha::ChaCha8Rng; use rand_core::{RngCore, SeedableRng}; -#[cfg(any( - feature = "stm32f103c8", - feature = "stm32g491re", - feature = "stm32g071rb", - feature = "stm32h755zi", - feature = "stm32c031c6", -))] -bind_interrupts!(struct Irqs { - USART1 => usart::InterruptHandler; -}); - -#[cfg(feature = "stm32u585ai")] -bind_interrupts!(struct Irqs { - USART3 => usart::InterruptHandler; -}); - -#[cfg(feature = "stm32f429zi")] -bind_interrupts!(struct Irqs { - USART1 => usart::InterruptHandler; - USART6 => usart::InterruptHandler; -}); - -#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))] -bind_interrupts!(struct Irqs { - LPUART1 => usart::InterruptHandler; -}); - -#[cfg(feature = "stm32f103c8")] -mod board { - pub type Uart = embassy_stm32::peripherals::USART1; - pub type TxDma = embassy_stm32::peripherals::DMA1_CH4; - pub type RxDma = embassy_stm32::peripherals::DMA1_CH5; -} -#[cfg(feature = "stm32g491re")] -mod board { - pub type Uart = embassy_stm32::peripherals::USART1; - pub type TxDma = embassy_stm32::peripherals::DMA1_CH1; - pub type RxDma = embassy_stm32::peripherals::DMA1_CH2; -} -#[cfg(feature = "stm32g071rb")] -mod board { - pub type Uart = embassy_stm32::peripherals::USART1; - pub type TxDma = embassy_stm32::peripherals::DMA1_CH1; - pub type RxDma = embassy_stm32::peripherals::DMA1_CH2; -} -#[cfg(feature = "stm32f429zi")] -mod board { - pub type Uart = embassy_stm32::peripherals::USART6; - pub type TxDma = embassy_stm32::peripherals::DMA2_CH6; - pub type RxDma = embassy_stm32::peripherals::DMA2_CH1; -} -#[cfg(feature = "stm32wb55rg")] -mod board { - pub type Uart = embassy_stm32::peripherals::LPUART1; - pub type TxDma = embassy_stm32::peripherals::DMA1_CH1; - pub type RxDma = embassy_stm32::peripherals::DMA1_CH2; -} -#[cfg(feature = "stm32h755zi")] -mod board { - pub type Uart = embassy_stm32::peripherals::USART1; - pub type TxDma = embassy_stm32::peripherals::DMA1_CH0; - pub type RxDma = embassy_stm32::peripherals::DMA1_CH1; -} -#[cfg(feature = "stm32u585ai")] -mod board { - pub type Uart = embassy_stm32::peripherals::USART3; - pub type TxDma = embassy_stm32::peripherals::GPDMA1_CH0; - pub type RxDma = embassy_stm32::peripherals::GPDMA1_CH1; -} -#[cfg(feature = "stm32c031c6")] -mod board { - pub type Uart = embassy_stm32::peripherals::USART1; - pub type TxDma = embassy_stm32::peripherals::DMA1_CH1; - pub type RxDma = embassy_stm32::peripherals::DMA1_CH2; -} - const DMA_BUF_SIZE: usize = 256; #[embassy_executor::main] @@ -100,22 +23,12 @@ async fn main(spawner: Spawner) { // Arduino pins D0 and D1 // They're connected together with a 1K resistor. - #[cfg(feature = "stm32f103c8")] - let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5); - #[cfg(feature = "stm32g491re")] - let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2); - #[cfg(feature = "stm32g071rb")] - let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2); - #[cfg(feature = "stm32f429zi")] - let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1); - #[cfg(feature = "stm32wb55rg")] - let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2); - #[cfg(feature = "stm32h755zi")] - let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1); - #[cfg(feature = "stm32u585ai")] - let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1); - #[cfg(feature = "stm32c031c6")] - let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH1, p.DMA1_CH2); + let usart = peri!(p, UART); + let rx = peri!(p, UART_RX); + let tx = peri!(p, UART_TX); + let rx_dma = peri!(p, UART_RX_DMA); + let tx_dma = peri!(p, UART_TX_DMA); + let irq = irqs!(UART); // To run this test, use the saturating_serial test utility to saturate the serial port @@ -127,7 +40,7 @@ async fn main(spawner: Spawner) { config.stop_bits = StopBits::STOP1; config.parity = Parity::ParityNone; - let usart = Uart::new(usart, rx, tx, Irqs, tx_dma, rx_dma, config); + let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config); let (tx, rx) = usart.split(); static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE]; let dma_buf = unsafe { DMA_BUF.as_mut() }; @@ -139,7 +52,7 @@ async fn main(spawner: Spawner) { } #[embassy_executor::task] -async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) { +async fn transmit_task(mut tx: UartTx<'static, peris::UART, peris::UART_TX_DMA>) { // workaround https://github.com/embassy-rs/embassy/issues/1426 Timer::after(Duration::from_millis(100) as _).await; @@ -162,7 +75,7 @@ async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) { } #[embassy_executor::task] -async fn receive_task(mut rx: RingBufferedUartRx<'static, board::Uart, board::RxDma>) { +async fn receive_task(mut rx: RingBufferedUartRx<'static, peris::UART, peris::UART_RX_DMA>) { info!("Ready to receive..."); let mut rng = ChaCha8Rng::seed_from_u64(1337); diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 3a1b5c3ec..055eade6b 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -25,6 +25,91 @@ teleprobe_meta::target!(b"nucleo-stm32h563zi"); #[cfg(feature = "stm32c031c6")] teleprobe_meta::target!(b"nucleo-stm32c031c6"); +macro_rules! define_peris { + ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { + #[allow(unused_macros)] + macro_rules! peri { + $( + ($p:expr, $name) => { + $p.$peri + }; + )* + } + #[allow(unused_macros)] + macro_rules! irqs { + $( + ($irq_name) => {{ + embassy_stm32::bind_interrupts!(struct Irqs $irq_code); + Irqs + }}; + )* + } + + #[allow(unused)] + #[allow(non_camel_case_types)] + pub mod peris { + $( + pub type $name = embassy_stm32::peripherals::$peri; + )* + } + }; +} + +#[cfg(feature = "stm32f103c8")] +define_peris!( + UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA1_CH4, UART_RX_DMA = DMA1_CH5, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32g491re")] +define_peris!( + UART = USART1, UART_TX = PC4, UART_RX = PC5, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32g071rb")] +define_peris!( + UART = USART1, UART_TX = PC4, UART_RX = PC5, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32f429zi")] +define_peris!( + UART = USART6, UART_TX = PG14, UART_RX = PG9, UART_TX_DMA = DMA2_CH6, UART_RX_DMA = DMA2_CH1, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2, + @irq UART = {USART6 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32wb55rg")] +define_peris!( + UART = LPUART1, UART_TX = PA2, UART_RX = PA3, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, + @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32h755zi")] +define_peris!( + UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32u585ai")] +define_peris!( + UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, + SPI = SPI1, SPI_SCK = PE13, SPI_MOSI = PE15, SPI_MISO = PE14, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, + @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32h563zi")] +define_peris!( + UART = LPUART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, + SPI = SPI4, SPI_SCK = PE12, SPI_MOSI = PE14, SPI_MISO = PE13, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, + @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32c031c6")] +define_peris!( + UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); + pub fn config() -> Config { #[allow(unused_mut)] let mut config = Config::default(); -- cgit From 5d8817d1095589e1916a92adc9db3feb1a3b91b5 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 26 Sep 2023 00:14:52 +0200 Subject: stm32/usart: return error instead of panicking on bad baudrate. --- tests/stm32/src/bin/usart.rs | 6 +++--- tests/stm32/src/bin/usart_dma.rs | 2 +- tests/stm32/src/bin/usart_rx_ringbuffered.rs | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs index e789e543d..fece2fb3e 100644 --- a/tests/stm32/src/bin/usart.rs +++ b/tests/stm32/src/bin/usart.rs @@ -25,7 +25,7 @@ async fn main(_spawner: Spawner) { { let config = Config::default(); - let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config); + let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap(); // We can't send too many bytes, they have to fit in the FIFO. // This is because we aren't sending+receiving at the same time. @@ -41,7 +41,7 @@ async fn main(_spawner: Spawner) { // Test error handling with with an overflow error { let config = Config::default(); - let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config); + let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap(); // Send enough bytes to fill the RX FIFOs off all USART versions. let data = [0xC0, 0xDE, 0x12, 0x23, 0x34]; @@ -75,7 +75,7 @@ async fn main(_spawner: Spawner) { let mut config = Config::default(); config.baudrate = baudrate; - let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config); + let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap(); let n = (baudrate as usize / 100).max(64); diff --git a/tests/stm32/src/bin/usart_dma.rs b/tests/stm32/src/bin/usart_dma.rs index f203ebb56..1421f6605 100644 --- a/tests/stm32/src/bin/usart_dma.rs +++ b/tests/stm32/src/bin/usart_dma.rs @@ -25,7 +25,7 @@ async fn main(_spawner: Spawner) { let irq = irqs!(UART); let config = Config::default(); - let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config); + let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config).unwrap(); const LEN: usize = 128; let mut tx_buf = [0; LEN]; diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs index fdbeb9f6a..1ee7e596d 100644 --- a/tests/stm32/src/bin/usart_rx_ringbuffered.rs +++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs @@ -40,7 +40,7 @@ async fn main(spawner: Spawner) { config.stop_bits = StopBits::STOP1; config.parity = Parity::ParityNone; - let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config); + let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config).unwrap(); let (tx, rx) = usart.split(); static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE]; let dma_buf = unsafe { DMA_BUF.as_mut() }; -- cgit From 44bb40568302c6c7d766bfc7e42a15f02bdf89cd Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 26 Sep 2023 04:22:25 +0200 Subject: stm32/usart: enable fifo mode on usartv4. --- tests/stm32/src/bin/usart.rs | 42 ++++++++++++++++++++++++++---------------- 1 file changed, 26 insertions(+), 16 deletions(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs index fece2fb3e..74a81b4ec 100644 --- a/tests/stm32/src/bin/usart.rs +++ b/tests/stm32/src/bin/usart.rs @@ -5,11 +5,11 @@ mod common; use common::*; -use defmt::assert_eq; +use defmt::{assert, assert_eq, unreachable}; use embassy_executor::Spawner; use embassy_stm32::dma::NoDma; -use embassy_stm32::usart::{Config, Error, Uart}; -use embassy_time::{Duration, Instant}; +use embassy_stm32::usart::{Config, ConfigError, Error, Uart}; +use embassy_time::{block_for, Duration, Instant}; #[embassy_executor::main] async fn main(_spawner: Spawner) { @@ -44,10 +44,16 @@ async fn main(_spawner: Spawner) { let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap(); // Send enough bytes to fill the RX FIFOs off all USART versions. - let data = [0xC0, 0xDE, 0x12, 0x23, 0x34]; + let data = [0; 64]; usart.blocking_write(&data).unwrap(); usart.blocking_flush().unwrap(); + // USART can still take up to 1 bit time (?) to receive the last byte + // that we just flushed, so wait a bit. + // otherwise, we might clear the overrun flag from an *earlier* byte and + // it gets set again when receiving the last byte is done. + block_for(Duration::from_millis(1)); + // The error should be reported first. let mut buf = [0; 1]; let err = usart.blocking_read(&mut buf); @@ -60,22 +66,25 @@ async fn main(_spawner: Spawner) { // Test that baudrate divider is calculated correctly. // Do it by comparing the time it takes to send a known number of bytes. - for baudrate in [ - 300, - 9600, - 115200, - 250_000, - 337_934, - #[cfg(not(feature = "stm32f103c8"))] - 1_000_000, - #[cfg(not(feature = "stm32f103c8"))] - 2_000_000, - ] { + for baudrate in [300, 9600, 115200, 250_000, 337_934, 1_000_000, 2_000_000] { info!("testing baudrate {}", baudrate); let mut config = Config::default(); config.baudrate = baudrate; - let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap(); + let mut usart = match Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config) { + Ok(x) => x, + Err(ConfigError::BaudrateTooHigh) => { + info!("baudrate too high"); + assert!(baudrate >= 1_000_000); + continue; + } + Err(ConfigError::BaudrateTooLow) => { + info!("baudrate too low"); + assert!(baudrate <= 300); + continue; + } + Err(_) => unreachable!(), + }; let n = (baudrate as usize / 100).max(64); @@ -83,6 +92,7 @@ async fn main(_spawner: Spawner) { for _ in 0..n { usart.blocking_write(&[0x00]).unwrap(); } + usart.blocking_flush().unwrap(); let dur = Instant::now() - start; let want_dur = Duration::from_micros(n as u64 * 10 * 1_000_000 / (baudrate as u64)); let fuzz = want_dur / 5; -- cgit From 8b5fb254c04ec479b8a7f3bd5880a944313abbf7 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 26 Sep 2023 05:16:26 +0200 Subject: tests/stm32: add L0, L1, L4, L4+, L5 --- tests/stm32/src/common.rs | 91 ++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 90 insertions(+), 1 deletion(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 055eade6b..9c0b8c39e 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -24,6 +24,16 @@ teleprobe_meta::target!(b"iot-stm32u585ai"); teleprobe_meta::target!(b"nucleo-stm32h563zi"); #[cfg(feature = "stm32c031c6")] teleprobe_meta::target!(b"nucleo-stm32c031c6"); +#[cfg(feature = "stm32l073rz")] +teleprobe_meta::target!(b"nucleo-stm32l073rz"); +#[cfg(feature = "stm32l152re")] +teleprobe_meta::target!(b"nucleo-stm32l152re"); +#[cfg(feature = "stm32l4a6zg")] +teleprobe_meta::target!(b"nucleo-stm32l4a6zg"); +#[cfg(feature = "stm32l4r5zi")] +teleprobe_meta::target!(b"nucleo-stm32l4r5zi"); +#[cfg(feature = "stm32l552ze")] +teleprobe_meta::target!(b"nucleo-stm32l552ze"); macro_rules! define_peris { ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { @@ -109,6 +119,36 @@ define_peris!( SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, ); +#[cfg(feature = "stm32l4a6zg")] +define_peris!( + UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32l4r5zi")] +define_peris!( + UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32l073rz")] +define_peris!( + UART = USART4, UART_TX = PA0, UART_RX = PA1, UART_TX_DMA = DMA1_CH3, UART_RX_DMA = DMA1_CH2, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART4_5 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32l152re")] +define_peris!( + UART = USART3, UART_TX = PB10, UART_RX = PB11, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler;}, +); +#[cfg(feature = "stm32l552ze")] +define_peris!( + UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler;}, +); pub fn config() -> Config { #[allow(unused_mut)] @@ -144,9 +184,58 @@ pub fn config() -> Config { config.rcc.adc_clock_source = AdcClockSource::PLL2_P; } + #[cfg(any(feature = "stm32l4a6zg", feature = "stm32l4r5zi"))] + { + use embassy_stm32::rcc::*; + config.rcc.mux = ClockSrc::PLL( + // 72Mhz clock (16 / 1 * 18 / 4) + PLLSource::HSI16, + PLLClkDiv::Div4, + PLLSrcDiv::Div1, + PLLMul::Mul18, + Some(PLLClkDiv::Div6), // 48Mhz (16 / 1 * 18 / 6) + ); + } + + #[cfg(any(feature = "stm32l552ze"))] + { + use embassy_stm32::rcc::*; + config.rcc.mux = ClockSrc::PLL( + // 110Mhz clock (16 / 4 * 55 / 2) + PLLSource::HSI16, + PLLClkDiv::Div2, + PLLSrcDiv::Div4, + PLLMul::Mul55, + None, + ); + } + #[cfg(feature = "stm32u585ai")] { - config.rcc.mux = embassy_stm32::rcc::ClockSrc::MSI(embassy_stm32::rcc::MSIRange::Range48mhz); + use embassy_stm32::rcc::*; + config.rcc.mux = ClockSrc::MSI(MSIRange::Range48mhz); + } + + #[cfg(feature = "stm32l073rz")] + { + use embassy_stm32::rcc::*; + config.rcc.mux = ClockSrc::PLL( + // 32Mhz clock (16 * 4 / 2) + PLLSource::HSI16, + PLLMul::Mul4, + PLLDiv::Div2, + ); + } + + #[cfg(any(feature = "stm32l152re"))] + { + use embassy_stm32::rcc::*; + config.rcc.mux = ClockSrc::PLL( + // 32Mhz clock (16 * 4 / 2) + PLLSource::HSI, + PLLMul::Mul4, + PLLDiv::Div2, + ); } config -- cgit