From 70b3c4374d57ab638e0cb76013b725e1ea229546 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sat, 3 Feb 2024 09:44:00 +1000 Subject: Port FDCAN HAL to use PAC directly instead of fdcan crate. - Provide separate FDCAN capable and Classic CAN API's - Don't use fdcan crate dep anymore - Provide embedded-can traits. --- tests/stm32/src/bin/fdcan.rs | 109 +++++++++++-------------------------------- 1 file changed, 28 insertions(+), 81 deletions(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index 7363eaa16..76c27d091 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -36,7 +36,7 @@ fn options() -> TestOptions { c.rcc.fdcan_clock_source = rcc::FdCanClockSource::HSE; TestOptions { config: c, - max_latency: Duration::from_micros(3800), + max_latency: Duration::from_micros(1200), second_fifo_working: false, } } @@ -53,12 +53,12 @@ fn options() -> TestOptions { c.rcc.fdcan_clock_source = rcc::FdCanClockSource::HSE; TestOptions { config: c, - max_latency: Duration::from_micros(5500), + max_latency: Duration::from_micros(1200), second_fifo_working: false, } } -#[cfg(any(feature = "stm32g491re"))] +#[cfg(any(feature = "stm32g491re", feature = "stm32g431cb"))] fn options() -> TestOptions { info!("G4 config"); TestOptions { @@ -80,9 +80,9 @@ async fn main(_spawner: Spawner) { // 250k bps can.set_bitrate(250_000); - can.can.set_extended_filter( - can::filter::ExtendedFilterSlot::_0, - can::filter::ExtendedFilter::accept_all_into_fifo1(), + can.set_extended_filter( + can::fd::filter::ExtendedFilterSlot::_0, + can::fd::filter::ExtendedFilter::accept_all_into_fifo1(), ); let mut can = can.into_internal_loopback_mode(); @@ -91,31 +91,21 @@ async fn main(_spawner: Spawner) { let mut i: u8 = 0; loop { - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::StandardId::new(0x123).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); + let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame..."); let tx_ts = Instant::now(); can.write(&tx_frame).await; - let envelope = can.read().await.unwrap(); + let (frame, timestamp) = can.read().await.unwrap(); info!("Frame received!"); // Check data. - assert!(i == envelope.data()[0], "{} == {}", i, envelope.data()[0]); + assert!(i == frame.data()[0], "{} == {}", i, frame.data()[0]); - info!("loopback time {}", envelope.header.time_stamp); - info!("loopback frame {=u8}", envelope.data()[0]); - let latency = envelope.timestamp.saturating_duration_since(tx_ts); + info!("loopback time {}", timestamp); + info!("loopback frame {=u8}", frame.data()[0]); + let latency = timestamp.saturating_duration_since(tx_ts); info!("loopback latency {} us", latency.as_micros()); // Theoretical minimum latency is 55us, actual is usually ~80us @@ -143,47 +133,26 @@ async fn main(_spawner: Spawner) { // in each FIFO so make sure we write enough to fill them both up before reading. for i in 0..3 { // Try filling up the RX FIFO0 buffers with standard packets - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::StandardId::new(0x123).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); + let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); can.write(&tx_frame).await; } for i in 3..max_buffered { // Try filling up the RX FIFO0 buffers with extended packets - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::ExtendedId::new(0x1232344).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); - + let tx_frame = can::frame::ClassicFrame::new_extended(0x1232344, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); can.write(&tx_frame).await; } // Try and receive all 6 packets for i in 0..max_buffered { - let envelope = can.read().await.unwrap(); - match envelope.header.id { - can::Id::Extended(id) => { - info!("Extended received! {:x} {} {}", id.as_raw(), envelope.data()[0], i); + let (frame, _ts) = can.read().await.unwrap(); + match frame.id() { + embedded_can::Id::Extended(id) => { + info!("Extended received! {:x} {} {}", id.as_raw(), frame.data()[0], i); } - can::Id::Standard(id) => { - info!("Standard received! {:x} {} {}", id.as_raw(), envelope.data()[0], i); + embedded_can::Id::Standard(id) => { + info!("Standard received! {:x} {} {}", id.as_raw(), frame.data()[0], i); } } } @@ -192,48 +161,26 @@ async fn main(_spawner: Spawner) { let (mut tx, mut rx) = can.split(); for i in 0..3 { // Try filling up the RX FIFO0 buffers with standard packets - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::StandardId::new(0x123).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); - + let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); tx.write(&tx_frame).await; } for i in 3..max_buffered { // Try filling up the RX FIFO0 buffers with extended packets - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::ExtendedId::new(0x1232344).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); - + let tx_frame = can::frame::ClassicFrame::new_extended(0x1232344, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); tx.write(&tx_frame).await; } // Try and receive all 6 packets for i in 0..max_buffered { - let envelope = rx.read().await.unwrap(); - match envelope.header.id { - can::Id::Extended(id) => { - info!("Extended received! {:x} {} {}", id.as_raw(), envelope.data()[0], i); + let (frame, _ts) = rx.read().await.unwrap(); + match frame.id() { + embedded_can::Id::Extended(id) => { + info!("Extended received! {:x} {} {}", id.as_raw(), frame.data()[0], i); } - can::Id::Standard(id) => { - info!("Standard received! {:x} {} {}", id.as_raw(), envelope.data()[0], i); + embedded_can::Id::Standard(id) => { + info!("Standard received! {:x} {} {}", id.as_raw(), frame.data()[0], i); } } } -- cgit From eafa90cd0707298f354d5d1e496f8364117bd781 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 18 Feb 2024 13:09:37 +1000 Subject: Remove the OperatingMode typestates Instead have two explcit types(without the mode generic arg)types: - One for config - One for all operating modes --- tests/stm32/src/bin/fdcan.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index 76c27d091..398e31ffc 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -75,7 +75,7 @@ async fn main(_spawner: Spawner) { let options = options(); let peripherals = embassy_stm32::init(options.config); - let mut can = can::Fdcan::new(peripherals.FDCAN1, peripherals.PB8, peripherals.PB9, Irqs); + let mut can = can::FdcanConfigurator::new(peripherals.FDCAN1, peripherals.PB8, peripherals.PB9, Irqs); // 250k bps can.set_bitrate(250_000); -- cgit From 0665e0d452627b5fe3c0b52981c7f4ef380de83f Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 23 Feb 2024 01:22:11 +0100 Subject: stm32/rcc: port U5 to new API, add all PLLs, all HSE modes. --- tests/stm32/src/common.rs | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'tests/stm32/src') diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 50a7f9bae..1e6b1cce9 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -577,7 +577,18 @@ pub fn config() -> Config { #[cfg(any(feature = "stm32u585ai", feature = "stm32u5a5zj"))] { use embassy_stm32::rcc::*; - config.rcc.mux = ClockSrc::MSI(Msirange::RANGE_48MHZ); + config.rcc.hsi = true; + config.rcc.pll1 = Some(Pll { + source: PllSource::HSI, // 16 MHz + prediv: PllPreDiv::DIV1, + mul: PllMul::MUL10, + divp: None, + divq: None, + divr: Some(PllDiv::DIV1), // 160 MHz + }); + config.rcc.mux = ClockSrc::PLL1_R; + config.rcc.voltage_range = VoltageScale::RANGE1; + config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true }); // needed for USB } #[cfg(feature = "stm32wba52cg")] -- cgit