From 70b3c4374d57ab638e0cb76013b725e1ea229546 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sat, 3 Feb 2024 09:44:00 +1000 Subject: Port FDCAN HAL to use PAC directly instead of fdcan crate. - Provide separate FDCAN capable and Classic CAN API's - Don't use fdcan crate dep anymore - Provide embedded-can traits. --- tests/stm32/Cargo.toml | 1 + tests/stm32/src/bin/fdcan.rs | 109 +++++++++++-------------------------------- 2 files changed, 29 insertions(+), 81 deletions(-) (limited to 'tests') diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 8554682a4..5b28b5849 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -69,6 +69,7 @@ cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" embedded-hal-1 = { package = "embedded-hal", version = "1.0" } embedded-hal-async = { version = "1.0" } +embedded-can = { version = "0.4" } micromath = "2.0.0" panic-probe = { version = "0.3.0", features = ["print-defmt"] } rand_core = { version = "0.6", default-features = false } diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index 7363eaa16..76c27d091 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -36,7 +36,7 @@ fn options() -> TestOptions { c.rcc.fdcan_clock_source = rcc::FdCanClockSource::HSE; TestOptions { config: c, - max_latency: Duration::from_micros(3800), + max_latency: Duration::from_micros(1200), second_fifo_working: false, } } @@ -53,12 +53,12 @@ fn options() -> TestOptions { c.rcc.fdcan_clock_source = rcc::FdCanClockSource::HSE; TestOptions { config: c, - max_latency: Duration::from_micros(5500), + max_latency: Duration::from_micros(1200), second_fifo_working: false, } } -#[cfg(any(feature = "stm32g491re"))] +#[cfg(any(feature = "stm32g491re", feature = "stm32g431cb"))] fn options() -> TestOptions { info!("G4 config"); TestOptions { @@ -80,9 +80,9 @@ async fn main(_spawner: Spawner) { // 250k bps can.set_bitrate(250_000); - can.can.set_extended_filter( - can::filter::ExtendedFilterSlot::_0, - can::filter::ExtendedFilter::accept_all_into_fifo1(), + can.set_extended_filter( + can::fd::filter::ExtendedFilterSlot::_0, + can::fd::filter::ExtendedFilter::accept_all_into_fifo1(), ); let mut can = can.into_internal_loopback_mode(); @@ -91,31 +91,21 @@ async fn main(_spawner: Spawner) { let mut i: u8 = 0; loop { - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::StandardId::new(0x123).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); + let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame..."); let tx_ts = Instant::now(); can.write(&tx_frame).await; - let envelope = can.read().await.unwrap(); + let (frame, timestamp) = can.read().await.unwrap(); info!("Frame received!"); // Check data. - assert!(i == envelope.data()[0], "{} == {}", i, envelope.data()[0]); + assert!(i == frame.data()[0], "{} == {}", i, frame.data()[0]); - info!("loopback time {}", envelope.header.time_stamp); - info!("loopback frame {=u8}", envelope.data()[0]); - let latency = envelope.timestamp.saturating_duration_since(tx_ts); + info!("loopback time {}", timestamp); + info!("loopback frame {=u8}", frame.data()[0]); + let latency = timestamp.saturating_duration_since(tx_ts); info!("loopback latency {} us", latency.as_micros()); // Theoretical minimum latency is 55us, actual is usually ~80us @@ -143,47 +133,26 @@ async fn main(_spawner: Spawner) { // in each FIFO so make sure we write enough to fill them both up before reading. for i in 0..3 { // Try filling up the RX FIFO0 buffers with standard packets - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::StandardId::new(0x123).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); + let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); can.write(&tx_frame).await; } for i in 3..max_buffered { // Try filling up the RX FIFO0 buffers with extended packets - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::ExtendedId::new(0x1232344).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); - + let tx_frame = can::frame::ClassicFrame::new_extended(0x1232344, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); can.write(&tx_frame).await; } // Try and receive all 6 packets for i in 0..max_buffered { - let envelope = can.read().await.unwrap(); - match envelope.header.id { - can::Id::Extended(id) => { - info!("Extended received! {:x} {} {}", id.as_raw(), envelope.data()[0], i); + let (frame, _ts) = can.read().await.unwrap(); + match frame.id() { + embedded_can::Id::Extended(id) => { + info!("Extended received! {:x} {} {}", id.as_raw(), frame.data()[0], i); } - can::Id::Standard(id) => { - info!("Standard received! {:x} {} {}", id.as_raw(), envelope.data()[0], i); + embedded_can::Id::Standard(id) => { + info!("Standard received! {:x} {} {}", id.as_raw(), frame.data()[0], i); } } } @@ -192,48 +161,26 @@ async fn main(_spawner: Spawner) { let (mut tx, mut rx) = can.split(); for i in 0..3 { // Try filling up the RX FIFO0 buffers with standard packets - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::StandardId::new(0x123).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); - + let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); tx.write(&tx_frame).await; } for i in 3..max_buffered { // Try filling up the RX FIFO0 buffers with extended packets - let tx_frame = can::TxFrame::new( - can::TxFrameHeader { - len: 1, - frame_format: can::FrameFormat::Standard, - id: can::ExtendedId::new(0x1232344).unwrap().into(), - bit_rate_switching: false, - marker: None, - }, - &[i], - ) - .unwrap(); - + let tx_frame = can::frame::ClassicFrame::new_extended(0x1232344, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); tx.write(&tx_frame).await; } // Try and receive all 6 packets for i in 0..max_buffered { - let envelope = rx.read().await.unwrap(); - match envelope.header.id { - can::Id::Extended(id) => { - info!("Extended received! {:x} {} {}", id.as_raw(), envelope.data()[0], i); + let (frame, _ts) = rx.read().await.unwrap(); + match frame.id() { + embedded_can::Id::Extended(id) => { + info!("Extended received! {:x} {} {}", id.as_raw(), frame.data()[0], i); } - can::Id::Standard(id) => { - info!("Standard received! {:x} {} {}", id.as_raw(), envelope.data()[0], i); + embedded_can::Id::Standard(id) => { + info!("Standard received! {:x} {} {}", id.as_raw(), frame.data()[0], i); } } } -- cgit From eafa90cd0707298f354d5d1e496f8364117bd781 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 18 Feb 2024 13:09:37 +1000 Subject: Remove the OperatingMode typestates Instead have two explcit types(without the mode generic arg)types: - One for config - One for all operating modes --- tests/stm32/src/bin/fdcan.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tests') diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index 76c27d091..398e31ffc 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -75,7 +75,7 @@ async fn main(_spawner: Spawner) { let options = options(); let peripherals = embassy_stm32::init(options.config); - let mut can = can::Fdcan::new(peripherals.FDCAN1, peripherals.PB8, peripherals.PB9, Irqs); + let mut can = can::FdcanConfigurator::new(peripherals.FDCAN1, peripherals.PB8, peripherals.PB9, Irqs); // 250k bps can.set_bitrate(250_000); -- cgit From 1f17fdf84ee30f989a1a5bd8945a76a9f5edac4b Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 21 Feb 2024 21:51:43 +0100 Subject: nrf/buffered_uart: refactor so rx/tx halves are independent. --- tests/nrf52840/src/bin/buffered_uart.rs | 2 +- tests/nrf52840/src/bin/buffered_uart_full.rs | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'tests') diff --git a/tests/nrf52840/src/bin/buffered_uart.rs b/tests/nrf52840/src/bin/buffered_uart.rs index 354d787b4..721751136 100644 --- a/tests/nrf52840/src/bin/buffered_uart.rs +++ b/tests/nrf52840/src/bin/buffered_uart.rs @@ -23,7 +23,7 @@ async fn main(_spawner: Spawner) { let mut tx_buffer = [0u8; 1024]; let mut rx_buffer = [0u8; 1024]; - let mut u = BufferedUarte::new( + let u = BufferedUarte::new( p.UARTE0, p.TIMER0, p.PPI_CH0, diff --git a/tests/nrf52840/src/bin/buffered_uart_full.rs b/tests/nrf52840/src/bin/buffered_uart_full.rs index e59c75ba9..62edaed25 100644 --- a/tests/nrf52840/src/bin/buffered_uart_full.rs +++ b/tests/nrf52840/src/bin/buffered_uart_full.rs @@ -23,7 +23,7 @@ async fn main(_spawner: Spawner) { let mut tx_buffer = [0u8; 1024]; let mut rx_buffer = [0u8; 1024]; - let mut u = BufferedUarte::new( + let u = BufferedUarte::new( p.UARTE0, p.TIMER0, p.PPI_CH0, -- cgit From 036f703a4a42ae67d2b0fdc6b5268ac04d5066f7 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 21 Feb 2024 23:38:51 +0100 Subject: nrf/uart: add buffereduart drop, rxonly, txonly tests. --- tests/nrf52840/src/bin/buffered_uart.rs | 87 +++++++++++++------------- tests/nrf52840/src/bin/buffered_uart_halves.rs | 82 ++++++++++++++++++++++++ 2 files changed, 127 insertions(+), 42 deletions(-) create mode 100644 tests/nrf52840/src/bin/buffered_uart_halves.rs (limited to 'tests') diff --git a/tests/nrf52840/src/bin/buffered_uart.rs b/tests/nrf52840/src/bin/buffered_uart.rs index 721751136..a01d66d85 100644 --- a/tests/nrf52840/src/bin/buffered_uart.rs +++ b/tests/nrf52840/src/bin/buffered_uart.rs @@ -15,7 +15,7 @@ bind_interrupts!(struct Irqs { #[embassy_executor::main] async fn main(_spawner: Spawner) { - let p = embassy_nrf::init(Default::default()); + let mut p = embassy_nrf::init(Default::default()); let mut config = uarte::Config::default(); config.parity = uarte::Parity::EXCLUDED; config.baudrate = uarte::Baudrate::BAUD1M; @@ -23,55 +23,58 @@ async fn main(_spawner: Spawner) { let mut tx_buffer = [0u8; 1024]; let mut rx_buffer = [0u8; 1024]; - let u = BufferedUarte::new( - p.UARTE0, - p.TIMER0, - p.PPI_CH0, - p.PPI_CH1, - p.PPI_GROUP0, - Irqs, - p.P1_03, - p.P1_02, - config.clone(), - &mut rx_buffer, - &mut tx_buffer, - ); + // test teardown + recreate of the buffereduarte works fine. + for _ in 0..2 { + let u = BufferedUarte::new( + &mut p.UARTE0, + &mut p.TIMER0, + &mut p.PPI_CH0, + &mut p.PPI_CH1, + &mut p.PPI_GROUP0, + Irqs, + &mut p.P1_03, + &mut p.P1_02, + config.clone(), + &mut rx_buffer, + &mut tx_buffer, + ); - info!("uarte initialized!"); + info!("uarte initialized!"); - let (mut rx, mut tx) = u.split(); + let (mut rx, mut tx) = u.split(); - const COUNT: usize = 40_000; + const COUNT: usize = 40_000; - let tx_fut = async { - let mut tx_buf = [0; 215]; - let mut i = 0; - while i < COUNT { - let n = tx_buf.len().min(COUNT - i); - let tx_buf = &mut tx_buf[..n]; - for (j, b) in tx_buf.iter_mut().enumerate() { - *b = (i + j) as u8; + let tx_fut = async { + let mut tx_buf = [0; 215]; + let mut i = 0; + while i < COUNT { + let n = tx_buf.len().min(COUNT - i); + let tx_buf = &mut tx_buf[..n]; + for (j, b) in tx_buf.iter_mut().enumerate() { + *b = (i + j) as u8; + } + let n = unwrap!(tx.write(tx_buf).await); + i += n; } - let n = unwrap!(tx.write(tx_buf).await); - i += n; - } - }; - let rx_fut = async { - let mut i = 0; - while i < COUNT { - let buf = unwrap!(rx.fill_buf().await); + }; + let rx_fut = async { + let mut i = 0; + while i < COUNT { + let buf = unwrap!(rx.fill_buf().await); - for &b in buf { - assert_eq!(b, i as u8); - i = i + 1; - } + for &b in buf { + assert_eq!(b, i as u8); + i = i + 1; + } - let n = buf.len(); - rx.consume(n); - } - }; + let n = buf.len(); + rx.consume(n); + } + }; - join(rx_fut, tx_fut).await; + join(rx_fut, tx_fut).await; + } info!("Test OK"); cortex_m::asm::bkpt(); diff --git a/tests/nrf52840/src/bin/buffered_uart_halves.rs b/tests/nrf52840/src/bin/buffered_uart_halves.rs new file mode 100644 index 000000000..54a9fef5b --- /dev/null +++ b/tests/nrf52840/src/bin/buffered_uart_halves.rs @@ -0,0 +1,82 @@ +#![no_std] +#![no_main] +teleprobe_meta::target!(b"nrf52840-dk"); + +use defmt::{assert_eq, *}; +use embassy_executor::Spawner; +use embassy_futures::join::join; +use embassy_nrf::buffered_uarte::{self, BufferedUarteRx, BufferedUarteTx}; +use embassy_nrf::{bind_interrupts, peripherals, uarte}; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + UARTE0_UART0 => buffered_uarte::InterruptHandler; + UARTE1 => buffered_uarte::InterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut p = embassy_nrf::init(Default::default()); + let mut config = uarte::Config::default(); + config.parity = uarte::Parity::EXCLUDED; + config.baudrate = uarte::Baudrate::BAUD1M; + + let mut tx_buffer = [0u8; 1024]; + let mut rx_buffer = [0u8; 1024]; + + // test teardown + recreate of the buffereduarte works fine. + for _ in 0..2 { + const COUNT: usize = 40_000; + + let mut tx = BufferedUarteTx::new(&mut p.UARTE1, Irqs, &mut p.P1_02, config.clone(), &mut tx_buffer); + + let mut rx = BufferedUarteRx::new( + &mut p.UARTE0, + &mut p.TIMER0, + &mut p.PPI_CH0, + &mut p.PPI_CH1, + &mut p.PPI_GROUP0, + Irqs, + &mut p.P1_03, + config.clone(), + &mut rx_buffer, + ); + + let tx_fut = async { + info!("tx initialized!"); + + let mut tx_buf = [0; 215]; + let mut i = 0; + while i < COUNT { + let n = tx_buf.len().min(COUNT - i); + let tx_buf = &mut tx_buf[..n]; + for (j, b) in tx_buf.iter_mut().enumerate() { + *b = (i + j) as u8; + } + let n = unwrap!(tx.write(tx_buf).await); + i += n; + } + }; + let rx_fut = async { + info!("rx initialized!"); + + let mut i = 0; + while i < COUNT { + let buf = unwrap!(rx.fill_buf().await); + + for &b in buf { + assert_eq!(b, i as u8); + i = i + 1; + } + + let n = buf.len(); + rx.consume(n); + } + }; + + join(rx_fut, tx_fut).await; + } + + info!("Test OK"); + cortex_m::asm::bkpt(); +} -- cgit From 0c6d3ea05116c2798529ae68136f0e29f04f92e1 Mon Sep 17 00:00:00 2001 From: Caleb Jamison Date: Thu, 22 Feb 2024 06:05:51 -0500 Subject: Add SetConfig impl to rp2040 i2c Also expand test to cover 1kHz, 100kHz, 400kHz, and 1MHz speeds. --- tests/rp/Cargo.toml | 1 + tests/rp/src/bin/i2c.rs | 94 ++++++++++++++++++++++++++++++------------------- 2 files changed, 59 insertions(+), 36 deletions(-) (limited to 'tests') diff --git a/tests/rp/Cargo.toml b/tests/rp/Cargo.toml index 46e1e9a5f..e67f2117d 100644 --- a/tests/rp/Cargo.toml +++ b/tests/rp/Cargo.toml @@ -14,6 +14,7 @@ embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = [ "defmt embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "dhcpv4", "medium-ethernet"] } embassy-net-wiznet = { version = "0.1.0", path = "../../embassy-net-wiznet", features = ["defmt"] } +embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal/"} cyw43 = { path = "../../cyw43", features = ["defmt", "firmware-logs"] } cyw43-pio = { path = "../../cyw43-pio", features = ["defmt", "overclock"] } perf-client = { path = "../perf-client" } diff --git a/tests/rp/src/bin/i2c.rs b/tests/rp/src/bin/i2c.rs index a0aed1a42..153b37999 100644 --- a/tests/rp/src/bin/i2c.rs +++ b/tests/rp/src/bin/i2c.rs @@ -3,7 +3,10 @@ teleprobe_meta::target!(b"rpi-pico"); use defmt::{assert_eq, info, panic, unwrap}; -use embassy_executor::Executor; +use embassy_embedded_hal::SetConfig; +use embassy_executor::{Executor, Spawner}; +use embassy_rp::clocks::{PllConfig, XoscConfig}; +use embassy_rp::config::Config as rpConfig; use embassy_rp::multicore::{spawn_core1, Stack}; use embassy_rp::peripherals::{I2C0, I2C1}; use embassy_rp::{bind_interrupts, i2c, i2c_slave}; @@ -13,7 +16,6 @@ use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _, panic_probe as _, panic_probe as _}; static mut CORE1_STACK: Stack<1024> = Stack::new(); -static EXECUTOR0: StaticCell = StaticCell::new(); static EXECUTOR1: StaticCell = StaticCell::new(); use crate::i2c::AbortReason; @@ -44,10 +46,7 @@ async fn device_task(mut dev: i2c_slave::I2cSlave<'static, I2C1>) -> ! { Ok(x) => match x { i2c_slave::ReadStatus::Done => break, i2c_slave::ReadStatus::NeedMoreBytes => count += 1, - i2c_slave::ReadStatus::LeftoverBytes(x) => { - info!("tried to write {} extra bytes", x); - break; - } + i2c_slave::ReadStatus::LeftoverBytes(x) => panic!("tried to write {} extra bytes", x), }, Err(e) => match e { embassy_rp::i2c_slave::Error::Abort(AbortReason::Other(n)) => panic!("Other {:b}", n), @@ -92,6 +91,8 @@ async fn device_task(mut dev: i2c_slave::I2cSlave<'static, I2C1>) -> ! { resp_buff[i] = i as u8; } dev.respond_to_read(&resp_buff).await.unwrap(); + // reset count for next round of tests + count = 0xD0; } x => panic!("Invalid Write Read {:x}", x), } @@ -104,8 +105,7 @@ async fn device_task(mut dev: i2c_slave::I2cSlave<'static, I2C1>) -> ! { } } -#[embassy_executor::task] -async fn controller_task(mut con: i2c::I2c<'static, I2C0, i2c::Async>) { +async fn controller_task(con: &mut i2c::I2c<'static, I2C0, i2c::Async>) { info!("Device start"); { @@ -179,33 +179,55 @@ async fn controller_task(mut con: i2c::I2c<'static, I2C0, i2c::Async>) { info!("large write_read - OK") } - info!("Test OK"); - cortex_m::asm::bkpt(); -} - -#[cortex_m_rt::entry] -fn main() -> ! { - let p = embassy_rp::init(Default::default()); - info!("Hello World!"); - - let d_sda = p.PIN_19; - let d_scl = p.PIN_18; - let mut config = i2c_slave::Config::default(); - config.addr = DEV_ADDR as u16; - let device = i2c_slave::I2cSlave::new(p.I2C1, d_sda, d_scl, Irqs, config); - - spawn_core1(p.CORE1, unsafe { &mut CORE1_STACK }, move || { - let executor1 = EXECUTOR1.init(Executor::new()); - executor1.run(|spawner| unwrap!(spawner.spawn(device_task(device)))); - }); - - let executor0 = EXECUTOR0.init(Executor::new()); - - let c_sda = p.PIN_21; - let c_scl = p.PIN_20; - let mut config = i2c::Config::default(); - config.frequency = 5_000; - let controller = i2c::I2c::new_async(p.I2C0, c_sda, c_scl, Irqs, config); + #[embassy_executor::main] + async fn main(_core0_spawner: Spawner) { + let mut config = rpConfig::default(); + // Configure clk_sys to 48MHz to support 1kHz scl. + // In theory it can go lower, but we won't bother to test below 1kHz. + config.clocks.xosc = Some(XoscConfig { + hz: 12_000_000, + delay_multiplier: 128, + sys_pll: Some(PllConfig { + refdiv: 1, + fbdiv: 120, + post_div1: 6, + post_div2: 5, + }), + usb_pll: Some(PllConfig { + refdiv: 1, + fbdiv: 120, + post_div1: 6, + post_div2: 5, + }), + }); + + let p = embassy_rp::init(config); + info!("Hello World!"); + + let d_sda = p.PIN_19; + let d_scl = p.PIN_18; + let mut config = i2c_slave::Config::default(); + config.addr = DEV_ADDR as u16; + let device = i2c_slave::I2cSlave::new(p.I2C1, d_sda, d_scl, Irqs, config); + + spawn_core1(p.CORE1, unsafe { &mut CORE1_STACK }, move || { + let executor1 = EXECUTOR1.init(Executor::new()); + executor1.run(|spawner| unwrap!(spawner.spawn(device_task(device)))); + }); + + let c_sda = p.PIN_21; + let c_scl = p.PIN_20; + let mut controller = i2c::I2c::new_async(p.I2C0, c_sda, c_scl, Irqs, Default::default()); + + for freq in [1000, 100_000, 400_000, 1_000_000] { + info!("testing at {}hz", freq); + let mut config = i2c::Config::default(); + config.frequency = freq; + controller.set_config(&config).unwrap(); + controller_task(&mut controller).await; + } - executor0.run(|spawner| unwrap!(spawner.spawn(controller_task(controller)))); + info!("Test OK"); + cortex_m::asm::bkpt(); + } } -- cgit From 0665e0d452627b5fe3c0b52981c7f4ef380de83f Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 23 Feb 2024 01:22:11 +0100 Subject: stm32/rcc: port U5 to new API, add all PLLs, all HSE modes. --- tests/stm32/src/common.rs | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'tests') diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 50a7f9bae..1e6b1cce9 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -577,7 +577,18 @@ pub fn config() -> Config { #[cfg(any(feature = "stm32u585ai", feature = "stm32u5a5zj"))] { use embassy_stm32::rcc::*; - config.rcc.mux = ClockSrc::MSI(Msirange::RANGE_48MHZ); + config.rcc.hsi = true; + config.rcc.pll1 = Some(Pll { + source: PllSource::HSI, // 16 MHz + prediv: PllPreDiv::DIV1, + mul: PllMul::MUL10, + divp: None, + divq: None, + divr: Some(PllDiv::DIV1), // 160 MHz + }); + config.rcc.mux = ClockSrc::PLL1_R; + config.rcc.voltage_range = VoltageScale::RANGE1; + config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true }); // needed for USB } #[cfg(feature = "stm32wba52cg")] -- cgit From d24349f57ce7435e70fcf1cd9aac20d1740995d4 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 23 Feb 2024 01:33:37 +0100 Subject: stm32/tests: run stm32u5a5zj from flash due to wrong RAM size in stm32-data. --- tests/stm32/Cargo.toml | 2 +- tests/stm32/build.rs | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'tests') diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 5b28b5849..828a28e2c 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -26,7 +26,7 @@ stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng", "hash" stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"] stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng", "hash"] stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng", "hash"] -stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng"] +stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng", "hash"] stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"] stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"] diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs index bc5589164..176adff62 100644 --- a/tests/stm32/build.rs +++ b/tests/stm32/build.rs @@ -16,6 +16,7 @@ fn main() -> Result<(), Box> { feature = "stm32l073rz", // wrong ram size in stm32-data feature = "stm32wl55jc", + feature = "stm32u5a5zj", // no VTOR, so interrupts can't work when running from RAM feature = "stm32f091rc", )) { -- cgit