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authorbors[bot] <26634292+bors[bot]@users.noreply.github.com>2022-06-15 13:29:55 +0000
committerGitHub <[email protected]>2022-06-15 13:29:55 +0000
commit03c20604c39d622b28c0070e5a95b9fbfb7a8f8a (patch)
tree38ede12e48b39ec59d06c9ec5331d5b2c483dacc
parent624e46ccfb325c5e5ef15b34c7182cafdb62a7a2 (diff)
parentfaa59efbf623b4551e064a61c087294f73dbb123 (diff)
Merge #811
811: Sync subghz peripheral support with stm32wlxx-hal r=lulf a=lulf * A few more registers exposed * Fix for "sleeping" * Updating comments Co-authored-by: Ulf Lilleengen <[email protected]>
Diffstat
-rw-r--r--embassy-stm32/src/subghz/bit_sync.rs12
-rw-r--r--embassy-stm32/src/subghz/cad_params.rs14
-rw-r--r--embassy-stm32/src/subghz/calibrate.rs6
-rw-r--r--embassy-stm32/src/subghz/fallback_mode.rs2
-rw-r--r--embassy-stm32/src/subghz/hse_trim.rs8
-rw-r--r--embassy-stm32/src/subghz/irq.rs14
-rw-r--r--embassy-stm32/src/subghz/mod.rs883
-rw-r--r--embassy-stm32/src/subghz/mod_params.rs101
-rw-r--r--embassy-stm32/src/subghz/op_error.rs2
-rw-r--r--embassy-stm32/src/subghz/pa_config.rs18
-rw-r--r--embassy-stm32/src/subghz/packet_params.rs42
-rw-r--r--embassy-stm32/src/subghz/packet_status.rs36
-rw-r--r--embassy-stm32/src/subghz/packet_type.rs2
-rw-r--r--embassy-stm32/src/subghz/pkt_ctrl.rs22
-rw-r--r--embassy-stm32/src/subghz/pwr_ctrl.rs8
-rw-r--r--embassy-stm32/src/subghz/rf_frequency.rs14
-rw-r--r--embassy-stm32/src/subghz/sleep_cfg.rs6
-rw-r--r--embassy-stm32/src/subghz/smps.rs2
-rw-r--r--embassy-stm32/src/subghz/stats.rs18
-rw-r--r--embassy-stm32/src/subghz/status.rs22
-rw-r--r--embassy-stm32/src/subghz/tcxo_mode.rs10
-rw-r--r--embassy-stm32/src/subghz/timeout.rs72
-rw-r--r--embassy-stm32/src/subghz/tx_params.rs8
-rw-r--r--embassy-stm32/src/subghz/value_error.rs16
24 files changed, 371 insertions, 967 deletions
diff --git a/embassy-stm32/src/subghz/bit_sync.rs b/embassy-stm32/src/subghz/bit_sync.rs
index 86b6c48f3..f3cba05f9 100644
--- a/embassy-stm32/src/subghz/bit_sync.rs
+++ b/embassy-stm32/src/subghz/bit_sync.rs
@@ -33,7 +33,7 @@ impl BitSync {
33 /// Enable simple bit synchronization. 33 /// Enable simple bit synchronization.
34 /// 34 ///
35 /// ``` 35 /// ```
36 /// use stm32wl_hal::subghz::BitSync; 36 /// use stm32wlxx_hal::subghz::BitSync;
37 /// 37 ///
38 /// const BIT_SYNC: BitSync = BitSync::RESET.set_simple_bit_sync_en(true); 38 /// const BIT_SYNC: BitSync = BitSync::RESET.set_simple_bit_sync_en(true);
39 /// # assert_eq!(u8::from(BIT_SYNC), 0x40u8); 39 /// # assert_eq!(u8::from(BIT_SYNC), 0x40u8);
@@ -53,7 +53,7 @@ impl BitSync {
53 /// # Example 53 /// # Example
54 /// 54 ///
55 /// ``` 55 /// ```
56 /// use stm32wl_hal::subghz::BitSync; 56 /// use stm32wlxx_hal::subghz::BitSync;
57 /// 57 ///
58 /// let bs: BitSync = BitSync::RESET; 58 /// let bs: BitSync = BitSync::RESET;
59 /// assert_eq!(bs.simple_bit_sync_en(), false); 59 /// assert_eq!(bs.simple_bit_sync_en(), false);
@@ -73,7 +73,7 @@ impl BitSync {
73 /// Invert receive data. 73 /// Invert receive data.
74 /// 74 ///
75 /// ``` 75 /// ```
76 /// use stm32wl_hal::subghz::BitSync; 76 /// use stm32wlxx_hal::subghz::BitSync;
77 /// 77 ///
78 /// const BIT_SYNC: BitSync = BitSync::RESET.set_rx_data_inv(true); 78 /// const BIT_SYNC: BitSync = BitSync::RESET.set_rx_data_inv(true);
79 /// # assert_eq!(u8::from(BIT_SYNC), 0x20u8); 79 /// # assert_eq!(u8::from(BIT_SYNC), 0x20u8);
@@ -93,7 +93,7 @@ impl BitSync {
93 /// # Example 93 /// # Example
94 /// 94 ///
95 /// ``` 95 /// ```
96 /// use stm32wl_hal::subghz::BitSync; 96 /// use stm32wlxx_hal::subghz::BitSync;
97 /// 97 ///
98 /// let bs: BitSync = BitSync::RESET; 98 /// let bs: BitSync = BitSync::RESET;
99 /// assert_eq!(bs.rx_data_inv(), false); 99 /// assert_eq!(bs.rx_data_inv(), false);
@@ -113,7 +113,7 @@ impl BitSync {
113 /// Enable normal bit synchronization. 113 /// Enable normal bit synchronization.
114 /// 114 ///
115 /// ``` 115 /// ```
116 /// use stm32wl_hal::subghz::BitSync; 116 /// use stm32wlxx_hal::subghz::BitSync;
117 /// 117 ///
118 /// const BIT_SYNC: BitSync = BitSync::RESET.set_norm_bit_sync_en(true); 118 /// const BIT_SYNC: BitSync = BitSync::RESET.set_norm_bit_sync_en(true);
119 /// # assert_eq!(u8::from(BIT_SYNC), 0x10u8); 119 /// # assert_eq!(u8::from(BIT_SYNC), 0x10u8);
@@ -133,7 +133,7 @@ impl BitSync {
133 /// # Example 133 /// # Example
134 /// 134 ///
135 /// ``` 135 /// ```
136 /// use stm32wl_hal::subghz::BitSync; 136 /// use stm32wlxx_hal::subghz::BitSync;
137 /// 137 ///
138 /// let bs: BitSync = BitSync::RESET; 138 /// let bs: BitSync = BitSync::RESET;
139 /// assert_eq!(bs.norm_bit_sync_en(), false); 139 /// assert_eq!(bs.norm_bit_sync_en(), false);
diff --git a/embassy-stm32/src/subghz/cad_params.rs b/embassy-stm32/src/subghz/cad_params.rs
index bbfe62c22..1d90ff706 100644
--- a/embassy-stm32/src/subghz/cad_params.rs
+++ b/embassy-stm32/src/subghz/cad_params.rs
@@ -75,7 +75,7 @@ impl CadParams {
75 /// # Example 75 /// # Example
76 /// 76 ///
77 /// ``` 77 /// ```
78 /// use stm32wl_hal::subghz::CadParams; 78 /// use stm32wlxx_hal::subghz::CadParams;
79 /// 79 ///
80 /// const CAD_PARAMS: CadParams = CadParams::new(); 80 /// const CAD_PARAMS: CadParams = CadParams::new();
81 /// assert_eq!(CAD_PARAMS, CadParams::default()); 81 /// assert_eq!(CAD_PARAMS, CadParams::default());
@@ -97,7 +97,7 @@ impl CadParams {
97 /// Set the number of symbols to 4. 97 /// Set the number of symbols to 4.
98 /// 98 ///
99 /// ``` 99 /// ```
100 /// use stm32wl_hal::subghz::{CadParams, NbCadSymbol}; 100 /// use stm32wlxx_hal::subghz::{CadParams, NbCadSymbol};
101 /// 101 ///
102 /// const CAD_PARAMS: CadParams = CadParams::new().set_num_symbol(NbCadSymbol::S4); 102 /// const CAD_PARAMS: CadParams = CadParams::new().set_num_symbol(NbCadSymbol::S4);
103 /// # assert_eq!(CAD_PARAMS.as_slice()[1], 0x2); 103 /// # assert_eq!(CAD_PARAMS.as_slice()[1], 0x2);
@@ -117,7 +117,7 @@ impl CadParams {
117 /// Setting the recommended value for a spreading factor of 7. 117 /// Setting the recommended value for a spreading factor of 7.
118 /// 118 ///
119 /// ``` 119 /// ```
120 /// use stm32wl_hal::subghz::CadParams; 120 /// use stm32wlxx_hal::subghz::CadParams;
121 /// 121 ///
122 /// const CAD_PARAMS: CadParams = CadParams::new().set_det_peak(0x20).set_det_min(0x10); 122 /// const CAD_PARAMS: CadParams = CadParams::new().set_det_peak(0x20).set_det_min(0x10);
123 /// # assert_eq!(CAD_PARAMS.as_slice()[2], 0x20); 123 /// # assert_eq!(CAD_PARAMS.as_slice()[2], 0x20);
@@ -140,7 +140,7 @@ impl CadParams {
140 /// Setting the recommended value for a spreading factor of 6. 140 /// Setting the recommended value for a spreading factor of 6.
141 /// 141 ///
142 /// ``` 142 /// ```
143 /// use stm32wl_hal::subghz::CadParams; 143 /// use stm32wlxx_hal::subghz::CadParams;
144 /// 144 ///
145 /// const CAD_PARAMS: CadParams = CadParams::new().set_det_peak(0x18).set_det_min(0x10); 145 /// const CAD_PARAMS: CadParams = CadParams::new().set_det_peak(0x18).set_det_min(0x10);
146 /// # assert_eq!(CAD_PARAMS.as_slice()[2], 0x18); 146 /// # assert_eq!(CAD_PARAMS.as_slice()[2], 0x18);
@@ -159,7 +159,7 @@ impl CadParams {
159 /// # Example 159 /// # Example
160 /// 160 ///
161 /// ``` 161 /// ```
162 /// use stm32wl_hal::subghz::{CadParams, ExitMode}; 162 /// use stm32wlxx_hal::subghz::{CadParams, ExitMode};
163 /// 163 ///
164 /// const CAD_PARAMS: CadParams = CadParams::new().set_exit_mode(ExitMode::Standby); 164 /// const CAD_PARAMS: CadParams = CadParams::new().set_exit_mode(ExitMode::Standby);
165 /// # assert_eq!(CAD_PARAMS.as_slice()[4], 0x00); 165 /// # assert_eq!(CAD_PARAMS.as_slice()[4], 0x00);
@@ -178,7 +178,7 @@ impl CadParams {
178 /// # Example 178 /// # Example
179 /// 179 ///
180 /// ``` 180 /// ```
181 /// use stm32wl_hal::subghz::{CadParams, ExitMode, Timeout}; 181 /// use stm32wlxx_hal::subghz::{CadParams, ExitMode, Timeout};
182 /// 182 ///
183 /// const TIMEOUT: Timeout = Timeout::from_raw(0x123456); 183 /// const TIMEOUT: Timeout = Timeout::from_raw(0x123456);
184 /// const CAD_PARAMS: CadParams = CadParams::new() 184 /// const CAD_PARAMS: CadParams = CadParams::new()
@@ -203,7 +203,7 @@ impl CadParams {
203 /// # Example 203 /// # Example
204 /// 204 ///
205 /// ``` 205 /// ```
206 /// use stm32wl_hal::subghz::{CadParams, ExitMode, NbCadSymbol, Timeout}; 206 /// use stm32wlxx_hal::subghz::{CadParams, ExitMode, NbCadSymbol, Timeout};
207 /// 207 ///
208 /// const TIMEOUT: Timeout = Timeout::from_raw(0x123456); 208 /// const TIMEOUT: Timeout = Timeout::from_raw(0x123456);
209 /// const CAD_PARAMS: CadParams = CadParams::new() 209 /// const CAD_PARAMS: CadParams = CadParams::new()
diff --git a/embassy-stm32/src/subghz/calibrate.rs b/embassy-stm32/src/subghz/calibrate.rs
index dc8c8069d..f94538f86 100644
--- a/embassy-stm32/src/subghz/calibrate.rs
+++ b/embassy-stm32/src/subghz/calibrate.rs
@@ -28,7 +28,7 @@ impl CalibrateImage {
28 /// # Example 28 /// # Example
29 /// 29 ///
30 /// ``` 30 /// ```
31 /// use stm32wl_hal::subghz::CalibrateImage; 31 /// use stm32wlxx_hal::subghz::CalibrateImage;
32 /// 32 ///
33 /// const CAL: CalibrateImage = CalibrateImage::new(0xE1, 0xE9); 33 /// const CAL: CalibrateImage = CalibrateImage::new(0xE1, 0xE9);
34 /// assert_eq!(CAL, CalibrateImage::ISM_902_928); 34 /// assert_eq!(CAL, CalibrateImage::ISM_902_928);
@@ -54,7 +54,7 @@ impl CalibrateImage {
54 /// Create an image calibration for the 430 - 440 MHz ISM band. 54 /// Create an image calibration for the 430 - 440 MHz ISM band.
55 /// 55 ///
56 /// ``` 56 /// ```
57 /// use stm32wl_hal::subghz::CalibrateImage; 57 /// use stm32wlxx_hal::subghz::CalibrateImage;
58 /// 58 ///
59 /// let cal: CalibrateImage = CalibrateImage::from_freq(428, 444); 59 /// let cal: CalibrateImage = CalibrateImage::from_freq(428, 444);
60 /// assert_eq!(cal, CalibrateImage::ISM_430_440); 60 /// assert_eq!(cal, CalibrateImage::ISM_430_440);
@@ -106,7 +106,7 @@ impl Calibrate {
106 /// # Example 106 /// # Example
107 /// 107 ///
108 /// ``` 108 /// ```
109 /// use stm32wl_hal::subghz::Calibrate; 109 /// use stm32wlxx_hal::subghz::Calibrate;
110 /// 110 ///
111 /// assert_eq!(Calibrate::Image.mask(), 0b0100_0000); 111 /// assert_eq!(Calibrate::Image.mask(), 0b0100_0000);
112 /// assert_eq!(Calibrate::AdcBulkP.mask(), 0b0010_0000); 112 /// assert_eq!(Calibrate::AdcBulkP.mask(), 0b0010_0000);
diff --git a/embassy-stm32/src/subghz/fallback_mode.rs b/embassy-stm32/src/subghz/fallback_mode.rs
index bc7204da8..50ec592f5 100644
--- a/embassy-stm32/src/subghz/fallback_mode.rs
+++ b/embassy-stm32/src/subghz/fallback_mode.rs
@@ -27,7 +27,7 @@ impl Default for FallbackMode {
27 /// # Example 27 /// # Example
28 /// 28 ///
29 /// ``` 29 /// ```
30 /// use stm32wl_hal::subghz::FallbackMode; 30 /// use stm32wlxx_hal::subghz::FallbackMode;
31 /// 31 ///
32 /// assert_eq!(FallbackMode::default(), FallbackMode::Standby); 32 /// assert_eq!(FallbackMode::default(), FallbackMode::Standby);
33 /// ``` 33 /// ```
diff --git a/embassy-stm32/src/subghz/hse_trim.rs b/embassy-stm32/src/subghz/hse_trim.rs
index 8ead73855..edfd52aca 100644
--- a/embassy-stm32/src/subghz/hse_trim.rs
+++ b/embassy-stm32/src/subghz/hse_trim.rs
@@ -26,7 +26,7 @@ impl HseTrim {
26 /// # Example 26 /// # Example
27 /// 27 ///
28 /// ``` 28 /// ```
29 /// use stm32wl_hal::subghz::HseTrim; 29 /// use stm32wlxx_hal::subghz::HseTrim;
30 /// 30 ///
31 /// assert_eq!(HseTrim::POR, HseTrim::default()); 31 /// assert_eq!(HseTrim::POR, HseTrim::default());
32 /// ``` 32 /// ```
@@ -39,7 +39,7 @@ impl HseTrim {
39 /// # Example 39 /// # Example
40 /// 40 ///
41 /// ``` 41 /// ```
42 /// use stm32wl_hal::subghz::HseTrim; 42 /// use stm32wlxx_hal::subghz::HseTrim;
43 /// 43 ///
44 /// assert_eq!(HseTrim::from_raw(0xFF), HseTrim::MAX); 44 /// assert_eq!(HseTrim::from_raw(0xFF), HseTrim::MAX);
45 /// assert_eq!(HseTrim::from_raw(0x2F), HseTrim::MAX); 45 /// assert_eq!(HseTrim::from_raw(0x2F), HseTrim::MAX);
@@ -61,7 +61,7 @@ impl HseTrim {
61 /// # Example 61 /// # Example
62 /// 62 ///
63 /// ``` 63 /// ```
64 /// use stm32wl_hal::subghz::HseTrim; 64 /// use stm32wlxx_hal::subghz::HseTrim;
65 /// 65 ///
66 /// assert!(HseTrim::from_farads(1.0).is_err()); 66 /// assert!(HseTrim::from_farads(1.0).is_err());
67 /// assert!(HseTrim::from_farads(1e-12).is_err()); 67 /// assert!(HseTrim::from_farads(1e-12).is_err());
@@ -84,7 +84,7 @@ impl HseTrim {
84 /// # Example 84 /// # Example
85 /// 85 ///
86 /// ``` 86 /// ```
87 /// use stm32wl_hal::subghz::HseTrim; 87 /// use stm32wlxx_hal::subghz::HseTrim;
88 /// 88 ///
89 /// assert_eq!((HseTrim::MAX.as_farads() * 10e11) as u8, 33); 89 /// assert_eq!((HseTrim::MAX.as_farads() * 10e11) as u8, 33);
90 /// assert_eq!((HseTrim::MIN.as_farads() * 10e11) as u8, 11); 90 /// assert_eq!((HseTrim::MIN.as_farads() * 10e11) as u8, 11);
diff --git a/embassy-stm32/src/subghz/irq.rs b/embassy-stm32/src/subghz/irq.rs
index b113095a7..b56b8ad94 100644
--- a/embassy-stm32/src/subghz/irq.rs
+++ b/embassy-stm32/src/subghz/irq.rs
@@ -99,7 +99,7 @@ impl Irq {
99 /// # Example 99 /// # Example
100 /// 100 ///
101 /// ``` 101 /// ```
102 /// use stm32wl_hal::subghz::Irq; 102 /// use stm32wlxx_hal::subghz::Irq;
103 /// 103 ///
104 /// assert_eq!(Irq::TxDone.mask(), 0x0001); 104 /// assert_eq!(Irq::TxDone.mask(), 0x0001);
105 /// assert_eq!(Irq::Timeout.mask(), 0x0200); 105 /// assert_eq!(Irq::Timeout.mask(), 0x0200);
@@ -128,7 +128,7 @@ impl CfgIrq {
128 /// # Example 128 /// # Example
129 /// 129 ///
130 /// ``` 130 /// ```
131 /// use stm32wl_hal::subghz::CfgIrq; 131 /// use stm32wlxx_hal::subghz::CfgIrq;
132 /// 132 ///
133 /// const IRQ_CFG: CfgIrq = CfgIrq::new(); 133 /// const IRQ_CFG: CfgIrq = CfgIrq::new();
134 /// ``` 134 /// ```
@@ -153,7 +153,7 @@ impl CfgIrq {
153 /// # Example 153 /// # Example
154 /// 154 ///
155 /// ``` 155 /// ```
156 /// use stm32wl_hal::subghz::{CfgIrq, Irq, IrqLine}; 156 /// use stm32wlxx_hal::subghz::{CfgIrq, Irq, IrqLine};
157 /// 157 ///
158 /// const IRQ_CFG: CfgIrq = CfgIrq::new() 158 /// const IRQ_CFG: CfgIrq = CfgIrq::new()
159 /// .irq_enable(IrqLine::Global, Irq::TxDone) 159 /// .irq_enable(IrqLine::Global, Irq::TxDone)
@@ -179,7 +179,7 @@ impl CfgIrq {
179 /// # Example 179 /// # Example
180 /// 180 ///
181 /// ``` 181 /// ```
182 /// use stm32wl_hal::subghz::{CfgIrq, Irq}; 182 /// use stm32wlxx_hal::subghz::{CfgIrq, Irq};
183 /// 183 ///
184 /// const IRQ_CFG: CfgIrq = CfgIrq::new() 184 /// const IRQ_CFG: CfgIrq = CfgIrq::new()
185 /// .irq_enable_all(Irq::TxDone) 185 /// .irq_enable_all(Irq::TxDone)
@@ -214,7 +214,7 @@ impl CfgIrq {
214 /// # Example 214 /// # Example
215 /// 215 ///
216 /// ``` 216 /// ```
217 /// use stm32wl_hal::subghz::{CfgIrq, Irq, IrqLine}; 217 /// use stm32wlxx_hal::subghz::{CfgIrq, Irq, IrqLine};
218 /// 218 ///
219 /// const IRQ_CFG: CfgIrq = CfgIrq::new() 219 /// const IRQ_CFG: CfgIrq = CfgIrq::new()
220 /// .irq_enable(IrqLine::Global, Irq::TxDone) 220 /// .irq_enable(IrqLine::Global, Irq::TxDone)
@@ -239,7 +239,7 @@ impl CfgIrq {
239 /// # Example 239 /// # Example
240 /// 240 ///
241 /// ``` 241 /// ```
242 /// use stm32wl_hal::subghz::{CfgIrq, Irq}; 242 /// use stm32wlxx_hal::subghz::{CfgIrq, Irq};
243 /// 243 ///
244 /// const IRQ_CFG: CfgIrq = CfgIrq::new() 244 /// const IRQ_CFG: CfgIrq = CfgIrq::new()
245 /// .irq_enable_all(Irq::TxDone) 245 /// .irq_enable_all(Irq::TxDone)
@@ -269,7 +269,7 @@ impl CfgIrq {
269 /// # Example 269 /// # Example
270 /// 270 ///
271 /// ``` 271 /// ```
272 /// use stm32wl_hal::subghz::{CfgIrq, Irq}; 272 /// use stm32wlxx_hal::subghz::{CfgIrq, Irq};
273 /// 273 ///
274 /// const IRQ_CFG: CfgIrq = CfgIrq::new() 274 /// const IRQ_CFG: CfgIrq = CfgIrq::new()
275 /// .irq_enable_all(Irq::TxDone) 275 /// .irq_enable_all(Irq::TxDone)
diff --git a/embassy-stm32/src/subghz/mod.rs b/embassy-stm32/src/subghz/mod.rs
index 3b64932fa..ce513ec63 100644
--- a/embassy-stm32/src/subghz/mod.rs
+++ b/embassy-stm32/src/subghz/mod.rs
@@ -1,5 +1,7 @@
1//! Sub-GHz radio operating in the 150 - 960 MHz ISM band 1//! Sub-GHz radio operating in the 150 - 960 MHz ISM band
2//! 2//!
3//! The main radio type is [`SubGhz`].
4//!
3//! ## LoRa user notice 5//! ## LoRa user notice
4//! 6//!
5//! The Sub-GHz radio may have an undocumented erratum, see this ST community 7//! The Sub-GHz radio may have an undocumented erratum, see this ST community
@@ -91,6 +93,7 @@ struct Nss {
91} 93}
92 94
93impl Nss { 95impl Nss {
96 #[inline(always)]
94 pub fn new() -> Nss { 97 pub fn new() -> Nss {
95 Self::clear(); 98 Self::clear();
96 Nss { _priv: () } 99 Nss { _priv: () }
@@ -359,137 +362,68 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
359 } 362 }
360 363
361 /// Set the initial value for generic packet CRC polynomial. 364 /// Set the initial value for generic packet CRC polynomial.
362 ///
363 /// # Example
364 ///
365 /// ```no_run
366 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
367 /// sg.set_crc_polynomial(0x1D0F)?;
368 /// # Ok::<(), embassy_stm32::subghz::Error>(())
369 /// ```
370 pub fn set_crc_polynomial(&mut self, polynomial: u16) -> Result<(), Error> { 365 pub fn set_crc_polynomial(&mut self, polynomial: u16) -> Result<(), Error> {
371 let bytes: [u8; 2] = polynomial.to_be_bytes(); 366 let bytes: [u8; 2] = polynomial.to_be_bytes();
372 self.write(wr_reg![GCRCINIRH, bytes[0], bytes[1]]) 367 self.write(wr_reg![GCRCINIRH, bytes[0], bytes[1]])
373 } 368 }
374 369
375 /// Set the generic packet CRC polynomial. 370 /// Set the generic packet CRC polynomial.
376 ///
377 /// # Example
378 ///
379 /// ```no_run
380 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
381 /// sg.set_initial_crc_polynomial(0x1021)?;
382 /// # Ok::<(), embassy_stm32::subghz::Error>(())
383 /// ```
384 pub fn set_initial_crc_polynomial(&mut self, polynomial: u16) -> Result<(), Error> { 371 pub fn set_initial_crc_polynomial(&mut self, polynomial: u16) -> Result<(), Error> {
385 let bytes: [u8; 2] = polynomial.to_be_bytes(); 372 let bytes: [u8; 2] = polynomial.to_be_bytes();
386 self.write(wr_reg![GCRCPOLRH, bytes[0], bytes[1]]) 373 self.write(wr_reg![GCRCPOLRH, bytes[0], bytes[1]])
387 } 374 }
388 375
389 /// Set the synchronization word registers. 376 /// Set the synchronization word registers.
390 ///
391 /// # Example
392 ///
393 /// ```no_run
394 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
395 /// const SYNC_WORD: [u8; 8] = [0x79, 0x80, 0x0C, 0xC0, 0x29, 0x95, 0xF8, 0x4A];
396 ///
397 /// sg.set_sync_word(&SYNC_WORD)?;
398 /// # Ok::<(), embassy_stm32::subghz::Error>(())
399 /// ```
400 pub fn set_sync_word(&mut self, sync_word: &[u8; 8]) -> Result<(), Error> { 377 pub fn set_sync_word(&mut self, sync_word: &[u8; 8]) -> Result<(), Error> {
401 self.write_register(Register::GSYNC7, sync_word) 378 self.write_register(Register::GSYNC7, sync_word)
402 } 379 }
403 380
404 /// Set the LoRa synchronization word registers. 381 /// Set the LoRa synchronization word registers.
405 ///
406 /// # Example
407 ///
408 /// ```no_run
409 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
410 /// use embassy_stm32::subghz::{LoRaSyncWord, PacketType};
411 ///
412 /// sg.set_packet_type(PacketType::LoRa)?;
413 /// sg.set_lora_sync_word(LoRaSyncWord::Public)?;
414 /// # Ok::<(), embassy_stm32::subghz::Error>(())
415 /// ```
416 pub fn set_lora_sync_word(&mut self, sync_word: LoRaSyncWord) -> Result<(), Error> { 382 pub fn set_lora_sync_word(&mut self, sync_word: LoRaSyncWord) -> Result<(), Error> {
417 let bytes: [u8; 2] = sync_word.bytes(); 383 let bytes: [u8; 2] = sync_word.bytes();
418 self.write(wr_reg![LSYNCH, bytes[0], bytes[1]]) 384 self.write(wr_reg![LSYNCH, bytes[0], bytes[1]])
419 } 385 }
420 386
421 /// Set the RX gain control. 387 /// Set the RX gain control.
422 ///
423 /// # Example
424 ///
425 /// ```no_run
426 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
427 /// use embassy_stm32::subghz::PMode;
428 ///
429 /// sg.set_rx_gain(PMode::Boost)?;
430 /// # Ok::<(), embassy_stm32::subghz::Error>(())
431 /// ```
432 pub fn set_rx_gain(&mut self, pmode: PMode) -> Result<(), Error> { 388 pub fn set_rx_gain(&mut self, pmode: PMode) -> Result<(), Error> {
433 self.write(wr_reg![RXGAINC, pmode as u8]) 389 self.write(wr_reg![RXGAINC, pmode as u8])
434 } 390 }
435 391
436 /// Set the power amplifier over current protection. 392 /// Set the power amplifier over current protection.
437 ///
438 /// # Example
439 ///
440 /// Maximum 60mA for LP PA mode.
441 ///
442 /// ```no_run
443 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
444 /// use embassy_stm32::subghz::Ocp;
445 ///
446 /// sg.set_pa_ocp(Ocp::Max60m)?;
447 /// # Ok::<(), embassy_stm32::subghz::Error>(())
448 /// ```
449 ///
450 /// Maximum 60mA for HP PA mode.
451 ///
452 /// ```no_run
453 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
454 /// use embassy_stm32::subghz::Ocp;
455 ///
456 /// sg.set_pa_ocp(Ocp::Max140m)?;
457 /// # Ok::<(), embassy_stm32::subghz::Error>(())
458 /// ```
459 pub fn set_pa_ocp(&mut self, ocp: Ocp) -> Result<(), Error> { 393 pub fn set_pa_ocp(&mut self, ocp: Ocp) -> Result<(), Error> {
460 self.write(wr_reg![PAOCP, ocp as u8]) 394 self.write(wr_reg![PAOCP, ocp as u8])
461 } 395 }
462 396
463 /// Set the HSE32 crystal OSC_IN load capaitor trimming. 397 /// Restart the radio RTC.
464 /// 398 ///
465 /// # Example 399 /// This is used to workaround an erratum for [`set_rx_duty_cycle`].
466 /// 400 ///
467 /// Set the trim to the lowest value. 401 /// [`set_rx_duty_cycle`]: crate::subghz::SubGhz::set_rx_duty_cycle
402 pub fn restart_rtc(&mut self) -> Result<(), Error> {
403 self.write(wr_reg![RTCCTLR, 0b1])
404 }
405
406 /// Set the radio real-time-clock period.
468 /// 407 ///
469 /// ```no_run 408 /// This is used to workaround an erratum for [`set_rx_duty_cycle`].
470 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
471 /// use embassy_stm32::subghz::HseTrim;
472 /// 409 ///
473 /// sg.set_hse_in_trim(HseTrim::MIN)?; 410 /// [`set_rx_duty_cycle`]: crate::subghz::SubGhz::set_rx_duty_cycle
474 /// # Ok::<(), embassy_stm32::subghz::Error>(()) 411 pub fn set_rtc_period(&mut self, period: Timeout) -> Result<(), Error> {
475 /// ``` 412 let tobits: u32 = period.into_bits();
413 self.write(wr_reg![
414 RTCPRDR2,
415 (tobits >> 16) as u8,
416 (tobits >> 8) as u8,
417 tobits as u8
418 ])
419 }
420
421 /// Set the HSE32 crystal OSC_IN load capacitor trimming.
476 pub fn set_hse_in_trim(&mut self, trim: HseTrim) -> Result<(), Error> { 422 pub fn set_hse_in_trim(&mut self, trim: HseTrim) -> Result<(), Error> {
477 self.write(wr_reg![HSEINTRIM, trim.into()]) 423 self.write(wr_reg![HSEINTRIM, trim.into()])
478 } 424 }
479 425
480 /// Set the HSE32 crystal OSC_OUT load capaitor trimming. 426 /// Set the HSE32 crystal OSC_OUT load capacitor trimming.
481 ///
482 /// # Example
483 ///
484 /// Set the trim to the lowest value.
485 ///
486 /// ```no_run
487 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
488 /// use embassy_stm32::subghz::HseTrim;
489 ///
490 /// sg.set_hse_out_trim(HseTrim::MIN)?;
491 /// # Ok::<(), embassy_stm32::subghz::Error>(())
492 /// ```
493 pub fn set_hse_out_trim(&mut self, trim: HseTrim) -> Result<(), Error> { 427 pub fn set_hse_out_trim(&mut self, trim: HseTrim) -> Result<(), Error> {
494 self.write(wr_reg![HSEOUTTRIM, trim.into()]) 428 self.write(wr_reg![HSEOUTTRIM, trim.into()])
495 } 429 }
@@ -510,6 +444,33 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
510 pub fn set_smps_drv(&mut self, drv: SmpsDrv) -> Result<(), Error> { 444 pub fn set_smps_drv(&mut self, drv: SmpsDrv) -> Result<(), Error> {
511 self.write(wr_reg![SMPSC2, (drv as u8) << 1]) 445 self.write(wr_reg![SMPSC2, (drv as u8) << 1])
512 } 446 }
447
448 /// Set the node address.
449 ///
450 /// Used with [`GenericPacketParams::set_addr_comp`] to filter packets based
451 /// on node address.
452 pub fn set_node_addr(&mut self, addr: u8) -> Result<(), Error> {
453 self.write(wr_reg![NODE, addr])
454 }
455
456 /// Set the broadcast address.
457 ///
458 /// Used with [`GenericPacketParams::set_addr_comp`] to filter packets based
459 /// on broadcast address.
460 pub fn set_broadcast_addr(&mut self, addr: u8) -> Result<(), Error> {
461 self.write(wr_reg![BROADCAST, addr])
462 }
463
464 /// Set both the broadcast address and node address.
465 ///
466 /// This is a combination of [`set_node_addr`] and [`set_broadcast_addr`]
467 /// in a single SPI transfer.
468 ///
469 /// [`set_node_addr`]: Self::set_node_addr
470 /// [`set_broadcast_addr`]: Self::set_broadcast_addr
471 pub fn set_addrs(&mut self, node: u8, broadcast: u8) -> Result<(), Error> {
472 self.write(wr_reg![NODE, node, broadcast])
473 }
513} 474}
514 475
515// 5.8.3 476// 5.8.3
@@ -548,38 +509,17 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
548 /// # Ok::<(), embassy_stm32::subghz::Error>(()) 509 /// # Ok::<(), embassy_stm32::subghz::Error>(())
549 /// ``` 510 /// ```
550 pub unsafe fn set_sleep(&mut self, cfg: SleepCfg) -> Result<(), Error> { 511 pub unsafe fn set_sleep(&mut self, cfg: SleepCfg) -> Result<(), Error> {
551 self.write(&[OpCode::SetSleep as u8, u8::from(cfg)]) 512 // poll for busy before, but not after
513 // radio idles with busy high while in sleep mode
514 self.poll_not_busy();
515 {
516 let _nss: Nss = Nss::new();
517 self.spi.blocking_write(&[OpCode::SetSleep as u8, u8::from(cfg)])?;
518 }
519 Ok(())
552 } 520 }
553 521
554 /// Put the radio into standby mode. 522 /// Put the radio into standby mode.
555 ///
556 /// # Examples
557 ///
558 /// Put the radio into standby mode using the RC 13MHz clock.
559 ///
560 /// ```no_run
561 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
562 /// use embassy_stm32::subghz::StandbyClk;
563 ///
564 /// sg.set_standby(StandbyClk::Rc)?;
565 /// # Ok::<(), embassy_stm32::subghz::Error>(())
566 /// ```
567 ///
568 /// Put the radio into standby mode using the HSE32 clock.
569 ///
570 /// ```no_run
571 /// # let mut dp = unsafe { embassy_stm32::pac::Peripherals::steal() };
572 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
573 /// use embassy_stm32::subghz::StandbyClk;
574 ///
575 /// dp.RCC
576 /// .cr
577 /// .modify(|_, w| w.hseon().enabled().hsebyppwr().vddtcxo());
578 /// while dp.RCC.cr.read().hserdy().is_not_ready() {}
579 ///
580 /// sg.set_standby(StandbyClk::Hse)?;
581 /// # Ok::<(), embassy_stm32::subghz::Error>(())
582 /// ```
583 pub fn set_standby(&mut self, standby_clk: StandbyClk) -> Result<(), Error> { 523 pub fn set_standby(&mut self, standby_clk: StandbyClk) -> Result<(), Error> {
584 self.write(&[OpCode::SetStandby as u8, u8::from(standby_clk)]) 524 self.write(&[OpCode::SetStandby as u8, u8::from(standby_clk)])
585 } 525 }
@@ -593,35 +533,12 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
593 /// I honestly do not see any use for it. Please update this description 533 /// I honestly do not see any use for it. Please update this description
594 /// if you know more than I do. 534 /// if you know more than I do.
595 /// 535 ///
596 /// # Example
597 ///
598 /// ```no_run
599 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
600 /// use embassy_stm32::subghz::RfFreq;
601 ///
602 /// sg.set_rf_frequency(&RfFreq::from_frequency(915_000_000))?;
603 /// sg.set_fs()?;
604 /// # Ok::<(), embassy_stm32::subghz::Error>(())
605 /// ```
606 ///
607 /// [`set_rf_frequency`]: crate::subghz::SubGhz::set_rf_frequency 536 /// [`set_rf_frequency`]: crate::subghz::SubGhz::set_rf_frequency
608 pub fn set_fs(&mut self) -> Result<(), Error> { 537 pub fn set_fs(&mut self) -> Result<(), Error> {
609 self.write(&[OpCode::SetFs.into()]) 538 self.write(&[OpCode::SetFs.into()])
610 } 539 }
611 540
612 /// Set the sub-GHz radio in TX mode. 541 /// Setup the sub-GHz radio for TX.
613 ///
614 /// # Example
615 ///
616 /// Transmit with no timeout.
617 ///
618 /// ```no_run
619 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
620 /// use embassy_stm32::subghz::Timeout;
621 ///
622 /// sg.set_tx(Timeout::DISABLED)?;
623 /// # Ok::<(), embassy_stm32::subghz::Error>(())
624 /// ```
625 pub fn set_tx(&mut self, timeout: Timeout) -> Result<(), Error> { 542 pub fn set_tx(&mut self, timeout: Timeout) -> Result<(), Error> {
626 let tobits: u32 = timeout.into_bits(); 543 let tobits: u32 = timeout.into_bits();
627 self.write(&[ 544 self.write(&[
@@ -632,20 +549,7 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
632 ]) 549 ])
633 } 550 }
634 551
635 /// Set the sub-GHz radio in RX mode. 552 /// Setup the sub-GHz radio for RX.
636 ///
637 /// # Example
638 ///
639 /// Receive with a 1 second timeout.
640 ///
641 /// ```no_run
642 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
643 /// use core::time::Duration;
644 /// use embassy_stm32::subghz::Timeout;
645 ///
646 /// sg.set_rx(Timeout::from_duration_sat(Duration::from_secs(1)))?;
647 /// # Ok::<(), embassy_stm32::subghz::Error>(())
648 /// ```
649 pub fn set_rx(&mut self, timeout: Timeout) -> Result<(), Error> { 553 pub fn set_rx(&mut self, timeout: Timeout) -> Result<(), Error> {
650 let tobits: u32 = timeout.into_bits(); 554 let tobits: u32 = timeout.into_bits();
651 self.write(&[ 555 self.write(&[
@@ -657,18 +561,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
657 } 561 }
658 562
659 /// Allows selection of the receiver event which stops the RX timeout timer. 563 /// Allows selection of the receiver event which stops the RX timeout timer.
660 ///
661 /// # Example
662 ///
663 /// Set the RX timeout timer to stop on preamble detection.
664 ///
665 /// ```no_run
666 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
667 /// use embassy_stm32::subghz::RxTimeoutStop;
668 ///
669 /// sg.set_rx_timeout_stop(RxTimeoutStop::Preamble)?;
670 /// # Ok::<(), embassy_stm32::subghz::Error>(())
671 /// ```
672 pub fn set_rx_timeout_stop(&mut self, rx_timeout_stop: RxTimeoutStop) -> Result<(), Error> { 564 pub fn set_rx_timeout_stop(&mut self, rx_timeout_stop: RxTimeoutStop) -> Result<(), Error> {
673 self.write(&[OpCode::SetStopRxTimerOnPreamble.into(), rx_timeout_stop.into()]) 565 self.write(&[OpCode::SetStopRxTimerOnPreamble.into(), rx_timeout_stop.into()])
674 } 566 }
@@ -701,23 +593,39 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
701 /// * if [`set_standby`] is sent during the listening period or after the 593 /// * if [`set_standby`] is sent during the listening period or after the
702 /// sub-GHz has been requested to exit sleep mode by sub-GHz radio SPI NSS 594 /// sub-GHz has been requested to exit sleep mode by sub-GHz radio SPI NSS
703 /// 595 ///
704 /// # Example 596 /// # Erratum
597 ///
598 /// When a preamble is detected the radio should restart the RX timeout
599 /// with a value of 2 × `rx_period` + `sleep_period`.
600 /// Instead the radio erroneously uses `sleep_period`.
601 ///
602 /// To workaround this use [`restart_rtc`] and [`set_rtc_period`] to
603 /// reprogram the radio timeout to 2 × `rx_period` + `sleep_period`.
604 ///
605 /// Use code similar to this in the [`PreambleDetected`] interrupt handler.
705 /// 606 ///
706 /// ```no_run 607 /// ```no_run
707 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); 608 /// # let rx_period: Timeout = Timeout::from_millis_sat(100);
708 /// use core::time::Duration; 609 /// # let sleep_period: Timeout = Timeout::from_millis_sat(100);
709 /// use embassy_stm32::subghz::{StandbyClk, Timeout}; 610 /// # let mut sg = unsafe { stm32wlxx_hal::subghz::SubGhz::steal() };
611 /// use stm32wlxx_hal::subghz::Timeout;
710 /// 612 ///
711 /// const RX_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_millis(100)); 613 /// let period: Timeout = rx_period
712 /// const SLEEP_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_secs(1)); 614 /// .saturating_add(rx_period)
615 /// .saturating_add(sleep_period);
713 /// 616 ///
714 /// sg.set_standby(StandbyClk::Rc)?; 617 /// sg.set_rtc_period(period)?;
715 /// sg.set_rx_duty_cycle(RX_PERIOD, SLEEP_PERIOD)?; 618 /// sg.restart_rtc()?;
716 /// # Ok::<(), embassy_stm32::subghz::Error>(()) 619 /// # Ok::<(), stm32wlxx_hal::subghz::Error>(())
717 /// ``` 620 /// ```
718 /// 621 ///
622 /// Please read the erratum for more details.
623 ///
624 /// [`PreambleDetected`]: crate::subghz::Irq::PreambleDetected
625 /// [`restart_rtc`]: crate::subghz::SubGhz::restart_rtc
719 /// [`RxDone`]: crate::subghz::Irq::RxDone 626 /// [`RxDone`]: crate::subghz::Irq::RxDone
720 /// [`set_rf_frequency`]: crate::subghz::SubGhz::set_rf_frequency 627 /// [`set_rf_frequency`]: crate::subghz::SubGhz::set_rf_frequency
628 /// [`set_rtc_period`]: crate::subghz::SubGhz::set_rtc_period
721 /// [`set_standby`]: crate::subghz::SubGhz::set_standby 629 /// [`set_standby`]: crate::subghz::SubGhz::set_standby
722 pub fn set_rx_duty_cycle(&mut self, rx_period: Timeout, sleep_period: Timeout) -> Result<(), Error> { 630 pub fn set_rx_duty_cycle(&mut self, rx_period: Timeout, sleep_period: Timeout) -> Result<(), Error> {
723 let rx_period_bits: u32 = rx_period.into_bits(); 631 let rx_period_bits: u32 = rx_period.into_bits();
@@ -745,27 +653,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
745 /// The length of the search must be configured with [`set_cad_params`] 653 /// The length of the search must be configured with [`set_cad_params`]
746 /// prior to calling `set_cad`. 654 /// prior to calling `set_cad`.
747 /// 655 ///
748 /// # Example
749 ///
750 /// ```no_run
751 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
752 /// use core::time::Duration;
753 /// use embassy_stm32::subghz::{CadParams, ExitMode, NbCadSymbol, StandbyClk, Timeout};
754 ///
755 /// const RX_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_millis(100));
756 /// const SLEEP_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_secs(1));
757 /// const CAD_PARAMS: CadParams = CadParams::new()
758 /// .set_num_symbol(NbCadSymbol::S4)
759 /// .set_det_peak(0x18)
760 /// .set_det_min(0x10)
761 /// .set_exit_mode(ExitMode::Standby);
762 ///
763 /// sg.set_standby(StandbyClk::Rc)?;
764 /// sg.set_cad_params(&CAD_PARAMS)?;
765 /// sg.set_cad()?;
766 /// # Ok::<(), embassy_stm32::subghz::Error>(())
767 /// ```
768 ///
769 /// [`set_cad_params`]: crate::subghz::SubGhz::set_cad_params 656 /// [`set_cad_params`]: crate::subghz::SubGhz::set_cad_params
770 pub fn set_cad(&mut self) -> Result<(), Error> { 657 pub fn set_cad(&mut self) -> Result<(), Error> {
771 self.write(&[OpCode::SetCad.into()]) 658 self.write(&[OpCode::SetCad.into()])
@@ -775,14 +662,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
775 /// 662 ///
776 /// The sub-GHz radio remains in continuous transmit tone mode until a mode 663 /// The sub-GHz radio remains in continuous transmit tone mode until a mode
777 /// configuration command is received. 664 /// configuration command is received.
778 ///
779 /// # Example
780 ///
781 /// ```no_run
782 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
783 /// sg.set_tx_continuous_wave()?;
784 /// # Ok::<(), embassy_stm32::subghz::Error>(())
785 /// ```
786 pub fn set_tx_continuous_wave(&mut self) -> Result<(), Error> { 665 pub fn set_tx_continuous_wave(&mut self) -> Result<(), Error> {
787 self.write(&[OpCode::SetTxContinuousWave as u8]) 666 self.write(&[OpCode::SetTxContinuousWave as u8])
788 } 667 }
@@ -794,14 +673,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
794 /// The preamble is symbol 0 in LoRa modulation. 673 /// The preamble is symbol 0 in LoRa modulation.
795 /// The sub-GHz radio remains in infinite preamble mode until a mode 674 /// The sub-GHz radio remains in infinite preamble mode until a mode
796 /// configuration command is received. 675 /// configuration command is received.
797 ///
798 /// # Example
799 ///
800 /// ```no_run
801 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
802 /// sg.set_tx_continuous_preamble()?;
803 /// # Ok::<(), embassy_stm32::subghz::Error>(())
804 /// ```
805 pub fn set_tx_continuous_preamble(&mut self) -> Result<(), Error> { 676 pub fn set_tx_continuous_preamble(&mut self) -> Result<(), Error> {
806 self.write(&[OpCode::SetTxContinuousPreamble as u8]) 677 self.write(&[OpCode::SetTxContinuousPreamble as u8])
807 } 678 }
@@ -811,342 +682,80 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
811/// Radio configuration commands 682/// Radio configuration commands
812impl<'d> SubGhz<'d, NoDma, NoDma> { 683impl<'d> SubGhz<'d, NoDma, NoDma> {
813 /// Set the packet type (modulation scheme). 684 /// Set the packet type (modulation scheme).
814 ///
815 /// # Examples
816 ///
817 /// FSK (frequency shift keying):
818 ///
819 /// ```no_run
820 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
821 /// use embassy_stm32::subghz::PacketType;
822 ///
823 /// sg.set_packet_type(PacketType::Fsk)?;
824 /// # Ok::<(), embassy_stm32::subghz::Error>(())
825 /// ```
826 ///
827 /// LoRa (long range):
828 ///
829 /// ```no_run
830 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
831 /// use embassy_stm32::subghz::PacketType;
832 ///
833 /// sg.set_packet_type(PacketType::LoRa)?;
834 /// # Ok::<(), embassy_stm32::subghz::Error>(())
835 /// ```
836 ///
837 /// BPSK (binary phase shift keying):
838 ///
839 /// ```no_run
840 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
841 /// use embassy_stm32::subghz::PacketType;
842 ///
843 /// sg.set_packet_type(PacketType::Bpsk)?;
844 /// # Ok::<(), embassy_stm32::subghz::Error>(())
845 /// ```
846 ///
847 /// MSK (minimum shift keying):
848 ///
849 /// ```no_run
850 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
851 /// use embassy_stm32::subghz::PacketType;
852 ///
853 /// sg.set_packet_type(PacketType::Msk)?;
854 /// # Ok::<(), embassy_stm32::subghz::Error>(())
855 /// ```
856 pub fn set_packet_type(&mut self, packet_type: PacketType) -> Result<(), Error> { 685 pub fn set_packet_type(&mut self, packet_type: PacketType) -> Result<(), Error> {
857 self.write(&[OpCode::SetPacketType as u8, packet_type as u8]) 686 self.write(&[OpCode::SetPacketType as u8, packet_type as u8])
858 } 687 }
859 688
860 /// Get the packet type. 689 /// Get the packet type.
861 ///
862 /// # Example
863 ///
864 /// ```no_run
865 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
866 /// use embassy_stm32::subghz::PacketType;
867 ///
868 /// sg.set_packet_type(PacketType::LoRa)?;
869 /// assert_eq!(sg.packet_type()?, Ok(PacketType::LoRa));
870 /// # Ok::<(), embassy_stm32::subghz::Error>(())
871 /// ```
872 pub fn packet_type(&mut self) -> Result<Result<PacketType, u8>, Error> { 690 pub fn packet_type(&mut self) -> Result<Result<PacketType, u8>, Error> {
873 let pkt_type: [u8; 2] = self.read_n(OpCode::GetPacketType)?; 691 let pkt_type: [u8; 2] = self.read_n(OpCode::GetPacketType)?;
874 Ok(PacketType::from_raw(pkt_type[1])) 692 Ok(PacketType::from_raw(pkt_type[1]))
875 } 693 }
876 694
877 /// Set the radio carrier frequency. 695 /// Set the radio carrier frequency.
878 ///
879 /// # Example
880 ///
881 /// Set the frequency to 915MHz (Australia and North America).
882 ///
883 /// ```no_run
884 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
885 /// use embassy_stm32::subghz::RfFreq;
886 ///
887 /// sg.set_rf_frequency(&RfFreq::F915)?;
888 /// # Ok::<(), embassy_stm32::subghz::Error>(())
889 /// ```
890 pub fn set_rf_frequency(&mut self, freq: &RfFreq) -> Result<(), Error> { 696 pub fn set_rf_frequency(&mut self, freq: &RfFreq) -> Result<(), Error> {
891 self.write(freq.as_slice()) 697 self.write(freq.as_slice())
892 } 698 }
893 699
894 /// Set the transmit output power and the PA ramp-up time. 700 /// Set the transmit output power and the PA ramp-up time.
895 ///
896 /// # Example
897 ///
898 /// Set the output power to +10 dBm (low power mode) and a ramp up time of
899 /// 40 microseconds.
900 ///
901 /// ```no_run
902 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
903 /// use embassy_stm32::subghz::{PaConfig, PaSel, RampTime, TxParams};
904 ///
905 /// const TX_PARAMS: TxParams = TxParams::new()
906 /// .set_ramp_time(RampTime::Micros40)
907 /// .set_power(0x0D);
908 /// const PA_CONFIG: PaConfig = PaConfig::new()
909 /// .set_pa(PaSel::Lp)
910 /// .set_pa_duty_cycle(0x1)
911 /// .set_hp_max(0x0);
912 ///
913 /// sg.set_pa_config(&PA_CONFIG)?;
914 /// sg.set_tx_params(&TX_PARAMS)?;
915 /// # Ok::<(), embassy_stm32::subghz::Error>(())
916 /// ```
917 pub fn set_tx_params(&mut self, params: &TxParams) -> Result<(), Error> { 701 pub fn set_tx_params(&mut self, params: &TxParams) -> Result<(), Error> {
918 self.write(params.as_slice()) 702 self.write(params.as_slice())
919 } 703 }
920 704
921 /// Power amplifier configuation. 705 /// Power amplifier configuration.
922 /// 706 ///
923 /// Used to customize the maximum output power and efficiency. 707 /// Used to customize the maximum output power and efficiency.
924 ///
925 /// # Example
926 ///
927 /// Set the output power to +22 dBm (high power mode) and a ramp up time of
928 /// 200 microseconds.
929 ///
930 /// ```no_run
931 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
932 /// use embassy_stm32::subghz::{PaConfig, PaSel, RampTime, TxParams};
933 ///
934 /// const TX_PARAMS: TxParams = TxParams::new()
935 /// .set_ramp_time(RampTime::Micros200)
936 /// .set_power(0x16);
937 /// const PA_CONFIG: PaConfig = PaConfig::new()
938 /// .set_pa(PaSel::Hp)
939 /// .set_pa_duty_cycle(0x4)
940 /// .set_hp_max(0x7);
941 ///
942 /// sg.set_pa_config(&PA_CONFIG)?;
943 /// sg.set_tx_params(&TX_PARAMS)?;
944 /// # Ok::<(), embassy_stm32::subghz::Error>(())
945 /// ```
946 pub fn set_pa_config(&mut self, pa_config: &PaConfig) -> Result<(), Error> { 708 pub fn set_pa_config(&mut self, pa_config: &PaConfig) -> Result<(), Error> {
947 self.write(pa_config.as_slice()) 709 self.write(pa_config.as_slice())
948 } 710 }
949 711
950 /// Operating mode to enter after a successful packet transmission or 712 /// Operating mode to enter after a successful packet transmission or
951 /// packet reception. 713 /// packet reception.
952 ///
953 /// # Example
954 ///
955 /// Set the fallback mode to standby mode.
956 ///
957 /// ```no_run
958 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
959 /// use embassy_stm32::subghz::FallbackMode;
960 ///
961 /// sg.set_tx_rx_fallback_mode(FallbackMode::Standby)?;
962 /// # Ok::<(), embassy_stm32::subghz::Error>(())
963 /// ```
964 pub fn set_tx_rx_fallback_mode(&mut self, fm: FallbackMode) -> Result<(), Error> { 714 pub fn set_tx_rx_fallback_mode(&mut self, fm: FallbackMode) -> Result<(), Error> {
965 self.write(&[OpCode::SetTxRxFallbackMode as u8, fm as u8]) 715 self.write(&[OpCode::SetTxRxFallbackMode as u8, fm as u8])
966 } 716 }
967 717
968 /// Set channel activity detection (CAD) parameters. 718 /// Set channel activity detection (CAD) parameters.
969 ///
970 /// # Example
971 ///
972 /// ```no_run
973 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
974 /// use core::time::Duration;
975 /// use embassy_stm32::subghz::{CadParams, ExitMode, NbCadSymbol, StandbyClk, Timeout};
976 ///
977 /// const RX_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_millis(100));
978 /// const SLEEP_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_secs(1));
979 /// const CAD_PARAMS: CadParams = CadParams::new()
980 /// .set_num_symbol(NbCadSymbol::S4)
981 /// .set_det_peak(0x18)
982 /// .set_det_min(0x10)
983 /// .set_exit_mode(ExitMode::Standby);
984 ///
985 /// sg.set_standby(StandbyClk::Rc)?;
986 /// sg.set_cad_params(&CAD_PARAMS)?;
987 /// sg.set_cad()?;
988 /// # Ok::<(), embassy_stm32::subghz::Error>(())
989 /// ```
990 pub fn set_cad_params(&mut self, params: &CadParams) -> Result<(), Error> { 719 pub fn set_cad_params(&mut self, params: &CadParams) -> Result<(), Error> {
991 self.write(params.as_slice()) 720 self.write(params.as_slice())
992 } 721 }
993 722
994 /// Set the data buffer base address for the packet handling in TX and RX. 723 /// Set the data buffer base address for the packet handling in TX and RX.
995 /// 724 ///
996 /// There is a 256B TX buffer and a 256B RX buffer. 725 /// There is a single buffer for both TX and RX.
997 /// These buffers are not memory mapped, they are accessed via the 726 /// The buffer is not memory mapped, it is accessed via the
998 /// [`read_buffer`] and [`write_buffer`] methods. 727 /// [`read_buffer`](SubGhz::read_buffer) and
999 /// 728 /// [`write_buffer`](SubGhz::write_buffer) methods.
1000 /// # Example
1001 ///
1002 /// Set the TX and RX buffer base to the start.
1003 ///
1004 /// ```no_run
1005 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1006 /// sg.set_buffer_base_address(0, 0)?;
1007 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1008 /// ```
1009 ///
1010 /// [`read_buffer`]: SubGhz::read_buffer
1011 /// [`write_buffer`]: SubGhz::write_buffer
1012 pub fn set_buffer_base_address(&mut self, tx: u8, rx: u8) -> Result<(), Error> { 729 pub fn set_buffer_base_address(&mut self, tx: u8, rx: u8) -> Result<(), Error> {
1013 self.write(&[OpCode::SetBufferBaseAddress as u8, tx, rx]) 730 self.write(&[OpCode::SetBufferBaseAddress as u8, tx, rx])
1014 } 731 }
1015 732
1016 /// Set the (G)FSK modulation parameters. 733 /// Set the (G)FSK modulation parameters.
1017 ///
1018 /// # Example
1019 ///
1020 /// ```no_run
1021 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1022 /// use embassy_stm32::subghz::{
1023 /// FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape, PacketType,
1024 /// };
1025 ///
1026 /// const BITRATE: FskBitrate = FskBitrate::from_bps(32_000);
1027 /// const PULSE_SHAPE: FskPulseShape = FskPulseShape::Bt03;
1028 /// const BW: FskBandwidth = FskBandwidth::Bw9;
1029 /// const FDEV: FskFdev = FskFdev::from_hertz(31_250);
1030 ///
1031 /// const MOD_PARAMS: FskModParams = FskModParams::new()
1032 /// .set_bitrate(BITRATE)
1033 /// .set_pulse_shape(PULSE_SHAPE)
1034 /// .set_bandwidth(BW)
1035 /// .set_fdev(FDEV);
1036 ///
1037 /// sg.set_packet_type(PacketType::Fsk)?;
1038 /// sg.set_fsk_mod_params(&MOD_PARAMS)?;
1039 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1040 /// ```
1041 pub fn set_fsk_mod_params(&mut self, params: &FskModParams) -> Result<(), Error> { 734 pub fn set_fsk_mod_params(&mut self, params: &FskModParams) -> Result<(), Error> {
1042 self.write(params.as_slice()) 735 self.write(params.as_slice())
1043 } 736 }
1044 737
1045 /// Set the LoRa modulation parameters. 738 /// Set the LoRa modulation parameters.
1046 ///
1047 /// # Example
1048 ///
1049 /// ```no_run
1050 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1051 /// use embassy_stm32::subghz::{
1052 /// CodingRate, LoRaBandwidth, LoRaModParams, PacketType, SpreadingFactor,
1053 /// };
1054 ///
1055 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new()
1056 /// .set_sf(SpreadingFactor::Sf7)
1057 /// .set_bw(LoRaBandwidth::Bw125)
1058 /// .set_cr(CodingRate::Cr45)
1059 /// .set_ldro_en(false);
1060 ///
1061 /// sg.set_packet_type(PacketType::LoRa)?;
1062 /// sg.set_lora_mod_params(&MOD_PARAMS)?;
1063 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1064 /// ```
1065 pub fn set_lora_mod_params(&mut self, params: &LoRaModParams) -> Result<(), Error> { 739 pub fn set_lora_mod_params(&mut self, params: &LoRaModParams) -> Result<(), Error> {
1066 self.write(params.as_slice()) 740 self.write(params.as_slice())
1067 } 741 }
1068 742
1069 /// Set the BPSK modulation parameters. 743 /// Set the BPSK modulation parameters.
1070 ///
1071 /// # Example
1072 ///
1073 /// ```no_run
1074 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1075 /// use embassy_stm32::subghz::{BpskModParams, FskBitrate, PacketType};
1076 ///
1077 /// const MOD_PARAMS: BpskModParams = BpskModParams::new().set_bitrate(FskBitrate::from_bps(600));
1078 ///
1079 /// sg.set_packet_type(PacketType::Bpsk)?;
1080 /// sg.set_bpsk_mod_params(&MOD_PARAMS)?;
1081 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1082 /// ```
1083 pub fn set_bpsk_mod_params(&mut self, params: &BpskModParams) -> Result<(), Error> { 744 pub fn set_bpsk_mod_params(&mut self, params: &BpskModParams) -> Result<(), Error> {
1084 self.write(params.as_slice()) 745 self.write(params.as_slice())
1085 } 746 }
1086 747
1087 /// Set the generic (FSK) packet parameters. 748 /// Set the generic (FSK) packet parameters.
1088 ///
1089 /// # Example
1090 ///
1091 /// ```no_run
1092 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1093 /// use embassy_stm32::subghz::{
1094 /// AddrComp, CrcType, GenericPacketParams, HeaderType, PacketType, PreambleDetection,
1095 /// };
1096 ///
1097 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new()
1098 /// .set_preamble_len(8)
1099 /// .set_preamble_detection(PreambleDetection::Disabled)
1100 /// .set_sync_word_len(2)
1101 /// .set_addr_comp(AddrComp::Disabled)
1102 /// .set_header_type(HeaderType::Fixed)
1103 /// .set_payload_len(128)
1104 /// .set_crc_type(CrcType::Byte2)
1105 /// .set_whitening_enable(true);
1106 ///
1107 /// sg.set_packet_type(PacketType::Fsk)?;
1108 /// sg.set_packet_params(&PKT_PARAMS)?;
1109 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1110 /// ```
1111 pub fn set_packet_params(&mut self, params: &GenericPacketParams) -> Result<(), Error> { 749 pub fn set_packet_params(&mut self, params: &GenericPacketParams) -> Result<(), Error> {
1112 self.write(params.as_slice()) 750 self.write(params.as_slice())
1113 } 751 }
1114 752
1115 /// Set the BPSK packet parameters. 753 /// Set the BPSK packet parameters.
1116 ///
1117 /// # Example
1118 ///
1119 /// ```no_run
1120 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1121 /// use embassy_stm32::subghz::{BpskPacketParams, PacketType};
1122 ///
1123 /// sg.set_packet_type(PacketType::Bpsk)?;
1124 /// sg.set_bpsk_packet_params(&BpskPacketParams::new().set_payload_len(64))?;
1125 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1126 /// ```
1127 pub fn set_bpsk_packet_params(&mut self, params: &BpskPacketParams) -> Result<(), Error> { 754 pub fn set_bpsk_packet_params(&mut self, params: &BpskPacketParams) -> Result<(), Error> {
1128 self.write(params.as_slice()) 755 self.write(params.as_slice())
1129 } 756 }
1130 757
1131 /// Set the LoRa packet parameters. 758 /// Set the LoRa packet parameters.
1132 ///
1133 /// # Example
1134 ///
1135 /// ```no_run
1136 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1137 /// use embassy_stm32::subghz::{HeaderType, LoRaPacketParams, PacketType};
1138 ///
1139 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new()
1140 /// .set_preamble_len(5 * 8)
1141 /// .set_header_type(HeaderType::Fixed)
1142 /// .set_payload_len(64)
1143 /// .set_crc_en(true)
1144 /// .set_invert_iq(true);
1145 ///
1146 /// sg.set_packet_type(PacketType::LoRa)?;
1147 /// sg.set_lora_packet_params(&PKT_PARAMS)?;
1148 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1149 /// ```
1150 pub fn set_lora_packet_params(&mut self, params: &LoRaPacketParams) -> Result<(), Error> { 759 pub fn set_lora_packet_params(&mut self, params: &LoRaPacketParams) -> Result<(), Error> {
1151 self.write(params.as_slice()) 760 self.write(params.as_slice())
1152 } 761 }
@@ -1155,19 +764,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1155 /// reception of a LoRa packet. 764 /// reception of a LoRa packet.
1156 /// 765 ///
1157 /// Packet reception is started after `n` + 1 symbols are detected. 766 /// Packet reception is started after `n` + 1 symbols are detected.
1158 ///
1159 /// # Example
1160 ///
1161 /// Start reception after a single LoRa word is detected
1162 ///
1163 /// ```no_run
1164 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1165 ///
1166 /// // ... setup the radio for LoRa RX
1167 ///
1168 /// sg.set_lora_symb_timeout(0)?;
1169 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1170 /// ```
1171 pub fn set_lora_symb_timeout(&mut self, n: u8) -> Result<(), Error> { 767 pub fn set_lora_symb_timeout(&mut self, n: u8) -> Result<(), Error> {
1172 self.write(&[OpCode::SetLoRaSymbTimeout.into(), n]) 768 self.write(&[OpCode::SetLoRaSymbTimeout.into(), n])
1173 } 769 }
@@ -1182,14 +778,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1182 /// will return reserved values. 778 /// will return reserved values.
1183 /// See this thread in the ST community for details: [link] 779 /// See this thread in the ST community for details: [link]
1184 /// 780 ///
1185 /// ```no_run
1186 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1187 /// use embassy_stm32::subghz::Status;
1188 ///
1189 /// let status: Status = sg.status()?;
1190 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1191 /// ```
1192 ///
1193 /// [link]: https://community.st.com/s/question/0D53W00000hR9GQSA0/stm32wl55-getstatus-command-returns-reserved-cmdstatus 781 /// [link]: https://community.st.com/s/question/0D53W00000hR9GQSA0/stm32wl55-getstatus-command-returns-reserved-cmdstatus
1194 pub fn status(&mut self) -> Result<Status, Error> { 782 pub fn status(&mut self) -> Result<Status, Error> {
1195 Ok(self.read_1(OpCode::GetStatus)?.into()) 783 Ok(self.read_1(OpCode::GetStatus)?.into())
@@ -1198,80 +786,17 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1198 /// Get the RX buffer status. 786 /// Get the RX buffer status.
1199 /// 787 ///
1200 /// The return tuple is (status, payload_length, buffer_pointer). 788 /// The return tuple is (status, payload_length, buffer_pointer).
1201 ///
1202 /// # Example
1203 ///
1204 /// ```no_run
1205 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1206 /// use embassy_stm32::subghz::{CmdStatus, Timeout};
1207 ///
1208 /// sg.set_rx(Timeout::DISABLED)?;
1209 /// loop {
1210 /// let (status, len, ptr) = sg.rx_buffer_status()?;
1211 ///
1212 /// if status.cmd() == Ok(CmdStatus::Avaliable) {
1213 /// let mut buf: [u8; 256] = [0; 256];
1214 /// let data: &mut [u8] = &mut buf[..usize::from(len)];
1215 /// sg.read_buffer(ptr, data)?;
1216 /// // ... do things with the data
1217 /// break;
1218 /// }
1219 /// }
1220 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1221 /// ```
1222 pub fn rx_buffer_status(&mut self) -> Result<(Status, u8, u8), Error> { 789 pub fn rx_buffer_status(&mut self) -> Result<(Status, u8, u8), Error> {
1223 let data: [u8; 3] = self.read_n(OpCode::GetRxBufferStatus)?; 790 let data: [u8; 3] = self.read_n(OpCode::GetRxBufferStatus)?;
1224 Ok((data[0].into(), data[1], data[2])) 791 Ok((data[0].into(), data[1], data[2]))
1225 } 792 }
1226 793
1227 /// Returns information on the last received (G)FSK packet. 794 /// Returns information on the last received (G)FSK packet.
1228 ///
1229 /// # Example
1230 ///
1231 /// ```no_run
1232 /// # use std::fmt::Write;
1233 /// # let mut uart = String::new();
1234 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1235 /// use embassy_stm32::subghz::{CmdStatus, Timeout};
1236 ///
1237 /// sg.set_rx(Timeout::DISABLED)?;
1238 /// loop {
1239 /// let pkt_status = sg.fsk_packet_status()?;
1240 ///
1241 /// if pkt_status.status().cmd() == Ok(CmdStatus::Avaliable) {
1242 /// let rssi = pkt_status.rssi_avg();
1243 /// writeln!(&mut uart, "Avg RSSI: {} dBm", rssi);
1244 /// break;
1245 /// }
1246 /// }
1247 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1248 /// ```
1249 pub fn fsk_packet_status(&mut self) -> Result<FskPacketStatus, Error> { 795 pub fn fsk_packet_status(&mut self) -> Result<FskPacketStatus, Error> {
1250 Ok(FskPacketStatus::from(self.read_n(OpCode::GetPacketStatus)?)) 796 Ok(FskPacketStatus::from(self.read_n(OpCode::GetPacketStatus)?))
1251 } 797 }
1252 798
1253 /// Returns information on the last received LoRa packet. 799 /// Returns information on the last received LoRa packet.
1254 ///
1255 /// # Example
1256 ///
1257 /// ```no_run
1258 /// # use std::fmt::Write;
1259 /// # let mut uart = String::new();
1260 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1261 /// use embassy_stm32::subghz::{CmdStatus, Timeout};
1262 ///
1263 /// sg.set_rx(Timeout::DISABLED)?;
1264 /// loop {
1265 /// let pkt_status = sg.lora_packet_status()?;
1266 ///
1267 /// if pkt_status.status().cmd() == Ok(CmdStatus::Avaliable) {
1268 /// let snr = pkt_status.snr_pkt();
1269 /// writeln!(&mut uart, "SNR: {} dB", snr);
1270 /// break;
1271 /// }
1272 /// }
1273 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1274 /// ```
1275 pub fn lora_packet_status(&mut self) -> Result<LoRaPacketStatus, Error> { 800 pub fn lora_packet_status(&mut self) -> Result<LoRaPacketStatus, Error> {
1276 Ok(LoRaPacketStatus::from(self.read_n(OpCode::GetPacketStatus)?)) 801 Ok(LoRaPacketStatus::from(self.read_n(OpCode::GetPacketStatus)?))
1277 } 802 }
@@ -1279,22 +804,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1279 /// Get the instantaneous signal strength during packet reception. 804 /// Get the instantaneous signal strength during packet reception.
1280 /// 805 ///
1281 /// The units are in dbm. 806 /// The units are in dbm.
1282 ///
1283 /// # Example
1284 ///
1285 /// Log the instantaneous signal strength to UART.
1286 ///
1287 /// ```no_run
1288 /// # use std::fmt::Write;
1289 /// # let mut uart = String::new();
1290 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1291 /// use embassy_stm32::subghz::{CmdStatus, Timeout};
1292 ///
1293 /// sg.set_rx(Timeout::DISABLED)?;
1294 /// let (_, rssi) = sg.rssi_inst()?;
1295 /// writeln!(&mut uart, "RSSI: {} dBm", rssi);
1296 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1297 /// ```
1298 pub fn rssi_inst(&mut self) -> Result<(Status, Ratio<i16>), Error> { 807 pub fn rssi_inst(&mut self) -> Result<(Status, Ratio<i16>), Error> {
1299 let data: [u8; 2] = self.read_n(OpCode::GetRssiInst)?; 808 let data: [u8; 2] = self.read_n(OpCode::GetRssiInst)?;
1300 let status: Status = data[0].into(); 809 let status: Status = data[0].into();
@@ -1304,54 +813,19 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1304 } 813 }
1305 814
1306 /// (G)FSK packet stats. 815 /// (G)FSK packet stats.
1307 ///
1308 /// # Example
1309 ///
1310 /// ```no_run
1311 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1312 /// use embassy_stm32::subghz::{FskStats, Stats};
1313 ///
1314 /// let stats: Stats<FskStats> = sg.fsk_stats()?;
1315 /// // ... use stats
1316 /// sg.reset_stats()?;
1317 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1318 /// ```
1319 pub fn fsk_stats(&mut self) -> Result<Stats<FskStats>, Error> { 816 pub fn fsk_stats(&mut self) -> Result<Stats<FskStats>, Error> {
1320 let data: [u8; 7] = self.read_n(OpCode::GetStats)?; 817 let data: [u8; 7] = self.read_n(OpCode::GetStats)?;
1321 Ok(Stats::from_raw_fsk(data)) 818 Ok(Stats::from_raw_fsk(data))
1322 } 819 }
1323 820
1324 /// LoRa packet stats. 821 /// LoRa packet stats.
1325 ///
1326 /// # Example
1327 ///
1328 /// ```no_run
1329 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1330 /// use embassy_stm32::subghz::{LoRaStats, Stats};
1331 ///
1332 /// let stats: Stats<LoRaStats> = sg.lora_stats()?;
1333 /// // ... use stats
1334 /// sg.reset_stats()?;
1335 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1336 /// ```
1337 pub fn lora_stats(&mut self) -> Result<Stats<LoRaStats>, Error> { 822 pub fn lora_stats(&mut self) -> Result<Stats<LoRaStats>, Error> {
1338 let data: [u8; 7] = self.read_n(OpCode::GetStats)?; 823 let data: [u8; 7] = self.read_n(OpCode::GetStats)?;
1339 Ok(Stats::from_raw_lora(data)) 824 Ok(Stats::from_raw_lora(data))
1340 } 825 }
1341 826
1342 /// Reset the stats as reported in [`lora_stats`] and [`fsk_stats`]. 827 /// Reset the stats as reported in [`lora_stats`](SubGhz::lora_stats) and
1343 /// 828 /// [`fsk_stats`](SubGhz::fsk_stats).
1344 /// # Example
1345 ///
1346 /// ```no_run
1347 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1348 ///
1349 /// sg.reset_stats()?;
1350 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1351 /// ```
1352 ///
1353 /// [`lora_stats`]: crate::subghz::SubGhz::lora_stats
1354 /// [`fsk_stats`]: crate::subghz::SubGhz::fsk_stats
1355 pub fn reset_stats(&mut self) -> Result<(), Error> { 829 pub fn reset_stats(&mut self) -> Result<(), Error> {
1356 const RESET_STATS: [u8; 7] = [0x00; 7]; 830 const RESET_STATS: [u8; 7] = [0x00; 7];
1357 self.write(&RESET_STATS) 831 self.write(&RESET_STATS)
@@ -1362,49 +836,11 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1362/// IRQ commands 836/// IRQ commands
1363impl<'d> SubGhz<'d, NoDma, NoDma> { 837impl<'d> SubGhz<'d, NoDma, NoDma> {
1364 /// Set the interrupt configuration. 838 /// Set the interrupt configuration.
1365 ///
1366 /// # Example
1367 ///
1368 /// Enable TX and timeout interrupts.
1369 ///
1370 /// ```no_run
1371 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1372 /// use embassy_stm32::subghz::{CfgIrq, Irq};
1373 ///
1374 /// const IRQ_CFG: CfgIrq = CfgIrq::new()
1375 /// .irq_enable_all(Irq::TxDone)
1376 /// .irq_enable_all(Irq::Timeout);
1377 /// sg.set_irq_cfg(&IRQ_CFG)?;
1378 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1379 /// ```
1380 pub fn set_irq_cfg(&mut self, cfg: &CfgIrq) -> Result<(), Error> { 839 pub fn set_irq_cfg(&mut self, cfg: &CfgIrq) -> Result<(), Error> {
1381 self.write(cfg.as_slice()) 840 self.write(cfg.as_slice())
1382 } 841 }
1383 842
1384 /// Get the IRQ status. 843 /// Get the IRQ status.
1385 ///
1386 /// # Example
1387 ///
1388 /// Wait for TX to complete or timeout.
1389 ///
1390 /// ```no_run
1391 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1392 /// use embassy_stm32::subghz::Irq;
1393 ///
1394 /// loop {
1395 /// let (_, irq_status) = sg.irq_status()?;
1396 /// sg.clear_irq_status(irq_status)?;
1397 /// if irq_status & Irq::TxDone.mask() != 0 {
1398 /// // handle TX done
1399 /// break;
1400 /// }
1401 /// if irq_status & Irq::Timeout.mask() != 0 {
1402 /// // handle timeout
1403 /// break;
1404 /// }
1405 /// }
1406 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1407 /// ```
1408 pub fn irq_status(&mut self) -> Result<(Status, u16), Error> { 844 pub fn irq_status(&mut self) -> Result<(Status, u16), Error> {
1409 let data: [u8; 3] = self.read_n(OpCode::GetIrqStatus)?; 845 let data: [u8; 3] = self.read_n(OpCode::GetIrqStatus)?;
1410 let irq_status: u16 = u16::from_be_bytes([data[1], data[2]]); 846 let irq_status: u16 = u16::from_be_bytes([data[1], data[2]]);
@@ -1412,21 +848,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1412 } 848 }
1413 849
1414 /// Clear the IRQ status. 850 /// Clear the IRQ status.
1415 ///
1416 /// # Example
1417 ///
1418 /// Clear the [`TxDone`] and [`RxDone`] interrupts.
1419 ///
1420 /// ```no_run
1421 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1422 /// use embassy_stm32::subghz::Irq;
1423 ///
1424 /// sg.clear_irq_status(Irq::TxDone.mask() | Irq::RxDone.mask())?;
1425 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1426 /// ```
1427 ///
1428 /// [`TxDone`]: crate::subghz::Irq::TxDone
1429 /// [`RxDone`]: crate::subghz::Irq::RxDone
1430 pub fn clear_irq_status(&mut self, mask: u16) -> Result<(), Error> { 851 pub fn clear_irq_status(&mut self, mask: u16) -> Result<(), Error> {
1431 self.write(&[OpCode::ClrIrqStatus as u8, (mask >> 8) as u8, mask as u8]) 852 self.write(&[OpCode::ClrIrqStatus as u8, (mask >> 8) as u8, mask as u8])
1432 } 853 }
@@ -1436,25 +857,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1436/// Miscellaneous commands 857/// Miscellaneous commands
1437impl<'d> SubGhz<'d, NoDma, NoDma> { 858impl<'d> SubGhz<'d, NoDma, NoDma> {
1438 /// Calibrate one or several blocks at any time when in standby mode. 859 /// Calibrate one or several blocks at any time when in standby mode.
1439 ///
1440 /// The blocks to calibrate are defined by `cal` argument.
1441 /// When the calibration is ongoing, BUSY is set.
1442 /// A falling edge on BUSY indicates the end of all enabled calibrations.
1443 ///
1444 /// This function will not poll for BUSY.
1445 ///
1446 /// # Example
1447 ///
1448 /// Calibrate the RC 13 MHz and PLL.
1449 ///
1450 /// ```no_run
1451 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1452 /// use embassy_stm32::subghz::{Calibrate, StandbyClk, SubGhz};
1453 ///
1454 /// sg.set_standby(StandbyClk::Rc)?;
1455 /// sg.calibrate(Calibrate::Rc13M.mask() | Calibrate::Pll.mask())?;
1456 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1457 /// ```
1458 pub fn calibrate(&mut self, cal: u8) -> Result<(), Error> { 860 pub fn calibrate(&mut self, cal: u8) -> Result<(), Error> {
1459 // bit 7 is reserved and must be kept at reset value. 861 // bit 7 is reserved and must be kept at reset value.
1460 self.write(&[OpCode::Calibrate as u8, cal & 0x7F]) 862 self.write(&[OpCode::Calibrate as u8, cal & 0x7F])
@@ -1463,86 +865,22 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1463 /// Calibrate the image at the given frequencies. 865 /// Calibrate the image at the given frequencies.
1464 /// 866 ///
1465 /// Requires the radio to be in standby mode. 867 /// Requires the radio to be in standby mode.
1466 ///
1467 /// # Example
1468 ///
1469 /// Calibrate the image for the 430 - 440 MHz ISM band.
1470 ///
1471 /// ```no_run
1472 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1473 /// use embassy_stm32::subghz::{CalibrateImage, StandbyClk};
1474 ///
1475 /// sg.set_standby(StandbyClk::Rc)?;
1476 /// sg.calibrate_image(CalibrateImage::ISM_430_440)?;
1477 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1478 /// ```
1479 pub fn calibrate_image(&mut self, cal: CalibrateImage) -> Result<(), Error> { 868 pub fn calibrate_image(&mut self, cal: CalibrateImage) -> Result<(), Error> {
1480 self.write(&[OpCode::CalibrateImage as u8, cal.0, cal.1]) 869 self.write(&[OpCode::CalibrateImage as u8, cal.0, cal.1])
1481 } 870 }
1482 871
1483 /// Set the radio power supply. 872 /// Set the radio power supply.
1484 ///
1485 /// # Examples
1486 ///
1487 /// Use the linear dropout regulator (LDO):
1488 ///
1489 /// ```no_run
1490 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1491 /// use embassy_stm32::subghz::RegMode;
1492 ///
1493 /// sg.set_regulator_mode(RegMode::Ldo)?;
1494 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1495 /// ```
1496 ///
1497 /// Use the switch mode power supply (SPMS):
1498 ///
1499 /// ```no_run
1500 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1501 /// use embassy_stm32::subghz::RegMode;
1502 ///
1503 /// sg.set_regulator_mode(RegMode::Smps)?;
1504 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1505 /// ```
1506 pub fn set_regulator_mode(&mut self, reg_mode: RegMode) -> Result<(), Error> { 873 pub fn set_regulator_mode(&mut self, reg_mode: RegMode) -> Result<(), Error> {
1507 self.write(&[OpCode::SetRegulatorMode as u8, reg_mode as u8]) 874 self.write(&[OpCode::SetRegulatorMode as u8, reg_mode as u8])
1508 } 875 }
1509 876
1510 /// Get the radio operational errors. 877 /// Get the radio operational errors.
1511 ///
1512 /// # Example
1513 ///
1514 /// ```no_run
1515 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1516 /// use embassy_stm32::subghz::OpError;
1517 ///
1518 /// let (status, error_mask) = sg.op_error()?;
1519 /// if error_mask & OpError::PllLockError.mask() != 0 {
1520 /// // ... handle PLL lock error
1521 /// }
1522 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1523 /// ```
1524 pub fn op_error(&mut self) -> Result<(Status, u16), Error> { 878 pub fn op_error(&mut self) -> Result<(Status, u16), Error> {
1525 let data: [u8; 3] = self.read_n(OpCode::GetError)?; 879 let data: [u8; 3] = self.read_n(OpCode::GetError)?;
1526 Ok((data[0].into(), u16::from_le_bytes([data[1], data[2]]))) 880 Ok((data[0].into(), u16::from_be_bytes([data[1], data[2]])))
1527 } 881 }
1528 882
1529 /// Clear all errors as reported by [`op_error`]. 883 /// Clear all errors as reported by [`op_error`](SubGhz::op_error).
1530 ///
1531 /// # Example
1532 ///
1533 /// ```no_run
1534 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1535 /// use embassy_stm32::subghz::OpError;
1536 ///
1537 /// let (status, error_mask) = sg.op_error()?;
1538 /// // ignore all errors
1539 /// if error_mask != 0 {
1540 /// sg.clear_error()?;
1541 /// }
1542 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1543 /// ```
1544 ///
1545 /// [`op_error`]: crate::subghz::SubGhz::op_error
1546 pub fn clear_error(&mut self) -> Result<(), Error> { 884 pub fn clear_error(&mut self) -> Result<(), Error> {
1547 self.write(&[OpCode::ClrError as u8, 0x00]) 885 self.write(&[OpCode::ClrError as u8, 0x00])
1548 } 886 }
@@ -1552,21 +890,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> {
1552/// Set TCXO mode command 890/// Set TCXO mode command
1553impl<'d> SubGhz<'d, NoDma, NoDma> { 891impl<'d> SubGhz<'d, NoDma, NoDma> {
1554 /// Set the TCXO trim and HSE32 ready timeout. 892 /// Set the TCXO trim and HSE32 ready timeout.
1555 ///
1556 /// # Example
1557 ///
1558 /// Setup the TCXO with 1.7V trim and a 10ms timeout.
1559 ///
1560 /// ```no_run
1561 /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...);
1562 /// use embassy_stm32::subghz::{TcxoMode, TcxoTrim, Timeout};
1563 ///
1564 /// const TCXO_MODE: TcxoMode = TcxoMode::new()
1565 /// .set_txco_trim(TcxoTrim::Volts1pt7)
1566 /// .set_timeout(Timeout::from_millis_sat(10));
1567 /// sg.set_tcxo_mode(&TCXO_MODE)?;
1568 /// # Ok::<(), embassy_stm32::subghz::Error>(())
1569 /// ```
1570 pub fn set_tcxo_mode(&mut self, tcxo_mode: &TcxoMode) -> Result<(), Error> { 893 pub fn set_tcxo_mode(&mut self, tcxo_mode: &TcxoMode) -> Result<(), Error> {
1571 self.write(tcxo_mode.as_slice()) 894 self.write(tcxo_mode.as_slice())
1572 } 895 }
@@ -1642,6 +965,10 @@ pub(crate) enum Register {
1642 GCRCPOLRH = 0x06BE, 965 GCRCPOLRH = 0x06BE,
1643 /// Generic synchronization word 7. 966 /// Generic synchronization word 7.
1644 GSYNC7 = 0x06C0, 967 GSYNC7 = 0x06C0,
968 /// Node address.
969 NODE = 0x06CD,
970 /// Broadcast address.
971 BROADCAST = 0x06CE,
1645 /// LoRa synchronization word MSB. 972 /// LoRa synchronization word MSB.
1646 LSYNCH = 0x0740, 973 LSYNCH = 0x0740,
1647 /// LoRa synchronization word LSB. 974 /// LoRa synchronization word LSB.
@@ -1651,6 +978,16 @@ pub(crate) enum Register {
1651 RXGAINC = 0x08AC, 978 RXGAINC = 0x08AC,
1652 /// PA over current protection. 979 /// PA over current protection.
1653 PAOCP = 0x08E7, 980 PAOCP = 0x08E7,
981 /// RTC control.
982 RTCCTLR = 0x0902,
983 /// RTC period MSB.
984 RTCPRDR2 = 0x0906,
985 /// RTC period mid-byte.
986 #[allow(dead_code)]
987 RTCPRDR1 = 0x0907,
988 /// RTC period LSB.
989 #[allow(dead_code)]
990 RTCPRDR0 = 0x0908,
1654 /// HSE32 OSC_IN capacitor trim. 991 /// HSE32 OSC_IN capacitor trim.
1655 HSEINTRIM = 0x0911, 992 HSEINTRIM = 0x0911,
1656 /// HSE32 OSC_OUT capacitor trim. 993 /// HSE32 OSC_OUT capacitor trim.
diff --git a/embassy-stm32/src/subghz/mod_params.rs b/embassy-stm32/src/subghz/mod_params.rs
index 0bfcb43ba..d997ae112 100644
--- a/embassy-stm32/src/subghz/mod_params.rs
+++ b/embassy-stm32/src/subghz/mod_params.rs
@@ -52,7 +52,7 @@ impl FskBandwidth {
52 /// # Example 52 /// # Example
53 /// 53 ///
54 /// ``` 54 /// ```
55 /// use stm32wl_hal::subghz::FskBandwidth; 55 /// use stm32wlxx_hal::subghz::FskBandwidth;
56 /// 56 ///
57 /// assert_eq!(FskBandwidth::Bw4.hertz(), 4_800); 57 /// assert_eq!(FskBandwidth::Bw4.hertz(), 4_800);
58 /// assert_eq!(FskBandwidth::Bw5.hertz(), 5_800); 58 /// assert_eq!(FskBandwidth::Bw5.hertz(), 5_800);
@@ -109,7 +109,7 @@ impl FskBandwidth {
109 /// # Example 109 /// # Example
110 /// 110 ///
111 /// ``` 111 /// ```
112 /// use stm32wl_hal::subghz::FskBandwidth; 112 /// use stm32wlxx_hal::subghz::FskBandwidth;
113 /// 113 ///
114 /// assert_eq!(FskBandwidth::from_bits(0x1F), Ok(FskBandwidth::Bw4)); 114 /// assert_eq!(FskBandwidth::from_bits(0x1F), Ok(FskBandwidth::Bw4));
115 /// assert_eq!(FskBandwidth::from_bits(0x17), Ok(FskBandwidth::Bw5)); 115 /// assert_eq!(FskBandwidth::from_bits(0x17), Ok(FskBandwidth::Bw5));
@@ -206,7 +206,7 @@ impl FskBitrate {
206 /// # Example 206 /// # Example
207 /// 207 ///
208 /// ``` 208 /// ```
209 /// use stm32wl_hal::subghz::FskBitrate; 209 /// use stm32wlxx_hal::subghz::FskBitrate;
210 /// 210 ///
211 /// const BITRATE: FskBitrate = FskBitrate::from_bps(9600); 211 /// const BITRATE: FskBitrate = FskBitrate::from_bps(9600);
212 /// assert_eq!(BITRATE.as_bps(), 9600); 212 /// assert_eq!(BITRATE.as_bps(), 9600);
@@ -235,7 +235,7 @@ impl FskBitrate {
235 /// # Example 235 /// # Example
236 /// 236 ///
237 /// ``` 237 /// ```
238 /// use stm32wl_hal::subghz::FskBitrate; 238 /// use stm32wlxx_hal::subghz::FskBitrate;
239 /// 239 ///
240 /// const BITRATE: FskBitrate = FskBitrate::from_raw(0x7D00); 240 /// const BITRATE: FskBitrate = FskBitrate::from_raw(0x7D00);
241 /// assert_eq!(BITRATE.as_bps(), 32_000); 241 /// assert_eq!(BITRATE.as_bps(), 32_000);
@@ -251,7 +251,7 @@ impl FskBitrate {
251 /// # Example 251 /// # Example
252 /// 252 ///
253 /// ``` 253 /// ```
254 /// use stm32wl_hal::subghz::FskBitrate; 254 /// use stm32wlxx_hal::subghz::FskBitrate;
255 /// 255 ///
256 /// const BITS_PER_SEC: u32 = 9600; 256 /// const BITS_PER_SEC: u32 = 9600;
257 /// const BITRATE: FskBitrate = FskBitrate::from_bps(BITS_PER_SEC); 257 /// const BITRATE: FskBitrate = FskBitrate::from_bps(BITS_PER_SEC);
@@ -296,7 +296,7 @@ impl FskFdev {
296 /// # Example 296 /// # Example
297 /// 297 ///
298 /// ``` 298 /// ```
299 /// use stm32wl_hal::subghz::FskFdev; 299 /// use stm32wlxx_hal::subghz::FskFdev;
300 /// 300 ///
301 /// const FDEV: FskFdev = FskFdev::from_hertz(31_250); 301 /// const FDEV: FskFdev = FskFdev::from_hertz(31_250);
302 /// assert_eq!(FDEV.as_hertz(), 31_250); 302 /// assert_eq!(FDEV.as_hertz(), 31_250);
@@ -317,7 +317,7 @@ impl FskFdev {
317 /// # Example 317 /// # Example
318 /// 318 ///
319 /// ``` 319 /// ```
320 /// use stm32wl_hal::subghz::FskFdev; 320 /// use stm32wlxx_hal::subghz::FskFdev;
321 /// 321 ///
322 /// const FDEV: FskFdev = FskFdev::from_raw(0x8000); 322 /// const FDEV: FskFdev = FskFdev::from_raw(0x8000);
323 /// assert_eq!(FDEV.as_hertz(), 31_250); 323 /// assert_eq!(FDEV.as_hertz(), 31_250);
@@ -333,7 +333,7 @@ impl FskFdev {
333 /// # Example 333 /// # Example
334 /// 334 ///
335 /// ``` 335 /// ```
336 /// use stm32wl_hal::subghz::FskFdev; 336 /// use stm32wlxx_hal::subghz::FskFdev;
337 /// 337 ///
338 /// const HERTZ: u32 = 31_250; 338 /// const HERTZ: u32 = 31_250;
339 /// const FDEV: FskFdev = FskFdev::from_hertz(HERTZ); 339 /// const FDEV: FskFdev = FskFdev::from_hertz(HERTZ);
@@ -348,7 +348,7 @@ impl FskFdev {
348 } 348 }
349} 349}
350 350
351/// (G)FSK modulation paramters. 351/// (G)FSK modulation parameters.
352#[derive(Debug, PartialEq, Eq, Clone, Copy)] 352#[derive(Debug, PartialEq, Eq, Clone, Copy)]
353#[cfg_attr(feature = "defmt", derive(defmt::Format))] 353#[cfg_attr(feature = "defmt", derive(defmt::Format))]
354pub struct FskModParams { 354pub struct FskModParams {
@@ -363,7 +363,7 @@ impl FskModParams {
363 /// # Example 363 /// # Example
364 /// 364 ///
365 /// ``` 365 /// ```
366 /// use stm32wl_hal::subghz::FskModParams; 366 /// use stm32wlxx_hal::subghz::FskModParams;
367 /// 367 ///
368 /// const MOD_PARAMS: FskModParams = FskModParams::new(); 368 /// const MOD_PARAMS: FskModParams = FskModParams::new();
369 /// ``` 369 /// ```
@@ -394,7 +394,7 @@ impl FskModParams {
394 /// Setting the bitrate to 32,000 bits per second. 394 /// Setting the bitrate to 32,000 bits per second.
395 /// 395 ///
396 /// ``` 396 /// ```
397 /// use stm32wl_hal::subghz::{FskBitrate, FskModParams}; 397 /// use stm32wlxx_hal::subghz::{FskBitrate, FskModParams};
398 /// 398 ///
399 /// const BITRATE: FskBitrate = FskBitrate::from_bps(32_000); 399 /// const BITRATE: FskBitrate = FskBitrate::from_bps(32_000);
400 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bitrate(BITRATE); 400 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bitrate(BITRATE);
@@ -412,7 +412,7 @@ impl FskModParams {
412 /// Setting the bitrate to 32,000 bits per second. 412 /// Setting the bitrate to 32,000 bits per second.
413 /// 413 ///
414 /// ``` 414 /// ```
415 /// use stm32wl_hal::subghz::{FskBitrate, FskModParams}; 415 /// use stm32wlxx_hal::subghz::{FskBitrate, FskModParams};
416 /// 416 ///
417 /// const BITRATE: FskBitrate = FskBitrate::from_bps(32_000); 417 /// const BITRATE: FskBitrate = FskBitrate::from_bps(32_000);
418 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bitrate(BITRATE); 418 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bitrate(BITRATE);
@@ -434,7 +434,7 @@ impl FskModParams {
434 /// # Example 434 /// # Example
435 /// 435 ///
436 /// ``` 436 /// ```
437 /// use stm32wl_hal::subghz::{FskModParams, FskPulseShape}; 437 /// use stm32wlxx_hal::subghz::{FskModParams, FskPulseShape};
438 /// 438 ///
439 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_pulse_shape(FskPulseShape::Bt03); 439 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_pulse_shape(FskPulseShape::Bt03);
440 /// # assert_eq!(MOD_PARAMS.as_slice()[4], 0x08); 440 /// # assert_eq!(MOD_PARAMS.as_slice()[4], 0x08);
@@ -453,7 +453,7 @@ impl FskModParams {
453 /// # Example 453 /// # Example
454 /// 454 ///
455 /// ``` 455 /// ```
456 /// use stm32wl_hal::subghz::{FskBandwidth, FskModParams}; 456 /// use stm32wlxx_hal::subghz::{FskBandwidth, FskModParams};
457 /// 457 ///
458 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bandwidth(FskBandwidth::Bw9); 458 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bandwidth(FskBandwidth::Bw9);
459 /// assert_eq!(MOD_PARAMS.bandwidth(), Ok(FskBandwidth::Bw9)); 459 /// assert_eq!(MOD_PARAMS.bandwidth(), Ok(FskBandwidth::Bw9));
@@ -467,7 +467,7 @@ impl FskModParams {
467 /// # Example 467 /// # Example
468 /// 468 ///
469 /// ``` 469 /// ```
470 /// use stm32wl_hal::subghz::{FskBandwidth, FskModParams}; 470 /// use stm32wlxx_hal::subghz::{FskBandwidth, FskModParams};
471 /// 471 ///
472 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bandwidth(FskBandwidth::Bw9); 472 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bandwidth(FskBandwidth::Bw9);
473 /// # assert_eq!(MOD_PARAMS.as_slice()[5], 0x1E); 473 /// # assert_eq!(MOD_PARAMS.as_slice()[5], 0x1E);
@@ -483,7 +483,7 @@ impl FskModParams {
483 /// # Example 483 /// # Example
484 /// 484 ///
485 /// ``` 485 /// ```
486 /// use stm32wl_hal::subghz::{FskFdev, FskModParams}; 486 /// use stm32wlxx_hal::subghz::{FskFdev, FskModParams};
487 /// 487 ///
488 /// const FDEV: FskFdev = FskFdev::from_hertz(31_250); 488 /// const FDEV: FskFdev = FskFdev::from_hertz(31_250);
489 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_fdev(FDEV); 489 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_fdev(FDEV);
@@ -499,7 +499,7 @@ impl FskModParams {
499 /// # Example 499 /// # Example
500 /// 500 ///
501 /// ``` 501 /// ```
502 /// use stm32wl_hal::subghz::{FskFdev, FskModParams}; 502 /// use stm32wlxx_hal::subghz::{FskFdev, FskModParams};
503 /// 503 ///
504 /// const FDEV: FskFdev = FskFdev::from_hertz(31_250); 504 /// const FDEV: FskFdev = FskFdev::from_hertz(31_250);
505 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_fdev(FDEV); 505 /// const MOD_PARAMS: FskModParams = FskModParams::new().set_fdev(FDEV);
@@ -536,7 +536,7 @@ impl FskModParams {
536 /// 536 ///
537 /// ``` 537 /// ```
538 /// extern crate static_assertions as sa; 538 /// extern crate static_assertions as sa;
539 /// use stm32wl_hal::subghz::{FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape}; 539 /// use stm32wlxx_hal::subghz::{FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape};
540 /// 540 ///
541 /// const MOD_PARAMS: FskModParams = FskModParams::new() 541 /// const MOD_PARAMS: FskModParams = FskModParams::new()
542 /// .set_bitrate(FskBitrate::from_bps(20_000)) 542 /// .set_bitrate(FskBitrate::from_bps(20_000))
@@ -576,7 +576,7 @@ impl FskModParams {
576 /// # Example 576 /// # Example
577 /// 577 ///
578 /// ``` 578 /// ```
579 /// use stm32wl_hal::subghz::{FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape}; 579 /// use stm32wlxx_hal::subghz::{FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape};
580 /// 580 ///
581 /// const BITRATE: FskBitrate = FskBitrate::from_bps(20_000); 581 /// const BITRATE: FskBitrate = FskBitrate::from_bps(20_000);
582 /// const PULSE_SHAPE: FskPulseShape = FskPulseShape::Bt03; 582 /// const PULSE_SHAPE: FskPulseShape = FskPulseShape::Bt03;
@@ -608,6 +608,9 @@ impl Default for FskModParams {
608/// LoRa spreading factor. 608/// LoRa spreading factor.
609/// 609///
610/// Argument of [`LoRaModParams::set_sf`]. 610/// Argument of [`LoRaModParams::set_sf`].
611///
612/// Higher spreading factors improve receiver sensitivity, but reduce bit rate
613/// and increase power consumption.
611#[derive(Debug, PartialEq, Eq, Clone, Copy, PartialOrd, Ord)] 614#[derive(Debug, PartialEq, Eq, Clone, Copy, PartialOrd, Ord)]
612#[cfg_attr(feature = "defmt", derive(defmt::Format))] 615#[cfg_attr(feature = "defmt", derive(defmt::Format))]
613#[repr(u8)] 616#[repr(u8)]
@@ -671,7 +674,7 @@ impl LoRaBandwidth {
671 /// # Example 674 /// # Example
672 /// 675 ///
673 /// ``` 676 /// ```
674 /// use stm32wl_hal::subghz::LoRaBandwidth; 677 /// use stm32wlxx_hal::subghz::LoRaBandwidth;
675 /// 678 ///
676 /// assert_eq!(LoRaBandwidth::Bw7.hertz(), 7_810); 679 /// assert_eq!(LoRaBandwidth::Bw7.hertz(), 7_810);
677 /// assert_eq!(LoRaBandwidth::Bw10.hertz(), 10_420); 680 /// assert_eq!(LoRaBandwidth::Bw10.hertz(), 10_420);
@@ -715,23 +718,38 @@ impl PartialOrd for LoRaBandwidth {
715/// LoRa forward error correction coding rate. 718/// LoRa forward error correction coding rate.
716/// 719///
717/// Argument of [`LoRaModParams::set_cr`]. 720/// Argument of [`LoRaModParams::set_cr`].
721///
722/// A higher coding rate provides better immunity to interference at the expense
723/// of longer transmission time.
724/// In normal conditions [`CodingRate::Cr45`] provides the best trade off.
725/// In case of strong interference, a higher coding rate may be used.
718#[derive(Debug, PartialEq, Eq, Clone, Copy, PartialOrd, Ord)] 726#[derive(Debug, PartialEq, Eq, Clone, Copy, PartialOrd, Ord)]
719#[cfg_attr(feature = "defmt", derive(defmt::Format))] 727#[cfg_attr(feature = "defmt", derive(defmt::Format))]
720#[repr(u8)] 728#[repr(u8)]
721pub enum CodingRate { 729pub enum CodingRate {
722 /// No forward error correction coding rate 4/4 730 /// No forward error correction coding rate 4/4
731 ///
732 /// Overhead ratio of 1
723 Cr44 = 0x00, 733 Cr44 = 0x00,
724 /// Forward error correction coding rate 4/5 734 /// Forward error correction coding rate 4/5
735 ///
736 /// Overhead ratio of 1.25
725 Cr45 = 0x1, 737 Cr45 = 0x1,
726 /// Forward error correction coding rate 4/6 738 /// Forward error correction coding rate 4/6
739 ///
740 /// Overhead ratio of 1.5
727 Cr46 = 0x2, 741 Cr46 = 0x2,
728 /// Forward error correction coding rate 4/7 742 /// Forward error correction coding rate 4/7
743 ///
744 /// Overhead ratio of 1.75
729 Cr47 = 0x3, 745 Cr47 = 0x3,
730 /// Forward error correction coding rate 4/8 746 /// Forward error correction coding rate 4/8
747 ///
748 /// Overhead ratio of 2
731 Cr48 = 0x4, 749 Cr48 = 0x4,
732} 750}
733 751
734/// LoRa modulation paramters. 752/// LoRa modulation parameters.
735#[derive(Debug, PartialEq, Eq, Clone, Copy)] 753#[derive(Debug, PartialEq, Eq, Clone, Copy)]
736#[cfg_attr(feature = "defmt", derive(defmt::Format))] 754#[cfg_attr(feature = "defmt", derive(defmt::Format))]
737 755
@@ -747,7 +765,7 @@ impl LoRaModParams {
747 /// # Example 765 /// # Example
748 /// 766 ///
749 /// ``` 767 /// ```
750 /// use stm32wl_hal::subghz::LoRaModParams; 768 /// use stm32wlxx_hal::subghz::LoRaModParams;
751 /// 769 ///
752 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new(); 770 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new();
753 /// assert_eq!(MOD_PARAMS, LoRaModParams::default()); 771 /// assert_eq!(MOD_PARAMS, LoRaModParams::default());
@@ -769,7 +787,7 @@ impl LoRaModParams {
769 /// # Example 787 /// # Example
770 /// 788 ///
771 /// ``` 789 /// ```
772 /// use stm32wl_hal::subghz::{LoRaModParams, SpreadingFactor}; 790 /// use stm32wlxx_hal::subghz::{LoRaModParams, SpreadingFactor};
773 /// 791 ///
774 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_sf(SpreadingFactor::Sf7); 792 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_sf(SpreadingFactor::Sf7);
775 /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x07, 0x00, 0x00, 0x00]); 793 /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x07, 0x00, 0x00, 0x00]);
@@ -785,7 +803,7 @@ impl LoRaModParams {
785 /// # Example 803 /// # Example
786 /// 804 ///
787 /// ``` 805 /// ```
788 /// use stm32wl_hal::subghz::{LoRaBandwidth, LoRaModParams}; 806 /// use stm32wlxx_hal::subghz::{LoRaBandwidth, LoRaModParams};
789 /// 807 ///
790 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_bw(LoRaBandwidth::Bw125); 808 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_bw(LoRaBandwidth::Bw125);
791 /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x05, 0x04, 0x00, 0x00]); 809 /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x05, 0x04, 0x00, 0x00]);
@@ -798,10 +816,12 @@ impl LoRaModParams {
798 816
799 /// Set the forward error correction coding rate. 817 /// Set the forward error correction coding rate.
800 /// 818 ///
819 /// See [`CodingRate`] for more information.
820 ///
801 /// # Example 821 /// # Example
802 /// 822 ///
803 /// ``` 823 /// ```
804 /// use stm32wl_hal::subghz::{CodingRate, LoRaModParams}; 824 /// use stm32wlxx_hal::subghz::{CodingRate, LoRaModParams};
805 /// 825 ///
806 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_cr(CodingRate::Cr45); 826 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_cr(CodingRate::Cr45);
807 /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x05, 0x00, 0x01, 0x00]); 827 /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x05, 0x00, 0x01, 0x00]);
@@ -814,10 +834,29 @@ impl LoRaModParams {
814 834
815 /// Set low data rate optimization enable. 835 /// Set low data rate optimization enable.
816 /// 836 ///
837 /// For low data rates (typically high SF or low BW) and very long payloads
838 /// (may last several seconds), the low data rate optimization (LDRO) can be
839 /// enabled.
840 /// This reduces the number of bits per symbol to the given SF minus 2,
841 /// to allow the receiver to have a better tracking of the LoRa receive
842 /// signal.
843 /// Depending on the payload length, the low data rate optimization is
844 /// usually recommended when the LoRa symbol time is equal or above
845 /// 16.38 ms.
846 /// When using LoRa modulation, the total frequency drift over the packet
847 /// time must be kept lower than Freq_drift_max:
848 ///
849 /// Freq_drift_max = BW / (3 × 2SF)
850 ///
851 /// When possible, enabling the low data rate optimization, relaxes the
852 /// total frequency drift over the packet time by 16:
853 ///
854 /// Freq_drift_optimise_max = 16 × Freq_drift_max
855 ///
817 /// # Example 856 /// # Example
818 /// 857 ///
819 /// ``` 858 /// ```
820 /// use stm32wl_hal::subghz::LoRaModParams; 859 /// use stm32wlxx_hal::subghz::LoRaModParams;
821 /// 860 ///
822 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_ldro_en(true); 861 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_ldro_en(true);
823 /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x05, 0x00, 0x00, 0x01]); 862 /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x05, 0x00, 0x00, 0x01]);
@@ -833,7 +872,7 @@ impl LoRaModParams {
833 /// # Example 872 /// # Example
834 /// 873 ///
835 /// ``` 874 /// ```
836 /// use stm32wl_hal::subghz::{CodingRate, LoRaBandwidth, LoRaModParams, SpreadingFactor}; 875 /// use stm32wlxx_hal::subghz::{CodingRate, LoRaBandwidth, LoRaModParams, SpreadingFactor};
837 /// 876 ///
838 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new() 877 /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new()
839 /// .set_sf(SpreadingFactor::Sf7) 878 /// .set_sf(SpreadingFactor::Sf7)
@@ -854,7 +893,7 @@ impl Default for LoRaModParams {
854 } 893 }
855} 894}
856 895
857/// BPSK modulation paramters. 896/// BPSK modulation parameters.
858/// 897///
859/// **Note:** There is no method to set the pulse shape because there is only 898/// **Note:** There is no method to set the pulse shape because there is only
860/// one valid pulse shape (Gaussian BT 0.5). 899/// one valid pulse shape (Gaussian BT 0.5).
@@ -872,7 +911,7 @@ impl BpskModParams {
872 /// # Example 911 /// # Example
873 /// 912 ///
874 /// ``` 913 /// ```
875 /// use stm32wl_hal::subghz::BpskModParams; 914 /// use stm32wlxx_hal::subghz::BpskModParams;
876 /// 915 ///
877 /// const MOD_PARAMS: BpskModParams = BpskModParams::new(); 916 /// const MOD_PARAMS: BpskModParams = BpskModParams::new();
878 /// assert_eq!(MOD_PARAMS, BpskModParams::default()); 917 /// assert_eq!(MOD_PARAMS, BpskModParams::default());
@@ -891,7 +930,7 @@ impl BpskModParams {
891 /// Setting the bitrate to 600 bits per second. 930 /// Setting the bitrate to 600 bits per second.
892 /// 931 ///
893 /// ``` 932 /// ```
894 /// use stm32wl_hal::subghz::{BpskModParams, FskBitrate}; 933 /// use stm32wlxx_hal::subghz::{BpskModParams, FskBitrate};
895 /// 934 ///
896 /// const BITRATE: FskBitrate = FskBitrate::from_bps(600); 935 /// const BITRATE: FskBitrate = FskBitrate::from_bps(600);
897 /// const MOD_PARAMS: BpskModParams = BpskModParams::new().set_bitrate(BITRATE); 936 /// const MOD_PARAMS: BpskModParams = BpskModParams::new().set_bitrate(BITRATE);
@@ -913,7 +952,7 @@ impl BpskModParams {
913 /// # Example 952 /// # Example
914 /// 953 ///
915 /// ``` 954 /// ```
916 /// use stm32wl_hal::subghz::{BpskModParams, FskBitrate}; 955 /// use stm32wlxx_hal::subghz::{BpskModParams, FskBitrate};
917 /// 956 ///
918 /// const BITRATE: FskBitrate = FskBitrate::from_bps(100); 957 /// const BITRATE: FskBitrate = FskBitrate::from_bps(100);
919 /// const MOD_PARAMS: BpskModParams = BpskModParams::new().set_bitrate(BITRATE); 958 /// const MOD_PARAMS: BpskModParams = BpskModParams::new().set_bitrate(BITRATE);
diff --git a/embassy-stm32/src/subghz/op_error.rs b/embassy-stm32/src/subghz/op_error.rs
index f7d7e7417..b17b99205 100644
--- a/embassy-stm32/src/subghz/op_error.rs
+++ b/embassy-stm32/src/subghz/op_error.rs
@@ -31,7 +31,7 @@ impl OpError {
31 /// # Example 31 /// # Example
32 /// 32 ///
33 /// ``` 33 /// ```
34 /// use stm32wl_hal::subghz::OpError; 34 /// use stm32wlxx_hal::subghz::OpError;
35 /// 35 ///
36 /// assert_eq!(OpError::PaRampError.mask(), 0b1_0000_0000); 36 /// assert_eq!(OpError::PaRampError.mask(), 0b1_0000_0000);
37 /// assert_eq!(OpError::PllLockError.mask(), 0b0_0100_0000); 37 /// assert_eq!(OpError::PllLockError.mask(), 0b0_0100_0000);
diff --git a/embassy-stm32/src/subghz/pa_config.rs b/embassy-stm32/src/subghz/pa_config.rs
index 9833368c4..875827bd4 100644
--- a/embassy-stm32/src/subghz/pa_config.rs
+++ b/embassy-stm32/src/subghz/pa_config.rs
@@ -1,4 +1,4 @@
1/// Power amplifier configuration paramters. 1/// Power amplifier configuration parameters.
2/// 2///
3/// Argument of [`set_pa_config`]. 3/// Argument of [`set_pa_config`].
4/// 4///
@@ -52,7 +52,7 @@ impl PaConfig {
52 /// # Example 52 /// # Example
53 /// 53 ///
54 /// ``` 54 /// ```
55 /// use stm32wl_hal::subghz::PaConfig; 55 /// use stm32wlxx_hal::subghz::PaConfig;
56 /// 56 ///
57 /// const PA_CONFIG: PaConfig = PaConfig::new(); 57 /// const PA_CONFIG: PaConfig = PaConfig::new();
58 /// ``` 58 /// ```
@@ -71,14 +71,14 @@ impl PaConfig {
71 /// # Caution 71 /// # Caution
72 /// 72 ///
73 /// The following restrictions must be observed to avoid over-stress on the PA: 73 /// The following restrictions must be observed to avoid over-stress on the PA:
74 /// * LP PA mode with synthesis frequency > 400 MHz, PaDutyCycle must be < 0x7. 74 /// * LP PA mode with synthesis frequency > 400 MHz, `pa_duty_cycle` must be < 0x7.
75 /// * LP PA mode with synthesis frequency < 400 MHz, PaDutyCycle must be < 0x4. 75 /// * LP PA mode with synthesis frequency < 400 MHz, `pa_duty_cycle` must be < 0x4.
76 /// * HP PA mode, PaDutyCycle must be < 0x4 76 /// * HP PA mode, `pa_duty_cycle` must be < 0x4
77 /// 77 ///
78 /// # Example 78 /// # Example
79 /// 79 ///
80 /// ``` 80 /// ```
81 /// use stm32wl_hal::subghz::{PaConfig, PaSel}; 81 /// use stm32wlxx_hal::subghz::{PaConfig, PaSel};
82 /// 82 ///
83 /// const PA_CONFIG: PaConfig = PaConfig::new().set_pa(PaSel::Lp).set_pa_duty_cycle(0x4); 83 /// const PA_CONFIG: PaConfig = PaConfig::new().set_pa(PaSel::Lp).set_pa_duty_cycle(0x4);
84 /// # assert_eq!(PA_CONFIG.as_slice()[1], 0x04); 84 /// # assert_eq!(PA_CONFIG.as_slice()[1], 0x04);
@@ -96,7 +96,7 @@ impl PaConfig {
96 /// # Example 96 /// # Example
97 /// 97 ///
98 /// ``` 98 /// ```
99 /// use stm32wl_hal::subghz::{PaConfig, PaSel}; 99 /// use stm32wlxx_hal::subghz::{PaConfig, PaSel};
100 /// 100 ///
101 /// const PA_CONFIG: PaConfig = PaConfig::new().set_pa(PaSel::Hp).set_hp_max(0x2); 101 /// const PA_CONFIG: PaConfig = PaConfig::new().set_pa(PaSel::Hp).set_hp_max(0x2);
102 /// # assert_eq!(PA_CONFIG.as_slice()[2], 0x02); 102 /// # assert_eq!(PA_CONFIG.as_slice()[2], 0x02);
@@ -112,7 +112,7 @@ impl PaConfig {
112 /// # Example 112 /// # Example
113 /// 113 ///
114 /// ``` 114 /// ```
115 /// use stm32wl_hal::subghz::{PaConfig, PaSel}; 115 /// use stm32wlxx_hal::subghz::{PaConfig, PaSel};
116 /// 116 ///
117 /// const PA_CONFIG_HP: PaConfig = PaConfig::new().set_pa(PaSel::Hp); 117 /// const PA_CONFIG_HP: PaConfig = PaConfig::new().set_pa(PaSel::Hp);
118 /// const PA_CONFIG_LP: PaConfig = PaConfig::new().set_pa(PaSel::Lp); 118 /// const PA_CONFIG_LP: PaConfig = PaConfig::new().set_pa(PaSel::Lp);
@@ -130,7 +130,7 @@ impl PaConfig {
130 /// # Example 130 /// # Example
131 /// 131 ///
132 /// ``` 132 /// ```
133 /// use stm32wl_hal::subghz::{PaConfig, PaSel}; 133 /// use stm32wlxx_hal::subghz::{PaConfig, PaSel};
134 /// 134 ///
135 /// const PA_CONFIG: PaConfig = PaConfig::new() 135 /// const PA_CONFIG: PaConfig = PaConfig::new()
136 /// .set_pa(PaSel::Hp) 136 /// .set_pa(PaSel::Hp)
diff --git a/embassy-stm32/src/subghz/packet_params.rs b/embassy-stm32/src/subghz/packet_params.rs
index 60b13ba4e..d63641c45 100644
--- a/embassy-stm32/src/subghz/packet_params.rs
+++ b/embassy-stm32/src/subghz/packet_params.rs
@@ -91,7 +91,7 @@ impl GenericPacketParams {
91 /// # Example 91 /// # Example
92 /// 92 ///
93 /// ``` 93 /// ```
94 /// use stm32wl_hal::subghz::GenericPacketParams; 94 /// use stm32wlxx_hal::subghz::GenericPacketParams;
95 /// 95 ///
96 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new(); 96 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new();
97 /// assert_eq!(PKT_PARAMS, GenericPacketParams::default()); 97 /// assert_eq!(PKT_PARAMS, GenericPacketParams::default());
@@ -119,7 +119,7 @@ impl GenericPacketParams {
119 /// # Example 119 /// # Example
120 /// 120 ///
121 /// ``` 121 /// ```
122 /// use stm32wl_hal::subghz::GenericPacketParams; 122 /// use stm32wlxx_hal::subghz::GenericPacketParams;
123 /// 123 ///
124 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_preamble_len(0x1234); 124 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_preamble_len(0x1234);
125 /// # assert_eq!(PKT_PARAMS.as_slice()[1], 0x12); 125 /// # assert_eq!(PKT_PARAMS.as_slice()[1], 0x12);
@@ -135,12 +135,12 @@ impl GenericPacketParams {
135 self 135 self
136 } 136 }
137 137
138 /// Preabmle detection length in number of bit symbols. 138 /// Preamble detection length in number of bit symbols.
139 /// 139 ///
140 /// # Example 140 /// # Example
141 /// 141 ///
142 /// ``` 142 /// ```
143 /// use stm32wl_hal::subghz::{GenericPacketParams, PreambleDetection}; 143 /// use stm32wlxx_hal::subghz::{GenericPacketParams, PreambleDetection};
144 /// 144 ///
145 /// const PKT_PARAMS: GenericPacketParams = 145 /// const PKT_PARAMS: GenericPacketParams =
146 /// GenericPacketParams::new().set_preamble_detection(PreambleDetection::Bit8); 146 /// GenericPacketParams::new().set_preamble_detection(PreambleDetection::Bit8);
@@ -162,7 +162,7 @@ impl GenericPacketParams {
162 /// Set the sync word length to 4 bytes (16 bits). 162 /// Set the sync word length to 4 bytes (16 bits).
163 /// 163 ///
164 /// ``` 164 /// ```
165 /// use stm32wl_hal::subghz::GenericPacketParams; 165 /// use stm32wlxx_hal::subghz::GenericPacketParams;
166 /// 166 ///
167 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_sync_word_len(16); 167 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_sync_word_len(16);
168 /// # assert_eq!(PKT_PARAMS.as_slice()[4], 0x10); 168 /// # assert_eq!(PKT_PARAMS.as_slice()[4], 0x10);
@@ -185,7 +185,7 @@ impl GenericPacketParams {
185 /// Enable address on the node address. 185 /// Enable address on the node address.
186 /// 186 ///
187 /// ``` 187 /// ```
188 /// use stm32wl_hal::subghz::{AddrComp, GenericPacketParams}; 188 /// use stm32wlxx_hal::subghz::{AddrComp, GenericPacketParams};
189 /// 189 ///
190 /// const PKT_PARAMS: GenericPacketParams = 190 /// const PKT_PARAMS: GenericPacketParams =
191 /// GenericPacketParams::new().set_addr_comp(AddrComp::Node); 191 /// GenericPacketParams::new().set_addr_comp(AddrComp::Node);
@@ -208,7 +208,7 @@ impl GenericPacketParams {
208 /// Set the header type to a variable length. 208 /// Set the header type to a variable length.
209 /// 209 ///
210 /// ``` 210 /// ```
211 /// use stm32wl_hal::subghz::{GenericPacketParams, HeaderType}; 211 /// use stm32wlxx_hal::subghz::{GenericPacketParams, HeaderType};
212 /// 212 ///
213 /// const PKT_PARAMS: GenericPacketParams = 213 /// const PKT_PARAMS: GenericPacketParams =
214 /// GenericPacketParams::new().set_header_type(HeaderType::Variable); 214 /// GenericPacketParams::new().set_header_type(HeaderType::Variable);
@@ -225,7 +225,7 @@ impl GenericPacketParams {
225 /// # Example 225 /// # Example
226 /// 226 ///
227 /// ``` 227 /// ```
228 /// use stm32wl_hal::subghz::GenericPacketParams; 228 /// use stm32wlxx_hal::subghz::GenericPacketParams;
229 /// 229 ///
230 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_payload_len(12); 230 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_payload_len(12);
231 /// # assert_eq!(PKT_PARAMS.as_slice()[7], 12); 231 /// # assert_eq!(PKT_PARAMS.as_slice()[7], 12);
@@ -241,7 +241,7 @@ impl GenericPacketParams {
241 /// # Example 241 /// # Example
242 /// 242 ///
243 /// ``` 243 /// ```
244 /// use stm32wl_hal::subghz::{CrcType, GenericPacketParams}; 244 /// use stm32wlxx_hal::subghz::{CrcType, GenericPacketParams};
245 /// 245 ///
246 /// const PKT_PARAMS: GenericPacketParams = 246 /// const PKT_PARAMS: GenericPacketParams =
247 /// GenericPacketParams::new().set_crc_type(CrcType::Byte2Inverted); 247 /// GenericPacketParams::new().set_crc_type(CrcType::Byte2Inverted);
@@ -260,7 +260,7 @@ impl GenericPacketParams {
260 /// Enable whitening. 260 /// Enable whitening.
261 /// 261 ///
262 /// ``` 262 /// ```
263 /// use stm32wl_hal::subghz::GenericPacketParams; 263 /// use stm32wlxx_hal::subghz::GenericPacketParams;
264 /// 264 ///
265 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_whitening_enable(true); 265 /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_whitening_enable(true);
266 /// # assert_eq!(PKT_PARAMS.as_slice()[9], 1); 266 /// # assert_eq!(PKT_PARAMS.as_slice()[9], 1);
@@ -276,7 +276,7 @@ impl GenericPacketParams {
276 /// # Example 276 /// # Example
277 /// 277 ///
278 /// ``` 278 /// ```
279 /// use stm32wl_hal::subghz::{ 279 /// use stm32wlxx_hal::subghz::{
280 /// AddrComp, CrcType, GenericPacketParams, HeaderType, PreambleDetection, 280 /// AddrComp, CrcType, GenericPacketParams, HeaderType, PreambleDetection,
281 /// }; 281 /// };
282 /// 282 ///
@@ -322,7 +322,7 @@ impl LoRaPacketParams {
322 /// # Example 322 /// # Example
323 /// 323 ///
324 /// ``` 324 /// ```
325 /// use stm32wl_hal::subghz::LoRaPacketParams; 325 /// use stm32wlxx_hal::subghz::LoRaPacketParams;
326 /// 326 ///
327 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new(); 327 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new();
328 /// assert_eq!(PKT_PARAMS, LoRaPacketParams::default()); 328 /// assert_eq!(PKT_PARAMS, LoRaPacketParams::default());
@@ -349,7 +349,7 @@ impl LoRaPacketParams {
349 /// # Example 349 /// # Example
350 /// 350 ///
351 /// ``` 351 /// ```
352 /// use stm32wl_hal::subghz::LoRaPacketParams; 352 /// use stm32wlxx_hal::subghz::LoRaPacketParams;
353 /// 353 ///
354 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_preamble_len(0x1234); 354 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_preamble_len(0x1234);
355 /// # assert_eq!(PKT_PARAMS.as_slice()[1], 0x12); 355 /// # assert_eq!(PKT_PARAMS.as_slice()[1], 0x12);
@@ -372,7 +372,7 @@ impl LoRaPacketParams {
372 /// Set the payload type to a fixed length. 372 /// Set the payload type to a fixed length.
373 /// 373 ///
374 /// ``` 374 /// ```
375 /// use stm32wl_hal::subghz::{HeaderType, LoRaPacketParams}; 375 /// use stm32wlxx_hal::subghz::{HeaderType, LoRaPacketParams};
376 /// 376 ///
377 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_header_type(HeaderType::Fixed); 377 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_header_type(HeaderType::Fixed);
378 /// # assert_eq!(PKT_PARAMS.as_slice()[3], 0x01); 378 /// # assert_eq!(PKT_PARAMS.as_slice()[3], 0x01);
@@ -388,7 +388,7 @@ impl LoRaPacketParams {
388 /// # Example 388 /// # Example
389 /// 389 ///
390 /// ``` 390 /// ```
391 /// use stm32wl_hal::subghz::LoRaPacketParams; 391 /// use stm32wlxx_hal::subghz::LoRaPacketParams;
392 /// 392 ///
393 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_payload_len(12); 393 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_payload_len(12);
394 /// # assert_eq!(PKT_PARAMS.as_slice()[4], 12); 394 /// # assert_eq!(PKT_PARAMS.as_slice()[4], 12);
@@ -406,7 +406,7 @@ impl LoRaPacketParams {
406 /// Enable CRC. 406 /// Enable CRC.
407 /// 407 ///
408 /// ``` 408 /// ```
409 /// use stm32wl_hal::subghz::LoRaPacketParams; 409 /// use stm32wlxx_hal::subghz::LoRaPacketParams;
410 /// 410 ///
411 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_crc_en(true); 411 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_crc_en(true);
412 /// # assert_eq!(PKT_PARAMS.as_slice()[5], 0x1); 412 /// # assert_eq!(PKT_PARAMS.as_slice()[5], 0x1);
@@ -424,7 +424,7 @@ impl LoRaPacketParams {
424 /// Use an inverted IQ setup. 424 /// Use an inverted IQ setup.
425 /// 425 ///
426 /// ``` 426 /// ```
427 /// use stm32wl_hal::subghz::LoRaPacketParams; 427 /// use stm32wlxx_hal::subghz::LoRaPacketParams;
428 /// 428 ///
429 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_invert_iq(true); 429 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_invert_iq(true);
430 /// # assert_eq!(PKT_PARAMS.as_slice()[6], 0x1); 430 /// # assert_eq!(PKT_PARAMS.as_slice()[6], 0x1);
@@ -440,7 +440,7 @@ impl LoRaPacketParams {
440 /// # Example 440 /// # Example
441 /// 441 ///
442 /// ``` 442 /// ```
443 /// use stm32wl_hal::subghz::{HeaderType, LoRaPacketParams}; 443 /// use stm32wlxx_hal::subghz::{HeaderType, LoRaPacketParams};
444 /// 444 ///
445 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new() 445 /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new()
446 /// .set_preamble_len(5 * 8) 446 /// .set_preamble_len(5 * 8)
@@ -482,7 +482,7 @@ impl BpskPacketParams {
482 /// # Example 482 /// # Example
483 /// 483 ///
484 /// ``` 484 /// ```
485 /// use stm32wl_hal::subghz::BpskPacketParams; 485 /// use stm32wlxx_hal::subghz::BpskPacketParams;
486 /// 486 ///
487 /// const PKT_PARAMS: BpskPacketParams = BpskPacketParams::new(); 487 /// const PKT_PARAMS: BpskPacketParams = BpskPacketParams::new();
488 /// assert_eq!(PKT_PARAMS, BpskPacketParams::default()); 488 /// assert_eq!(PKT_PARAMS, BpskPacketParams::default());
@@ -500,7 +500,7 @@ impl BpskPacketParams {
500 /// # Example 500 /// # Example
501 /// 501 ///
502 /// ``` 502 /// ```
503 /// use stm32wl_hal::subghz::BpskPacketParams; 503 /// use stm32wlxx_hal::subghz::BpskPacketParams;
504 /// 504 ///
505 /// const PKT_PARAMS: BpskPacketParams = BpskPacketParams::new().set_payload_len(12); 505 /// const PKT_PARAMS: BpskPacketParams = BpskPacketParams::new().set_payload_len(12);
506 /// # assert_eq!(PKT_PARAMS.as_slice()[1], 12); 506 /// # assert_eq!(PKT_PARAMS.as_slice()[1], 12);
@@ -516,7 +516,7 @@ impl BpskPacketParams {
516 /// # Example 516 /// # Example
517 /// 517 ///
518 /// ``` 518 /// ```
519 /// use stm32wl_hal::subghz::{BpskPacketParams, HeaderType}; 519 /// use stm32wlxx_hal::subghz::{BpskPacketParams, HeaderType};
520 /// 520 ///
521 /// const PKT_PARAMS: BpskPacketParams = BpskPacketParams::new().set_payload_len(24); 521 /// const PKT_PARAMS: BpskPacketParams = BpskPacketParams::new().set_payload_len(24);
522 /// 522 ///
diff --git a/embassy-stm32/src/subghz/packet_status.rs b/embassy-stm32/src/subghz/packet_status.rs
index a4e348d94..b3acd73ce 100644
--- a/embassy-stm32/src/subghz/packet_status.rs
+++ b/embassy-stm32/src/subghz/packet_status.rs
@@ -5,7 +5,7 @@ use super::{Ratio, Status};
5/// Returned by [`fsk_packet_status`]. 5/// Returned by [`fsk_packet_status`].
6/// 6///
7/// [`fsk_packet_status`]: super::SubGhz::fsk_packet_status 7/// [`fsk_packet_status`]: super::SubGhz::fsk_packet_status
8#[derive(Debug, Clone, Copy, PartialEq, Eq)] 8#[derive(Clone, Copy, PartialEq, Eq)]
9pub struct FskPacketStatus { 9pub struct FskPacketStatus {
10 buf: [u8; 4], 10 buf: [u8; 4],
11} 11}
@@ -22,7 +22,7 @@ impl FskPacketStatus {
22 /// # Example 22 /// # Example
23 /// 23 ///
24 /// ``` 24 /// ```
25 /// use stm32wl_hal::subghz::{CmdStatus, FskPacketStatus, Status, StatusMode}; 25 /// use stm32wlxx_hal::subghz::{CmdStatus, FskPacketStatus, Status, StatusMode};
26 /// 26 ///
27 /// let example_data_from_radio: [u8; 4] = [0x54, 0, 0, 0]; 27 /// let example_data_from_radio: [u8; 4] = [0x54, 0, 0, 0];
28 /// let pkt_status: FskPacketStatus = FskPacketStatus::from(example_data_from_radio); 28 /// let pkt_status: FskPacketStatus = FskPacketStatus::from(example_data_from_radio);
@@ -34,32 +34,32 @@ impl FskPacketStatus {
34 Status::from_raw(self.buf[0]) 34 Status::from_raw(self.buf[0])
35 } 35 }
36 36
37 /// Returns `true` if a preabmle error occured. 37 /// Returns `true` if a preamble error occurred.
38 pub const fn preamble_err(&self) -> bool { 38 pub const fn preamble_err(&self) -> bool {
39 (self.buf[1] & (1 << 7)) != 0 39 (self.buf[1] & (1 << 7)) != 0
40 } 40 }
41 41
42 /// Returns `true` if a synchronization error occured. 42 /// Returns `true` if a synchronization error occurred.
43 pub const fn sync_err(&self) -> bool { 43 pub const fn sync_err(&self) -> bool {
44 (self.buf[1] & (1 << 6)) != 0 44 (self.buf[1] & (1 << 6)) != 0
45 } 45 }
46 46
47 /// Returns `true` if an address error occured. 47 /// Returns `true` if an address error occurred.
48 pub const fn addr_err(&self) -> bool { 48 pub const fn addr_err(&self) -> bool {
49 (self.buf[1] & (1 << 5)) != 0 49 (self.buf[1] & (1 << 5)) != 0
50 } 50 }
51 51
52 /// Returns `true` if an crc error occured. 52 /// Returns `true` if an CRC error occurred.
53 pub const fn crc_err(&self) -> bool { 53 pub const fn crc_err(&self) -> bool {
54 (self.buf[1] & (1 << 4)) != 0 54 (self.buf[1] & (1 << 4)) != 0
55 } 55 }
56 56
57 /// Returns `true` if a length error occured. 57 /// Returns `true` if a length error occurred.
58 pub const fn length_err(&self) -> bool { 58 pub const fn length_err(&self) -> bool {
59 (self.buf[1] & (1 << 3)) != 0 59 (self.buf[1] & (1 << 3)) != 0
60 } 60 }
61 61
62 /// Returns `true` if an abort error occured. 62 /// Returns `true` if an abort error occurred.
63 pub const fn abort_err(&self) -> bool { 63 pub const fn abort_err(&self) -> bool {
64 (self.buf[1] & (1 << 2)) != 0 64 (self.buf[1] & (1 << 2)) != 0
65 } 65 }
@@ -74,7 +74,7 @@ impl FskPacketStatus {
74 (self.buf[1] & 1) != 0 74 (self.buf[1] & 1) != 0
75 } 75 }
76 76
77 /// Returns `true` if any error occured. 77 /// Returns `true` if any error occurred.
78 pub const fn any_err(&self) -> bool { 78 pub const fn any_err(&self) -> bool {
79 (self.buf[1] & 0xFC) != 0 79 (self.buf[1] & 0xFC) != 0
80 } 80 }
@@ -86,7 +86,7 @@ impl FskPacketStatus {
86 /// # Example 86 /// # Example
87 /// 87 ///
88 /// ``` 88 /// ```
89 /// use stm32wl_hal::{subghz::FskPacketStatus, Ratio}; 89 /// use stm32wlxx_hal::{subghz::FskPacketStatus, Ratio};
90 /// 90 ///
91 /// let example_data_from_radio: [u8; 4] = [0, 0, 80, 0]; 91 /// let example_data_from_radio: [u8; 4] = [0, 0, 80, 0];
92 /// let pkt_status: FskPacketStatus = FskPacketStatus::from(example_data_from_radio); 92 /// let pkt_status: FskPacketStatus = FskPacketStatus::from(example_data_from_radio);
@@ -103,7 +103,7 @@ impl FskPacketStatus {
103 /// # Example 103 /// # Example
104 /// 104 ///
105 /// ``` 105 /// ```
106 /// use stm32wl_hal::{subghz::FskPacketStatus, Ratio}; 106 /// use stm32wlxx_hal::{subghz::FskPacketStatus, Ratio};
107 /// 107 ///
108 /// let example_data_from_radio: [u8; 4] = [0, 0, 0, 100]; 108 /// let example_data_from_radio: [u8; 4] = [0, 0, 0, 100];
109 /// let pkt_status: FskPacketStatus = FskPacketStatus::from(example_data_from_radio); 109 /// let pkt_status: FskPacketStatus = FskPacketStatus::from(example_data_from_radio);
@@ -147,7 +147,7 @@ impl defmt::Format for FskPacketStatus {
147 } 147 }
148} 148}
149 149
150impl core::fmt::Display for FskPacketStatus { 150impl core::fmt::Debug for FskPacketStatus {
151 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { 151 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
152 f.debug_struct("FskPacketStatus") 152 f.debug_struct("FskPacketStatus")
153 .field("status", &self.status()) 153 .field("status", &self.status())
@@ -170,7 +170,7 @@ impl core::fmt::Display for FskPacketStatus {
170/// Returned by [`lora_packet_status`]. 170/// Returned by [`lora_packet_status`].
171/// 171///
172/// [`lora_packet_status`]: super::SubGhz::lora_packet_status 172/// [`lora_packet_status`]: super::SubGhz::lora_packet_status
173#[derive(Debug, Clone, Copy, PartialEq, Eq)] 173#[derive(Clone, Copy, PartialEq, Eq)]
174pub struct LoRaPacketStatus { 174pub struct LoRaPacketStatus {
175 buf: [u8; 4], 175 buf: [u8; 4],
176} 176}
@@ -187,7 +187,7 @@ impl LoRaPacketStatus {
187 /// # Example 187 /// # Example
188 /// 188 ///
189 /// ``` 189 /// ```
190 /// use stm32wl_hal::subghz::{CmdStatus, LoRaPacketStatus, Status, StatusMode}; 190 /// use stm32wlxx_hal::subghz::{CmdStatus, LoRaPacketStatus, Status, StatusMode};
191 /// 191 ///
192 /// let example_data_from_radio: [u8; 4] = [0x54, 0, 0, 0]; 192 /// let example_data_from_radio: [u8; 4] = [0x54, 0, 0, 0];
193 /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio); 193 /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio);
@@ -206,7 +206,7 @@ impl LoRaPacketStatus {
206 /// # Example 206 /// # Example
207 /// 207 ///
208 /// ``` 208 /// ```
209 /// use stm32wl_hal::{subghz::LoRaPacketStatus, Ratio}; 209 /// use stm32wlxx_hal::{subghz::LoRaPacketStatus, Ratio};
210 /// 210 ///
211 /// let example_data_from_radio: [u8; 4] = [0, 80, 0, 0]; 211 /// let example_data_from_radio: [u8; 4] = [0, 80, 0, 0];
212 /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio); 212 /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio);
@@ -223,7 +223,7 @@ impl LoRaPacketStatus {
223 /// # Example 223 /// # Example
224 /// 224 ///
225 /// ``` 225 /// ```
226 /// use stm32wl_hal::{subghz::LoRaPacketStatus, Ratio}; 226 /// use stm32wlxx_hal::{subghz::LoRaPacketStatus, Ratio};
227 /// 227 ///
228 /// let example_data_from_radio: [u8; 4] = [0, 0, 40, 0]; 228 /// let example_data_from_radio: [u8; 4] = [0, 0, 40, 0];
229 /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio); 229 /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio);
@@ -240,7 +240,7 @@ impl LoRaPacketStatus {
240 /// # Example 240 /// # Example
241 /// 241 ///
242 /// ``` 242 /// ```
243 /// use stm32wl_hal::{subghz::LoRaPacketStatus, Ratio}; 243 /// use stm32wlxx_hal::{subghz::LoRaPacketStatus, Ratio};
244 /// 244 ///
245 /// let example_data_from_radio: [u8; 4] = [0, 0, 0, 80]; 245 /// let example_data_from_radio: [u8; 4] = [0, 0, 0, 80];
246 /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio); 246 /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio);
@@ -270,7 +270,7 @@ impl defmt::Format for LoRaPacketStatus {
270 } 270 }
271} 271}
272 272
273impl core::fmt::Display for LoRaPacketStatus { 273impl core::fmt::Debug for LoRaPacketStatus {
274 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { 274 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
275 f.debug_struct("LoRaPacketStatus") 275 f.debug_struct("LoRaPacketStatus")
276 .field("status", &self.status()) 276 .field("status", &self.status())
diff --git a/embassy-stm32/src/subghz/packet_type.rs b/embassy-stm32/src/subghz/packet_type.rs
index 4a4e1072d..88c62bb6a 100644
--- a/embassy-stm32/src/subghz/packet_type.rs
+++ b/embassy-stm32/src/subghz/packet_type.rs
@@ -23,7 +23,7 @@ impl PacketType {
23 /// # Example 23 /// # Example
24 /// 24 ///
25 /// ``` 25 /// ```
26 /// use stm32wl_hal::subghz::PacketType; 26 /// use stm32wlxx_hal::subghz::PacketType;
27 /// 27 ///
28 /// assert_eq!(PacketType::from_raw(0), Ok(PacketType::Fsk)); 28 /// assert_eq!(PacketType::from_raw(0), Ok(PacketType::Fsk));
29 /// assert_eq!(PacketType::from_raw(1), Ok(PacketType::LoRa)); 29 /// assert_eq!(PacketType::from_raw(1), Ok(PacketType::LoRa));
diff --git a/embassy-stm32/src/subghz/pkt_ctrl.rs b/embassy-stm32/src/subghz/pkt_ctrl.rs
index 0d3fa4dae..265833e35 100644
--- a/embassy-stm32/src/subghz/pkt_ctrl.rs
+++ b/embassy-stm32/src/subghz/pkt_ctrl.rs
@@ -50,7 +50,7 @@ impl PktCtrl {
50 /// # Example 50 /// # Example
51 /// 51 ///
52 /// ``` 52 /// ```
53 /// use stm32wl_hal::subghz::PktCtrl; 53 /// use stm32wlxx_hal::subghz::PktCtrl;
54 /// 54 ///
55 /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_sync_det_en(true); 55 /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_sync_det_en(true);
56 /// ``` 56 /// ```
@@ -70,7 +70,7 @@ impl PktCtrl {
70 /// # Example 70 /// # Example
71 /// 71 ///
72 /// ``` 72 /// ```
73 /// use stm32wl_hal::subghz::PktCtrl; 73 /// use stm32wlxx_hal::subghz::PktCtrl;
74 /// 74 ///
75 /// let pc: PktCtrl = PktCtrl::RESET; 75 /// let pc: PktCtrl = PktCtrl::RESET;
76 /// assert_eq!(pc.sync_det_en(), true); 76 /// assert_eq!(pc.sync_det_en(), true);
@@ -88,7 +88,7 @@ impl PktCtrl {
88 /// # Example 88 /// # Example
89 /// 89 ///
90 /// ``` 90 /// ```
91 /// use stm32wl_hal::subghz::PktCtrl; 91 /// use stm32wlxx_hal::subghz::PktCtrl;
92 /// 92 ///
93 /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_cont_tx_en(true); 93 /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_cont_tx_en(true);
94 /// ``` 94 /// ```
@@ -107,7 +107,7 @@ impl PktCtrl {
107 /// # Example 107 /// # Example
108 /// 108 ///
109 /// ``` 109 /// ```
110 /// use stm32wl_hal::subghz::PktCtrl; 110 /// use stm32wlxx_hal::subghz::PktCtrl;
111 /// 111 ///
112 /// let pc: PktCtrl = PktCtrl::RESET; 112 /// let pc: PktCtrl = PktCtrl::RESET;
113 /// assert_eq!(pc.cont_tx_en(), false); 113 /// assert_eq!(pc.cont_tx_en(), false);
@@ -133,7 +133,7 @@ impl PktCtrl {
133 /// # Example 133 /// # Example
134 /// 134 ///
135 /// ``` 135 /// ```
136 /// use stm32wl_hal::subghz::{InfSeqSel, PktCtrl}; 136 /// use stm32wlxx_hal::subghz::{InfSeqSel, PktCtrl};
137 /// 137 ///
138 /// let pc: PktCtrl = PktCtrl::RESET; 138 /// let pc: PktCtrl = PktCtrl::RESET;
139 /// assert_eq!(pc.inf_seq_sel(), InfSeqSel::Five); 139 /// assert_eq!(pc.inf_seq_sel(), InfSeqSel::Five);
@@ -159,12 +159,12 @@ impl PktCtrl {
159 } 159 }
160 } 160 }
161 161
162 /// Enable infinute sequence generation. 162 /// Enable infinite sequence generation.
163 /// 163 ///
164 /// # Example 164 /// # Example
165 /// 165 ///
166 /// ``` 166 /// ```
167 /// use stm32wl_hal::subghz::PktCtrl; 167 /// use stm32wlxx_hal::subghz::PktCtrl;
168 /// 168 ///
169 /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_inf_seq_en(true); 169 /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_inf_seq_en(true);
170 /// ``` 170 /// ```
@@ -178,12 +178,12 @@ impl PktCtrl {
178 self 178 self
179 } 179 }
180 180
181 /// Returns `true` if infinute sequence generation is enabled. 181 /// Returns `true` if infinite sequence generation is enabled.
182 /// 182 ///
183 /// # Example 183 /// # Example
184 /// 184 ///
185 /// ``` 185 /// ```
186 /// use stm32wl_hal::subghz::PktCtrl; 186 /// use stm32wlxx_hal::subghz::PktCtrl;
187 /// 187 ///
188 /// let pc: PktCtrl = PktCtrl::RESET; 188 /// let pc: PktCtrl = PktCtrl::RESET;
189 /// assert_eq!(pc.inf_seq_en(), false); 189 /// assert_eq!(pc.inf_seq_en(), false);
@@ -201,7 +201,7 @@ impl PktCtrl {
201 /// # Example 201 /// # Example
202 /// 202 ///
203 /// ``` 203 /// ```
204 /// use stm32wl_hal::subghz::PktCtrl; 204 /// use stm32wlxx_hal::subghz::PktCtrl;
205 /// 205 ///
206 /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_whitening_init(true); 206 /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_whitening_init(true);
207 /// ``` 207 /// ```
@@ -220,7 +220,7 @@ impl PktCtrl {
220 /// # Example 220 /// # Example
221 /// 221 ///
222 /// ``` 222 /// ```
223 /// use stm32wl_hal::subghz::PktCtrl; 223 /// use stm32wlxx_hal::subghz::PktCtrl;
224 /// 224 ///
225 /// let pc: PktCtrl = PktCtrl::RESET; 225 /// let pc: PktCtrl = PktCtrl::RESET;
226 /// assert_eq!(pc.whitening_init(), true); 226 /// assert_eq!(pc.whitening_init(), true);
diff --git a/embassy-stm32/src/subghz/pwr_ctrl.rs b/embassy-stm32/src/subghz/pwr_ctrl.rs
index 2e188a960..974bddebb 100644
--- a/embassy-stm32/src/subghz/pwr_ctrl.rs
+++ b/embassy-stm32/src/subghz/pwr_ctrl.rs
@@ -21,7 +21,7 @@ impl CurrentLim {
21 /// # Example 21 /// # Example
22 /// 22 ///
23 /// ``` 23 /// ```
24 /// use stm32wl_hal::subghz::CurrentLim; 24 /// use stm32wlxx_hal::subghz::CurrentLim;
25 /// 25 ///
26 /// assert_eq!(CurrentLim::Milli25.as_milliamps(), 25); 26 /// assert_eq!(CurrentLim::Milli25.as_milliamps(), 25);
27 /// assert_eq!(CurrentLim::Milli50.as_milliamps(), 50); 27 /// assert_eq!(CurrentLim::Milli50.as_milliamps(), 50);
@@ -74,7 +74,7 @@ impl PwrCtrl {
74 /// # Example 74 /// # Example
75 /// 75 ///
76 /// ``` 76 /// ```
77 /// use stm32wl_hal::subghz::PwrCtrl; 77 /// use stm32wlxx_hal::subghz::PwrCtrl;
78 /// 78 ///
79 /// const PWR_CTRL: PwrCtrl = PwrCtrl::RESET.set_current_lim_en(true); 79 /// const PWR_CTRL: PwrCtrl = PwrCtrl::RESET.set_current_lim_en(true);
80 /// # assert_eq!(u8::from(PWR_CTRL), 0x50u8); 80 /// # assert_eq!(u8::from(PWR_CTRL), 0x50u8);
@@ -94,7 +94,7 @@ impl PwrCtrl {
94 /// # Example 94 /// # Example
95 /// 95 ///
96 /// ``` 96 /// ```
97 /// use stm32wl_hal::subghz::PwrCtrl; 97 /// use stm32wlxx_hal::subghz::PwrCtrl;
98 /// 98 ///
99 /// let pc: PwrCtrl = PwrCtrl::RESET; 99 /// let pc: PwrCtrl = PwrCtrl::RESET;
100 /// assert_eq!(pc.current_limit_en(), true); 100 /// assert_eq!(pc.current_limit_en(), true);
@@ -120,7 +120,7 @@ impl PwrCtrl {
120 /// # Example 120 /// # Example
121 /// 121 ///
122 /// ``` 122 /// ```
123 /// use stm32wl_hal::subghz::{CurrentLim, PwrCtrl}; 123 /// use stm32wlxx_hal::subghz::{CurrentLim, PwrCtrl};
124 /// 124 ///
125 /// let pc: PwrCtrl = PwrCtrl::RESET; 125 /// let pc: PwrCtrl = PwrCtrl::RESET;
126 /// assert_eq!(pc.current_lim(), CurrentLim::Milli50); 126 /// assert_eq!(pc.current_lim(), CurrentLim::Milli50);
diff --git a/embassy-stm32/src/subghz/rf_frequency.rs b/embassy-stm32/src/subghz/rf_frequency.rs
index 520dc89d7..3de2f50c4 100644
--- a/embassy-stm32/src/subghz/rf_frequency.rs
+++ b/embassy-stm32/src/subghz/rf_frequency.rs
@@ -15,7 +15,7 @@ impl RfFreq {
15 /// # Example 15 /// # Example
16 /// 16 ///
17 /// ``` 17 /// ```
18 /// use stm32wl_hal::subghz::RfFreq; 18 /// use stm32wlxx_hal::subghz::RfFreq;
19 /// 19 ///
20 /// assert_eq!(RfFreq::F915.freq(), 915_000_000); 20 /// assert_eq!(RfFreq::F915.freq(), 915_000_000);
21 /// ``` 21 /// ```
@@ -26,7 +26,7 @@ impl RfFreq {
26 /// # Example 26 /// # Example
27 /// 27 ///
28 /// ``` 28 /// ```
29 /// use stm32wl_hal::subghz::RfFreq; 29 /// use stm32wlxx_hal::subghz::RfFreq;
30 /// 30 ///
31 /// assert_eq!(RfFreq::F868.freq(), 868_000_000); 31 /// assert_eq!(RfFreq::F868.freq(), 868_000_000);
32 /// ``` 32 /// ```
@@ -37,7 +37,7 @@ impl RfFreq {
37 /// # Example 37 /// # Example
38 /// 38 ///
39 /// ``` 39 /// ```
40 /// use stm32wl_hal::subghz::RfFreq; 40 /// use stm32wlxx_hal::subghz::RfFreq;
41 /// 41 ///
42 /// assert_eq!(RfFreq::F433.freq(), 433_000_000); 42 /// assert_eq!(RfFreq::F433.freq(), 433_000_000);
43 /// ``` 43 /// ```
@@ -52,7 +52,7 @@ impl RfFreq {
52 /// # Example 52 /// # Example
53 /// 53 ///
54 /// ``` 54 /// ```
55 /// use stm32wl_hal::subghz::RfFreq; 55 /// use stm32wlxx_hal::subghz::RfFreq;
56 /// 56 ///
57 /// const FREQ: RfFreq = RfFreq::from_raw(0x39300000); 57 /// const FREQ: RfFreq = RfFreq::from_raw(0x39300000);
58 /// assert_eq!(FREQ, RfFreq::F915); 58 /// assert_eq!(FREQ, RfFreq::F915);
@@ -78,7 +78,7 @@ impl RfFreq {
78 /// # Example 78 /// # Example
79 /// 79 ///
80 /// ``` 80 /// ```
81 /// use stm32wl_hal::subghz::RfFreq; 81 /// use stm32wlxx_hal::subghz::RfFreq;
82 /// 82 ///
83 /// const FREQ: RfFreq = RfFreq::from_frequency(915_000_000); 83 /// const FREQ: RfFreq = RfFreq::from_frequency(915_000_000);
84 /// assert_eq!(FREQ, RfFreq::F915); 84 /// assert_eq!(FREQ, RfFreq::F915);
@@ -97,7 +97,7 @@ impl RfFreq {
97 /// # Example 97 /// # Example
98 /// 98 ///
99 /// ``` 99 /// ```
100 /// use stm32wl_hal::subghz::RfFreq; 100 /// use stm32wlxx_hal::subghz::RfFreq;
101 /// 101 ///
102 /// assert_eq!(RfFreq::from_raw(0x39300000).freq(), 915_000_000); 102 /// assert_eq!(RfFreq::from_raw(0x39300000).freq(), 915_000_000);
103 /// ``` 103 /// ```
@@ -110,7 +110,7 @@ impl RfFreq {
110 /// # Example 110 /// # Example
111 /// 111 ///
112 /// ``` 112 /// ```
113 /// use stm32wl_hal::subghz::RfFreq; 113 /// use stm32wlxx_hal::subghz::RfFreq;
114 /// 114 ///
115 /// assert_eq!(RfFreq::F915.as_slice(), &[0x86, 0x39, 0x30, 0x00, 0x00]); 115 /// assert_eq!(RfFreq::F915.as_slice(), &[0x86, 0x39, 0x30, 0x00, 0x00]);
116 /// ``` 116 /// ```
diff --git a/embassy-stm32/src/subghz/sleep_cfg.rs b/embassy-stm32/src/subghz/sleep_cfg.rs
index 2d2fe0c9c..0a50e9704 100644
--- a/embassy-stm32/src/subghz/sleep_cfg.rs
+++ b/embassy-stm32/src/subghz/sleep_cfg.rs
@@ -42,7 +42,7 @@ impl SleepCfg {
42 /// # Example 42 /// # Example
43 /// 43 ///
44 /// ``` 44 /// ```
45 /// use stm32wl_hal::subghz::SleepCfg; 45 /// use stm32wlxx_hal::subghz::SleepCfg;
46 /// 46 ///
47 /// const SLEEP_CFG: SleepCfg = SleepCfg::new(); 47 /// const SLEEP_CFG: SleepCfg = SleepCfg::new();
48 /// assert_eq!(SLEEP_CFG, SleepCfg::default()); 48 /// assert_eq!(SLEEP_CFG, SleepCfg::default());
@@ -57,7 +57,7 @@ impl SleepCfg {
57 /// # Example 57 /// # Example
58 /// 58 ///
59 /// ``` 59 /// ```
60 /// use stm32wl_hal::subghz::{SleepCfg, Startup}; 60 /// use stm32wlxx_hal::subghz::{SleepCfg, Startup};
61 /// 61 ///
62 /// const SLEEP_CFG: SleepCfg = SleepCfg::new().set_startup(Startup::Cold); 62 /// const SLEEP_CFG: SleepCfg = SleepCfg::new().set_startup(Startup::Cold);
63 /// # assert_eq!(u8::from(SLEEP_CFG), 0b001); 63 /// # assert_eq!(u8::from(SLEEP_CFG), 0b001);
@@ -77,7 +77,7 @@ impl SleepCfg {
77 /// # Example 77 /// # Example
78 /// 78 ///
79 /// ``` 79 /// ```
80 /// use stm32wl_hal::subghz::SleepCfg; 80 /// use stm32wlxx_hal::subghz::SleepCfg;
81 /// 81 ///
82 /// const SLEEP_CFG: SleepCfg = SleepCfg::new().set_rtc_wakeup_en(false); 82 /// const SLEEP_CFG: SleepCfg = SleepCfg::new().set_rtc_wakeup_en(false);
83 /// # assert_eq!(u8::from(SLEEP_CFG), 0b100); 83 /// # assert_eq!(u8::from(SLEEP_CFG), 0b100);
diff --git a/embassy-stm32/src/subghz/smps.rs b/embassy-stm32/src/subghz/smps.rs
index 3d843b017..81615ea7b 100644
--- a/embassy-stm32/src/subghz/smps.rs
+++ b/embassy-stm32/src/subghz/smps.rs
@@ -21,7 +21,7 @@ impl SmpsDrv {
21 /// # Example 21 /// # Example
22 /// 22 ///
23 /// ``` 23 /// ```
24 /// use stm32wl_hal::subghz::SmpsDrv; 24 /// use stm32wlxx_hal::subghz::SmpsDrv;
25 /// 25 ///
26 /// assert_eq!(SmpsDrv::Milli20.as_milliamps(), 20); 26 /// assert_eq!(SmpsDrv::Milli20.as_milliamps(), 20);
27 /// assert_eq!(SmpsDrv::Milli40.as_milliamps(), 40); 27 /// assert_eq!(SmpsDrv::Milli40.as_milliamps(), 40);
diff --git a/embassy-stm32/src/subghz/stats.rs b/embassy-stm32/src/subghz/stats.rs
index 46dc2bdfe..41b7a200f 100644
--- a/embassy-stm32/src/subghz/stats.rs
+++ b/embassy-stm32/src/subghz/stats.rs
@@ -26,7 +26,7 @@ impl FskStats {
26/// 26///
27/// [`fsk_stats`]: super::SubGhz::fsk_stats 27/// [`fsk_stats`]: super::SubGhz::fsk_stats
28/// [`lora_stats`]: super::SubGhz::lora_stats 28/// [`lora_stats`]: super::SubGhz::lora_stats
29#[derive(Debug, Eq, PartialEq, Clone, Copy)] 29#[derive(Eq, PartialEq, Clone, Copy)]
30#[cfg_attr(feature = "defmt", derive(defmt::Format))] 30#[cfg_attr(feature = "defmt", derive(defmt::Format))]
31pub struct Stats<ModType> { 31pub struct Stats<ModType> {
32 status: Status, 32 status: Status,
@@ -52,7 +52,7 @@ impl<ModType> Stats<ModType> {
52 /// # Example 52 /// # Example
53 /// 53 ///
54 /// ``` 54 /// ```
55 /// use stm32wl_hal::subghz::{CmdStatus, FskStats, Stats, StatusMode}; 55 /// use stm32wlxx_hal::subghz::{CmdStatus, FskStats, Stats, StatusMode};
56 /// 56 ///
57 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 0]; 57 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 0];
58 /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio); 58 /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio);
@@ -68,7 +68,7 @@ impl<ModType> Stats<ModType> {
68 /// # Example 68 /// # Example
69 /// 69 ///
70 /// ``` 70 /// ```
71 /// use stm32wl_hal::subghz::{FskStats, Stats}; 71 /// use stm32wlxx_hal::subghz::{FskStats, Stats};
72 /// 72 ///
73 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 3, 0, 0, 0, 0]; 73 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 3, 0, 0, 0, 0];
74 /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio); 74 /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio);
@@ -83,7 +83,7 @@ impl<ModType> Stats<ModType> {
83 /// # Example 83 /// # Example
84 /// 84 ///
85 /// ``` 85 /// ```
86 /// use stm32wl_hal::subghz::{LoRaStats, Stats}; 86 /// use stm32wlxx_hal::subghz::{LoRaStats, Stats};
87 /// 87 ///
88 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 1, 0, 0]; 88 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 1, 0, 0];
89 /// let stats: Stats<LoRaStats> = Stats::from_raw_lora(example_data_from_radio); 89 /// let stats: Stats<LoRaStats> = Stats::from_raw_lora(example_data_from_radio);
@@ -100,7 +100,7 @@ impl Stats<FskStats> {
100 /// # Example 100 /// # Example
101 /// 101 ///
102 /// ``` 102 /// ```
103 /// use stm32wl_hal::subghz::{FskStats, Stats}; 103 /// use stm32wlxx_hal::subghz::{FskStats, Stats};
104 /// 104 ///
105 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 0]; 105 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 0];
106 /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio); 106 /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio);
@@ -114,7 +114,7 @@ impl Stats<FskStats> {
114 /// # Example 114 /// # Example
115 /// 115 ///
116 /// ``` 116 /// ```
117 /// use stm32wl_hal::subghz::{FskStats, Stats}; 117 /// use stm32wlxx_hal::subghz::{FskStats, Stats};
118 /// 118 ///
119 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 1]; 119 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 1];
120 /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio); 120 /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio);
@@ -131,7 +131,7 @@ impl Stats<LoRaStats> {
131 /// # Example 131 /// # Example
132 /// 132 ///
133 /// ``` 133 /// ```
134 /// use stm32wl_hal::subghz::{LoRaStats, Stats}; 134 /// use stm32wlxx_hal::subghz::{LoRaStats, Stats};
135 /// 135 ///
136 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 0]; 136 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 0];
137 /// let stats: Stats<LoRaStats> = Stats::from_raw_lora(example_data_from_radio); 137 /// let stats: Stats<LoRaStats> = Stats::from_raw_lora(example_data_from_radio);
@@ -145,7 +145,7 @@ impl Stats<LoRaStats> {
145 /// # Example 145 /// # Example
146 /// 146 ///
147 /// ``` 147 /// ```
148 /// use stm32wl_hal::subghz::{LoRaStats, Stats}; 148 /// use stm32wlxx_hal::subghz::{LoRaStats, Stats};
149 /// 149 ///
150 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 1]; 150 /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 1];
151 /// let stats: Stats<LoRaStats> = Stats::from_raw_lora(example_data_from_radio); 151 /// let stats: Stats<LoRaStats> = Stats::from_raw_lora(example_data_from_radio);
@@ -156,7 +156,7 @@ impl Stats<LoRaStats> {
156 } 156 }
157} 157}
158 158
159impl core::fmt::Display for Stats<FskStats> { 159impl core::fmt::Debug for Stats<FskStats> {
160 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { 160 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
161 f.debug_struct("Stats") 161 f.debug_struct("Stats")
162 .field("status", &self.status()) 162 .field("status", &self.status())
diff --git a/embassy-stm32/src/subghz/status.rs b/embassy-stm32/src/subghz/status.rs
index 10a212b99..b84034f68 100644
--- a/embassy-stm32/src/subghz/status.rs
+++ b/embassy-stm32/src/subghz/status.rs
@@ -1,6 +1,6 @@
1/// sub-GHz radio operating mode. 1/// sub-GHz radio operating mode.
2/// 2///
3/// See `Get_Status` under section 5.8.5 "Communcation status information commands" 3/// See `Get_Status` under section 5.8.5 "Communication status information commands"
4/// in the reference manual. 4/// in the reference manual.
5/// 5///
6/// This is returned by [`Status::mode`]. 6/// This is returned by [`Status::mode`].
@@ -26,7 +26,7 @@ impl StatusMode {
26 /// # Example 26 /// # Example
27 /// 27 ///
28 /// ``` 28 /// ```
29 /// use stm32wl_hal::subghz::StatusMode; 29 /// use stm32wlxx_hal::subghz::StatusMode;
30 /// 30 ///
31 /// assert_eq!(StatusMode::from_raw(0x2), Ok(StatusMode::StandbyRc)); 31 /// assert_eq!(StatusMode::from_raw(0x2), Ok(StatusMode::StandbyRc));
32 /// assert_eq!(StatusMode::from_raw(0x3), Ok(StatusMode::StandbyHse)); 32 /// assert_eq!(StatusMode::from_raw(0x3), Ok(StatusMode::StandbyHse));
@@ -50,7 +50,7 @@ impl StatusMode {
50 50
51/// Command status. 51/// Command status.
52/// 52///
53/// See `Get_Status` under section 5.8.5 "Communcation status information commands" 53/// See `Get_Status` under section 5.8.5 "Communication status information commands"
54/// in the reference manual. 54/// in the reference manual.
55/// 55///
56/// This is returned by [`Status::cmd`]. 56/// This is returned by [`Status::cmd`].
@@ -89,7 +89,7 @@ impl CmdStatus {
89 /// # Example 89 /// # Example
90 /// 90 ///
91 /// ``` 91 /// ```
92 /// use stm32wl_hal::subghz::CmdStatus; 92 /// use stm32wlxx_hal::subghz::CmdStatus;
93 /// 93 ///
94 /// assert_eq!(CmdStatus::from_raw(0x2), Ok(CmdStatus::Avaliable)); 94 /// assert_eq!(CmdStatus::from_raw(0x2), Ok(CmdStatus::Avaliable));
95 /// assert_eq!(CmdStatus::from_raw(0x3), Ok(CmdStatus::Timeout)); 95 /// assert_eq!(CmdStatus::from_raw(0x3), Ok(CmdStatus::Timeout));
@@ -116,7 +116,7 @@ impl CmdStatus {
116/// This is returned by [`status`]. 116/// This is returned by [`status`].
117/// 117///
118/// [`status`]: super::SubGhz::status 118/// [`status`]: super::SubGhz::status
119#[derive(Debug, PartialEq, Eq, Clone, Copy)] 119#[derive(PartialEq, Eq, Clone, Copy)]
120pub struct Status(u8); 120pub struct Status(u8);
121 121
122impl From<u8> for Status { 122impl From<u8> for Status {
@@ -138,7 +138,7 @@ impl Status {
138 /// # Example 138 /// # Example
139 /// 139 ///
140 /// ``` 140 /// ```
141 /// use stm32wl_hal::subghz::{CmdStatus, Status, StatusMode}; 141 /// use stm32wlxx_hal::subghz::{CmdStatus, Status, StatusMode};
142 /// 142 ///
143 /// const STATUS: Status = Status::from_raw(0x54_u8); 143 /// const STATUS: Status = Status::from_raw(0x54_u8);
144 /// assert_eq!(STATUS.mode(), Ok(StatusMode::Rx)); 144 /// assert_eq!(STATUS.mode(), Ok(StatusMode::Rx));
@@ -153,7 +153,7 @@ impl Status {
153 /// # Example 153 /// # Example
154 /// 154 ///
155 /// ``` 155 /// ```
156 /// use stm32wl_hal::subghz::{Status, StatusMode}; 156 /// use stm32wlxx_hal::subghz::{Status, StatusMode};
157 /// 157 ///
158 /// let status: Status = 0xACu8.into(); 158 /// let status: Status = 0xACu8.into();
159 /// assert_eq!(status.mode(), Ok(StatusMode::StandbyRc)); 159 /// assert_eq!(status.mode(), Ok(StatusMode::StandbyRc));
@@ -164,13 +164,13 @@ impl Status {
164 164
165 /// Command status. 165 /// Command status.
166 /// 166 ///
167 /// For some reason `Err(1)` is a pretty common return value for this, 167 /// This method frequently returns reserved values such as `Err(1)`.
168 /// despite being a reserved value. 168 /// ST support has confirmed that this is normal and should be ignored.
169 /// 169 ///
170 /// # Example 170 /// # Example
171 /// 171 ///
172 /// ``` 172 /// ```
173 /// use stm32wl_hal::subghz::{CmdStatus, Status}; 173 /// use stm32wlxx_hal::subghz::{CmdStatus, Status};
174 /// 174 ///
175 /// let status: Status = 0xACu8.into(); 175 /// let status: Status = 0xACu8.into();
176 /// assert_eq!(status.cmd(), Ok(CmdStatus::Complete)); 176 /// assert_eq!(status.cmd(), Ok(CmdStatus::Complete));
@@ -180,7 +180,7 @@ impl Status {
180 } 180 }
181} 181}
182 182
183impl core::fmt::Display for Status { 183impl core::fmt::Debug for Status {
184 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { 184 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
185 f.debug_struct("Status") 185 f.debug_struct("Status")
186 .field("mode", &self.mode()) 186 .field("mode", &self.mode())
diff --git a/embassy-stm32/src/subghz/tcxo_mode.rs b/embassy-stm32/src/subghz/tcxo_mode.rs
index 64d7d3298..698dee0a6 100644
--- a/embassy-stm32/src/subghz/tcxo_mode.rs
+++ b/embassy-stm32/src/subghz/tcxo_mode.rs
@@ -49,7 +49,7 @@ impl TcxoTrim {
49 /// # Example 49 /// # Example
50 /// 50 ///
51 /// ``` 51 /// ```
52 /// use stm32wl_hal::subghz::TcxoTrim; 52 /// use stm32wlxx_hal::subghz::TcxoTrim;
53 /// 53 ///
54 /// assert_eq!(TcxoTrim::Volts1pt6.as_millivolts(), 1600); 54 /// assert_eq!(TcxoTrim::Volts1pt6.as_millivolts(), 1600);
55 /// assert_eq!(TcxoTrim::Volts1pt7.as_millivolts(), 1700); 55 /// assert_eq!(TcxoTrim::Volts1pt7.as_millivolts(), 1700);
@@ -93,7 +93,7 @@ impl TcxoMode {
93 /// # Example 93 /// # Example
94 /// 94 ///
95 /// ``` 95 /// ```
96 /// use stm32wl_hal::subghz::TcxoMode; 96 /// use stm32wlxx_hal::subghz::TcxoMode;
97 /// 97 ///
98 /// const TCXO_MODE: TcxoMode = TcxoMode::new(); 98 /// const TCXO_MODE: TcxoMode = TcxoMode::new();
99 /// ``` 99 /// ```
@@ -111,7 +111,7 @@ impl TcxoMode {
111 /// # Example 111 /// # Example
112 /// 112 ///
113 /// ``` 113 /// ```
114 /// use stm32wl_hal::subghz::{TcxoMode, TcxoTrim}; 114 /// use stm32wlxx_hal::subghz::{TcxoMode, TcxoTrim};
115 /// 115 ///
116 /// const TCXO_MODE: TcxoMode = TcxoMode::new().set_txco_trim(TcxoTrim::Volts1pt6); 116 /// const TCXO_MODE: TcxoMode = TcxoMode::new().set_txco_trim(TcxoTrim::Volts1pt6);
117 /// # assert_eq!(TCXO_MODE.as_slice()[1], 0x00); 117 /// # assert_eq!(TCXO_MODE.as_slice()[1], 0x00);
@@ -128,7 +128,7 @@ impl TcxoMode {
128 /// 128 ///
129 /// ``` 129 /// ```
130 /// use core::time::Duration; 130 /// use core::time::Duration;
131 /// use stm32wl_hal::subghz::{TcxoMode, Timeout}; 131 /// use stm32wlxx_hal::subghz::{TcxoMode, Timeout};
132 /// 132 ///
133 /// // 15.625 ms timeout 133 /// // 15.625 ms timeout
134 /// const TIMEOUT: Timeout = Timeout::from_duration_sat(Duration::from_millis(15_625)); 134 /// const TIMEOUT: Timeout = Timeout::from_duration_sat(Duration::from_millis(15_625));
@@ -151,7 +151,7 @@ impl TcxoMode {
151 /// # Example 151 /// # Example
152 /// 152 ///
153 /// ``` 153 /// ```
154 /// use stm32wl_hal::subghz::{TcxoMode, TcxoTrim, Timeout}; 154 /// use stm32wlxx_hal::subghz::{TcxoMode, TcxoTrim, Timeout};
155 /// 155 ///
156 /// const TCXO_MODE: TcxoMode = TcxoMode::new() 156 /// const TCXO_MODE: TcxoMode = TcxoMode::new()
157 /// .set_txco_trim(TcxoTrim::Volts1pt7) 157 /// .set_txco_trim(TcxoTrim::Volts1pt7)
diff --git a/embassy-stm32/src/subghz/timeout.rs b/embassy-stm32/src/subghz/timeout.rs
index 2a0f5b85e..9dbdc6374 100644
--- a/embassy-stm32/src/subghz/timeout.rs
+++ b/embassy-stm32/src/subghz/timeout.rs
@@ -1,6 +1,6 @@
1use core::time::Duration; 1use core::time::Duration;
2 2
3use crate::subghz::value_error::ValueError; 3use super::ValueError;
4 4
5const fn abs_diff(a: u64, b: u64) -> u64 { 5const fn abs_diff(a: u64, b: u64) -> u64 {
6 if a > b { 6 if a > b {
@@ -20,9 +20,9 @@ const fn abs_diff(a: u64, b: u64) -> u64 {
20/// Each timeout has 3 bytes, with a resolution of 15.625µs per bit, giving a 20/// Each timeout has 3 bytes, with a resolution of 15.625µs per bit, giving a
21/// range of 0s to 262.143984375s. 21/// range of 0s to 262.143984375s.
22/// 22///
23/// [`set_rx`]: crate::subghz::SubGhz::set_rx 23/// [`set_rx`]: super::SubGhz::set_rx
24/// [`set_tx`]: crate::subghz::SubGhz::set_tx 24/// [`set_tx`]: super::SubGhz::set_tx
25/// [`TcxoMode`]: crate::subghz::TcxoMode 25/// [`TcxoMode`]: super::TcxoMode
26#[derive(Debug, PartialEq, Eq, PartialOrd, Ord, Clone, Copy)] 26#[derive(Debug, PartialEq, Eq, PartialOrd, Ord, Clone, Copy)]
27#[cfg_attr(feature = "defmt", derive(defmt::Format))] 27#[cfg_attr(feature = "defmt", derive(defmt::Format))]
28pub struct Timeout { 28pub struct Timeout {
@@ -39,7 +39,7 @@ impl Timeout {
39 /// 39 ///
40 /// ``` 40 /// ```
41 /// use core::time::Duration; 41 /// use core::time::Duration;
42 /// use stm32wl_hal::subghz::Timeout; 42 /// use stm32wlxx_hal::subghz::Timeout;
43 /// 43 ///
44 /// const TIMEOUT: Timeout = Timeout::DISABLED; 44 /// const TIMEOUT: Timeout = Timeout::DISABLED;
45 /// assert_eq!(TIMEOUT.as_duration(), Duration::from_secs(0)); 45 /// assert_eq!(TIMEOUT.as_duration(), Duration::from_secs(0));
@@ -52,7 +52,7 @@ impl Timeout {
52 /// 52 ///
53 /// ``` 53 /// ```
54 /// use core::time::Duration; 54 /// use core::time::Duration;
55 /// use stm32wl_hal::subghz::Timeout; 55 /// use stm32wlxx_hal::subghz::Timeout;
56 /// 56 ///
57 /// const TIMEOUT: Timeout = Timeout::MIN; 57 /// const TIMEOUT: Timeout = Timeout::MIN;
58 /// assert_eq!(TIMEOUT.into_bits(), 1); 58 /// assert_eq!(TIMEOUT.into_bits(), 1);
@@ -65,7 +65,7 @@ impl Timeout {
65 /// 65 ///
66 /// ``` 66 /// ```
67 /// use core::time::Duration; 67 /// use core::time::Duration;
68 /// use stm32wl_hal::subghz::Timeout; 68 /// use stm32wlxx_hal::subghz::Timeout;
69 /// 69 ///
70 /// const TIMEOUT: Timeout = Timeout::MAX; 70 /// const TIMEOUT: Timeout = Timeout::MAX;
71 /// assert_eq!(TIMEOUT.as_duration(), Duration::from_nanos(262_143_984_375)); 71 /// assert_eq!(TIMEOUT.as_duration(), Duration::from_nanos(262_143_984_375));
@@ -80,7 +80,7 @@ impl Timeout {
80 /// # Example 80 /// # Example
81 /// 81 ///
82 /// ``` 82 /// ```
83 /// use stm32wl_hal::subghz::Timeout; 83 /// use stm32wlxx_hal::subghz::Timeout;
84 /// 84 ///
85 /// assert_eq!( 85 /// assert_eq!(
86 /// Timeout::RESOLUTION.as_nanos(), 86 /// Timeout::RESOLUTION.as_nanos(),
@@ -97,7 +97,7 @@ impl Timeout {
97 /// Use [`from_millis_sat`](Self::from_millis_sat) for runtime timeout 97 /// Use [`from_millis_sat`](Self::from_millis_sat) for runtime timeout
98 /// construction. 98 /// construction.
99 /// This is not _that_ useful right now, it is simply future proofing for a 99 /// This is not _that_ useful right now, it is simply future proofing for a
100 /// time when `Result::unwrap` is avaliable for `const fn`. 100 /// time when `Result::unwrap` is available for `const fn`.
101 /// 101 ///
102 /// # Example 102 /// # Example
103 /// 103 ///
@@ -105,7 +105,7 @@ impl Timeout {
105 /// 105 ///
106 /// ``` 106 /// ```
107 /// use core::time::Duration; 107 /// use core::time::Duration;
108 /// use stm32wl_hal::subghz::{Timeout, ValueError}; 108 /// use stm32wlxx_hal::subghz::{Timeout, ValueError};
109 /// 109 ///
110 /// const MIN: Duration = Timeout::RESOLUTION; 110 /// const MIN: Duration = Timeout::RESOLUTION;
111 /// assert_eq!(Timeout::from_duration(MIN).unwrap(), Timeout::MIN); 111 /// assert_eq!(Timeout::from_duration(MIN).unwrap(), Timeout::MIN);
@@ -115,7 +115,7 @@ impl Timeout {
115 /// 115 ///
116 /// ``` 116 /// ```
117 /// use core::time::Duration; 117 /// use core::time::Duration;
118 /// use stm32wl_hal::subghz::{Timeout, ValueError}; 118 /// use stm32wlxx_hal::subghz::{Timeout, ValueError};
119 /// 119 ///
120 /// const LOWER_LIMIT_NANOS: u128 = 7813; 120 /// const LOWER_LIMIT_NANOS: u128 = 7813;
121 /// const TOO_LOW_NANOS: u128 = LOWER_LIMIT_NANOS - 1; 121 /// const TOO_LOW_NANOS: u128 = LOWER_LIMIT_NANOS - 1;
@@ -130,7 +130,7 @@ impl Timeout {
130 /// 130 ///
131 /// ``` 131 /// ```
132 /// use core::time::Duration; 132 /// use core::time::Duration;
133 /// use stm32wl_hal::subghz::{Timeout, ValueError}; 133 /// use stm32wlxx_hal::subghz::{Timeout, ValueError};
134 /// 134 ///
135 /// const UPPER_LIMIT_NANOS: u128 = Timeout::MAX.as_nanos() as u128 + 7812; 135 /// const UPPER_LIMIT_NANOS: u128 = Timeout::MAX.as_nanos() as u128 + 7812;
136 /// const TOO_HIGH_NANOS: u128 = UPPER_LIMIT_NANOS + 1; 136 /// const TOO_HIGH_NANOS: u128 = UPPER_LIMIT_NANOS + 1;
@@ -186,7 +186,7 @@ impl Timeout {
186 /// 186 ///
187 /// ``` 187 /// ```
188 /// use core::time::Duration; 188 /// use core::time::Duration;
189 /// use stm32wl_hal::subghz::Timeout; 189 /// use stm32wlxx_hal::subghz::Timeout;
190 /// 190 ///
191 /// const DURATION_MAX_NS: u64 = 262_143_984_376; 191 /// const DURATION_MAX_NS: u64 = 262_143_984_376;
192 /// 192 ///
@@ -245,7 +245,7 @@ impl Timeout {
245 /// # Example 245 /// # Example
246 /// 246 ///
247 /// ``` 247 /// ```
248 /// use stm32wl_hal::subghz::Timeout; 248 /// use stm32wlxx_hal::subghz::Timeout;
249 /// 249 ///
250 /// assert_eq!(Timeout::from_millis_sat(0), Timeout::MIN); 250 /// assert_eq!(Timeout::from_millis_sat(0), Timeout::MIN);
251 /// assert_eq!(Timeout::from_millis_sat(262_144), Timeout::MAX); 251 /// assert_eq!(Timeout::from_millis_sat(262_144), Timeout::MAX);
@@ -270,7 +270,7 @@ impl Timeout {
270 /// # Example 270 /// # Example
271 /// 271 ///
272 /// ``` 272 /// ```
273 /// use stm32wl_hal::subghz::Timeout; 273 /// use stm32wlxx_hal::subghz::Timeout;
274 /// 274 ///
275 /// assert_eq!(Timeout::from_raw(u32::MAX), Timeout::MAX); 275 /// assert_eq!(Timeout::from_raw(u32::MAX), Timeout::MAX);
276 /// assert_eq!(Timeout::from_raw(0x00_FF_FF_FF), Timeout::MAX); 276 /// assert_eq!(Timeout::from_raw(0x00_FF_FF_FF), Timeout::MAX);
@@ -288,7 +288,7 @@ impl Timeout {
288 /// # Example 288 /// # Example
289 /// 289 ///
290 /// ``` 290 /// ```
291 /// use stm32wl_hal::subghz::Timeout; 291 /// use stm32wlxx_hal::subghz::Timeout;
292 /// 292 ///
293 /// assert_eq!(Timeout::MAX.as_nanos(), 262_143_984_375); 293 /// assert_eq!(Timeout::MAX.as_nanos(), 262_143_984_375);
294 /// assert_eq!(Timeout::DISABLED.as_nanos(), 0); 294 /// assert_eq!(Timeout::DISABLED.as_nanos(), 0);
@@ -304,7 +304,7 @@ impl Timeout {
304 /// # Example 304 /// # Example
305 /// 305 ///
306 /// ``` 306 /// ```
307 /// use stm32wl_hal::subghz::Timeout; 307 /// use stm32wlxx_hal::subghz::Timeout;
308 /// 308 ///
309 /// assert_eq!(Timeout::MAX.as_micros(), 262_143_984); 309 /// assert_eq!(Timeout::MAX.as_micros(), 262_143_984);
310 /// assert_eq!(Timeout::DISABLED.as_micros(), 0); 310 /// assert_eq!(Timeout::DISABLED.as_micros(), 0);
@@ -320,7 +320,7 @@ impl Timeout {
320 /// # Example 320 /// # Example
321 /// 321 ///
322 /// ``` 322 /// ```
323 /// use stm32wl_hal::subghz::Timeout; 323 /// use stm32wlxx_hal::subghz::Timeout;
324 /// 324 ///
325 /// assert_eq!(Timeout::MAX.as_millis(), 262_143); 325 /// assert_eq!(Timeout::MAX.as_millis(), 262_143);
326 /// assert_eq!(Timeout::DISABLED.as_millis(), 0); 326 /// assert_eq!(Timeout::DISABLED.as_millis(), 0);
@@ -336,7 +336,7 @@ impl Timeout {
336 /// # Example 336 /// # Example
337 /// 337 ///
338 /// ``` 338 /// ```
339 /// use stm32wl_hal::subghz::Timeout; 339 /// use stm32wlxx_hal::subghz::Timeout;
340 /// 340 ///
341 /// assert_eq!(Timeout::MAX.as_secs(), 262); 341 /// assert_eq!(Timeout::MAX.as_secs(), 262);
342 /// assert_eq!(Timeout::DISABLED.as_secs(), 0); 342 /// assert_eq!(Timeout::DISABLED.as_secs(), 0);
@@ -353,7 +353,7 @@ impl Timeout {
353 /// 353 ///
354 /// ``` 354 /// ```
355 /// use core::time::Duration; 355 /// use core::time::Duration;
356 /// use stm32wl_hal::subghz::Timeout; 356 /// use stm32wlxx_hal::subghz::Timeout;
357 /// 357 ///
358 /// assert_eq!( 358 /// assert_eq!(
359 /// Timeout::MAX.as_duration(), 359 /// Timeout::MAX.as_duration(),
@@ -371,7 +371,7 @@ impl Timeout {
371 /// # Example 371 /// # Example
372 /// 372 ///
373 /// ``` 373 /// ```
374 /// use stm32wl_hal::subghz::Timeout; 374 /// use stm32wlxx_hal::subghz::Timeout;
375 /// 375 ///
376 /// assert_eq!(Timeout::from_raw(u32::MAX).into_bits(), 0x00FF_FFFF); 376 /// assert_eq!(Timeout::from_raw(u32::MAX).into_bits(), 0x00FF_FFFF);
377 /// assert_eq!(Timeout::from_raw(1).into_bits(), 1); 377 /// assert_eq!(Timeout::from_raw(1).into_bits(), 1);
@@ -385,7 +385,7 @@ impl Timeout {
385 /// # Example 385 /// # Example
386 /// 386 ///
387 /// ``` 387 /// ```
388 /// use stm32wl_hal::subghz::Timeout; 388 /// use stm32wlxx_hal::subghz::Timeout;
389 /// 389 ///
390 /// assert_eq!(Timeout::from_raw(u32::MAX).as_bytes(), [0xFF, 0xFF, 0xFF]); 390 /// assert_eq!(Timeout::from_raw(u32::MAX).as_bytes(), [0xFF, 0xFF, 0xFF]);
391 /// assert_eq!(Timeout::from_raw(1).as_bytes(), [0, 0, 1]); 391 /// assert_eq!(Timeout::from_raw(1).as_bytes(), [0, 0, 1]);
@@ -397,6 +397,34 @@ impl Timeout {
397 (self.bits & 0xFF) as u8, 397 (self.bits & 0xFF) as u8,
398 ] 398 ]
399 } 399 }
400
401 /// Saturating timeout addition. Computes `self + rhs`, saturating at the
402 /// numeric bounds instead of overflowing.
403 ///
404 /// # Example
405 ///
406 /// ```
407 /// use stm32wlxx_hal::subghz::Timeout;
408 ///
409 /// assert_eq!(
410 /// Timeout::from_raw(0xFF_FF_F0).saturating_add(Timeout::from_raw(0xFF)),
411 /// Timeout::from_raw(0xFF_FF_FF)
412 /// );
413 /// assert_eq!(
414 /// Timeout::from_raw(100).saturating_add(Timeout::from_raw(23)),
415 /// Timeout::from_raw(123)
416 /// );
417 /// ```
418 #[must_use = "saturating_add returns a new Timeout"]
419 pub const fn saturating_add(self, rhs: Self) -> Self {
420 // TODO: use core::cmp::min when it is const
421 let bits: u32 = self.bits.saturating_add(rhs.bits);
422 if bits > Self::MAX.bits {
423 Self::MAX
424 } else {
425 Self { bits }
426 }
427 }
400} 428}
401 429
402impl From<Timeout> for Duration { 430impl From<Timeout> for Duration {
diff --git a/embassy-stm32/src/subghz/tx_params.rs b/embassy-stm32/src/subghz/tx_params.rs
index 278d49bf7..5194a8379 100644
--- a/embassy-stm32/src/subghz/tx_params.rs
+++ b/embassy-stm32/src/subghz/tx_params.rs
@@ -100,7 +100,7 @@ impl TxParams {
100 /// # Example 100 /// # Example
101 /// 101 ///
102 /// ``` 102 /// ```
103 /// use stm32wl_hal::subghz::TxParams; 103 /// use stm32wlxx_hal::subghz::TxParams;
104 /// 104 ///
105 /// const TX_PARAMS: TxParams = TxParams::new(); 105 /// const TX_PARAMS: TxParams = TxParams::new();
106 /// assert_eq!(TX_PARAMS, TxParams::default()); 106 /// assert_eq!(TX_PARAMS, TxParams::default());
@@ -136,7 +136,7 @@ impl TxParams {
136 /// Set the output power to 0 dB. 136 /// Set the output power to 0 dB.
137 /// 137 ///
138 /// ``` 138 /// ```
139 /// use stm32wl_hal::subghz::{RampTime, TxParams}; 139 /// use stm32wlxx_hal::subghz::{RampTime, TxParams};
140 /// 140 ///
141 /// const TX_PARAMS: TxParams = TxParams::new().set_power(0x00); 141 /// const TX_PARAMS: TxParams = TxParams::new().set_power(0x00);
142 /// # assert_eq!(TX_PARAMS.as_slice()[1], 0x00); 142 /// # assert_eq!(TX_PARAMS.as_slice()[1], 0x00);
@@ -156,7 +156,7 @@ impl TxParams {
156 /// Set the ramp time to 200 microseconds. 156 /// Set the ramp time to 200 microseconds.
157 /// 157 ///
158 /// ``` 158 /// ```
159 /// use stm32wl_hal::subghz::{RampTime, TxParams}; 159 /// use stm32wlxx_hal::subghz::{RampTime, TxParams};
160 /// 160 ///
161 /// const TX_PARAMS: TxParams = TxParams::new().set_ramp_time(RampTime::Micros200); 161 /// const TX_PARAMS: TxParams = TxParams::new().set_ramp_time(RampTime::Micros200);
162 /// # assert_eq!(TX_PARAMS.as_slice()[2], 0x04); 162 /// # assert_eq!(TX_PARAMS.as_slice()[2], 0x04);
@@ -172,7 +172,7 @@ impl TxParams {
172 /// # Example 172 /// # Example
173 /// 173 ///
174 /// ``` 174 /// ```
175 /// use stm32wl_hal::subghz::{RampTime, TxParams}; 175 /// use stm32wlxx_hal::subghz::{RampTime, TxParams};
176 /// 176 ///
177 /// const TX_PARAMS: TxParams = TxParams::new() 177 /// const TX_PARAMS: TxParams = TxParams::new()
178 /// .set_ramp_time(RampTime::Micros80) 178 /// .set_ramp_time(RampTime::Micros80)
diff --git a/embassy-stm32/src/subghz/value_error.rs b/embassy-stm32/src/subghz/value_error.rs
index 8ad910081..6a0b489a8 100644
--- a/embassy-stm32/src/subghz/value_error.rs
+++ b/embassy-stm32/src/subghz/value_error.rs
@@ -14,13 +14,13 @@ pub struct ValueError<T> {
14impl<T> ValueError<T> { 14impl<T> ValueError<T> {
15 /// Create a new `ValueError` for a value that exceeded an upper bound. 15 /// Create a new `ValueError` for a value that exceeded an upper bound.
16 /// 16 ///
17 /// Unfortunately panic is not avaliable in `const fn`, so there are no 17 /// Unfortunately panic is not available in `const fn`, so there are no
18 /// guarantees on the value being greater than the limit. 18 /// guarantees on the value being greater than the limit.
19 /// 19 ///
20 /// # Example 20 /// # Example
21 /// 21 ///
22 /// ``` 22 /// ```
23 /// use stm32wl_hal::subghz::ValueError; 23 /// use stm32wlxx_hal::subghz::ValueError;
24 /// 24 ///
25 /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8); 25 /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8);
26 /// assert!(ERROR.over()); 26 /// assert!(ERROR.over());
@@ -36,13 +36,13 @@ impl<T> ValueError<T> {
36 36
37 /// Create a new `ValueError` for a value that exceeded a lower bound. 37 /// Create a new `ValueError` for a value that exceeded a lower bound.
38 /// 38 ///
39 /// Unfortunately panic is not avaliable in `const fn`, so there are no 39 /// Unfortunately panic is not available in `const fn`, so there are no
40 /// guarantees on the value being less than the limit. 40 /// guarantees on the value being less than the limit.
41 /// 41 ///
42 /// # Example 42 /// # Example
43 /// 43 ///
44 /// ``` 44 /// ```
45 /// use stm32wl_hal::subghz::ValueError; 45 /// use stm32wlxx_hal::subghz::ValueError;
46 /// 46 ///
47 /// const ERROR: ValueError<u8> = ValueError::too_low(200u8, 201u8); 47 /// const ERROR: ValueError<u8> = ValueError::too_low(200u8, 201u8);
48 /// assert!(ERROR.under()); 48 /// assert!(ERROR.under());
@@ -61,7 +61,7 @@ impl<T> ValueError<T> {
61 /// # Example 61 /// # Example
62 /// 62 ///
63 /// ``` 63 /// ```
64 /// use stm32wl_hal::subghz::ValueError; 64 /// use stm32wlxx_hal::subghz::ValueError;
65 /// 65 ///
66 /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8); 66 /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8);
67 /// assert_eq!(ERROR.value(), &101u8); 67 /// assert_eq!(ERROR.value(), &101u8);
@@ -75,7 +75,7 @@ impl<T> ValueError<T> {
75 /// # Example 75 /// # Example
76 /// 76 ///
77 /// ``` 77 /// ```
78 /// use stm32wl_hal::subghz::ValueError; 78 /// use stm32wlxx_hal::subghz::ValueError;
79 /// 79 ///
80 /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8); 80 /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8);
81 /// assert_eq!(ERROR.limit(), &100u8); 81 /// assert_eq!(ERROR.limit(), &100u8);
@@ -89,7 +89,7 @@ impl<T> ValueError<T> {
89 /// # Example 89 /// # Example
90 /// 90 ///
91 /// ``` 91 /// ```
92 /// use stm32wl_hal::subghz::ValueError; 92 /// use stm32wlxx_hal::subghz::ValueError;
93 /// 93 ///
94 /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8); 94 /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8);
95 /// assert!(ERROR.over()); 95 /// assert!(ERROR.over());
@@ -104,7 +104,7 @@ impl<T> ValueError<T> {
104 /// # Example 104 /// # Example
105 /// 105 ///
106 /// ``` 106 /// ```
107 /// use stm32wl_hal::subghz::ValueError; 107 /// use stm32wlxx_hal::subghz::ValueError;
108 /// 108 ///
109 /// const ERROR: ValueError<u8> = ValueError::too_low(200u8, 201u8); 109 /// const ERROR: ValueError<u8> = ValueError::too_low(200u8, 201u8);
110 /// assert!(ERROR.under()); 110 /// assert!(ERROR.under());
generated by cgit (git 2.34.1) at 2026-04-06 02:05:45 +0000