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authorDario Nieuwenhuis <[email protected]>2024-11-03 23:57:07 +0000
committerGitHub <[email protected]>2024-11-03 23:57:07 +0000
commit089b8a482e34b7c5168fc5c31d17b128ca01d283 (patch)
treefdc621cedd784616da75aa141d19e3d10366b0b3
parent650f97924ab540d3232b187cbde73d7a0104f734 (diff)
parent43ff5a9b286c8864d7c623362322a6027980b24d (diff)
Merge pull request #3451 from dvdsk/read_ready
stm32/uart impl ReadReady for RingbufferdUart
-rw-r--r--embassy-stm32/src/dma/ringbuffer/mod.rs4
-rw-r--r--embassy-stm32/src/usart/ringbuffered.rs18
2 files changed, 22 insertions, 0 deletions
diff --git a/embassy-stm32/src/dma/ringbuffer/mod.rs b/embassy-stm32/src/dma/ringbuffer/mod.rs
index 12d418414..0da8c374f 100644
--- a/embassy-stm32/src/dma/ringbuffer/mod.rs
+++ b/embassy-stm32/src/dma/ringbuffer/mod.rs
@@ -21,6 +21,10 @@ pub trait DmaCtrl {
21#[cfg_attr(feature = "defmt", derive(defmt::Format))] 21#[cfg_attr(feature = "defmt", derive(defmt::Format))]
22pub enum Error { 22pub enum Error {
23 Overrun, 23 Overrun,
24 /// the newly read DMA positions don't make sense compared to the previous
25 /// ones. This can usually only occur due to wrong Driver implementation, if
26 /// the driver author (or the user using raw metapac code) directly resets
27 /// the channel for instance.
24 DmaUnsynced, 28 DmaUnsynced,
25} 29}
26 30
diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs
index eb2399d9c..a791ac2a9 100644
--- a/embassy-stm32/src/usart/ringbuffered.rs
+++ b/embassy-stm32/src/usart/ringbuffered.rs
@@ -5,6 +5,7 @@ use core::task::Poll;
5 5
6use embassy_embedded_hal::SetConfig; 6use embassy_embedded_hal::SetConfig;
7use embassy_hal_internal::PeripheralRef; 7use embassy_hal_internal::PeripheralRef;
8use embedded_io_async::ReadReady;
8use futures_util::future::{select, Either}; 9use futures_util::future::{select, Either};
9 10
10use super::{clear_interrupt_flags, rdr, reconfigure, sr, Config, ConfigError, Error, Info, State, UartRx}; 11use super::{clear_interrupt_flags, rdr, reconfigure, sr, Config, ConfigError, Error, Info, State, UartRx};
@@ -262,3 +263,20 @@ impl embedded_io_async::Read for RingBufferedUartRx<'_> {
262 self.read(buf).await 263 self.read(buf).await
263 } 264 }
264} 265}
266
267impl ReadReady for RingBufferedUartRx<'_> {
268 fn read_ready(&mut self) -> Result<bool, Self::Error> {
269 let len = self.ring_buf.len().map_err(|e| match e {
270 crate::dma::ringbuffer::Error::Overrun => Self::Error::Overrun,
271 crate::dma::ringbuffer::Error::DmaUnsynced => {
272 error!(
273 "Ringbuffer error: DmaUNsynced, driver implementation is
274 probably bugged please open an issue"
275 );
276 // we report this as overrun since its recoverable in the same way
277 Self::Error::Overrun
278 }
279 })?;
280 Ok(len > 0)
281 }
282}