diff options
| author | Carlos Barrales Ruiz <[email protected]> | 2023-11-27 15:00:48 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-12-04 13:28:00 +0100 |
| commit | 09592ffa6aaf9730b649104d79353c7e30ba10d4 (patch) | |
| tree | 202edb4682aa02033d519099c80e0dc2b71fb21a | |
| parent | b867f9b5b6e55f8312e39dd2f4782e6f91e47951 (diff) | |
stm32/rcc: Add support for HSE Oscillator in stm32g0
| -rw-r--r-- | embassy-stm32/src/rcc/g0.rs | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/embassy-stm32/src/rcc/g0.rs b/embassy-stm32/src/rcc/g0.rs index 75613dd2b..d3367b049 100644 --- a/embassy-stm32/src/rcc/g0.rs +++ b/embassy-stm32/src/rcc/g0.rs | |||
| @@ -10,10 +10,18 @@ use crate::time::Hertz; | |||
| 10 | /// HSI speed | 10 | /// HSI speed |
| 11 | pub const HSI_FREQ: Hertz = Hertz(16_000_000); | 11 | pub const HSI_FREQ: Hertz = Hertz(16_000_000); |
| 12 | 12 | ||
| 13 | #[derive(Clone, Copy, Eq, PartialEq)] | ||
| 14 | pub enum HseMode { | ||
| 15 | /// crystal/ceramic oscillator (HSEBYP=0) | ||
| 16 | Oscillator, | ||
| 17 | /// external analog clock (low swing) (HSEBYP=1) | ||
| 18 | Bypass, | ||
| 19 | } | ||
| 20 | |||
| 13 | /// System clock mux source | 21 | /// System clock mux source |
| 14 | #[derive(Clone, Copy)] | 22 | #[derive(Clone, Copy)] |
| 15 | pub enum ClockSrc { | 23 | pub enum ClockSrc { |
| 16 | HSE(Hertz), | 24 | HSE(Hertz, HseMode), |
| 17 | HSI(HSIPrescaler), | 25 | HSI(HSIPrescaler), |
| 18 | PLL(PllConfig), | 26 | PLL(PllConfig), |
| 19 | LSI, | 27 | LSI, |
| @@ -61,7 +69,7 @@ impl Default for PllConfig { | |||
| 61 | #[derive(Clone, Copy, Eq, PartialEq)] | 69 | #[derive(Clone, Copy, Eq, PartialEq)] |
| 62 | pub enum PllSource { | 70 | pub enum PllSource { |
| 63 | HSI, | 71 | HSI, |
| 64 | HSE(Hertz), | 72 | HSE(Hertz, HseMode), |
| 65 | } | 73 | } |
| 66 | 74 | ||
| 67 | /// Clocks configutation | 75 | /// Clocks configutation |
| @@ -90,7 +98,7 @@ impl PllConfig { | |||
| 90 | pub(crate) fn init(self) -> Hertz { | 98 | pub(crate) fn init(self) -> Hertz { |
| 91 | let (src, input_freq) = match self.source { | 99 | let (src, input_freq) = match self.source { |
| 92 | PllSource::HSI => (vals::Pllsrc::HSI, HSI_FREQ), | 100 | PllSource::HSI => (vals::Pllsrc::HSI, HSI_FREQ), |
| 93 | PllSource::HSE(freq) => (vals::Pllsrc::HSE, freq), | 101 | PllSource::HSE(freq, _) => (vals::Pllsrc::HSE, freq), |
| 94 | }; | 102 | }; |
| 95 | 103 | ||
| 96 | let m_freq = input_freq / self.m; | 104 | let m_freq = input_freq / self.m; |
| @@ -125,8 +133,11 @@ impl PllConfig { | |||
| 125 | RCC.cr().write(|w| w.set_hsion(true)); | 133 | RCC.cr().write(|w| w.set_hsion(true)); |
| 126 | while !RCC.cr().read().hsirdy() {} | 134 | while !RCC.cr().read().hsirdy() {} |
| 127 | } | 135 | } |
| 128 | PllSource::HSE(_) => { | 136 | PllSource::HSE(_, mode) => { |
| 129 | RCC.cr().write(|w| w.set_hseon(true)); | 137 | RCC.cr().write(|w| { |
| 138 | w.set_hsebyp(mode != HseMode::Oscillator); | ||
| 139 | w.set_hseon(true); | ||
| 140 | }); | ||
| 130 | while !RCC.cr().read().hserdy() {} | 141 | while !RCC.cr().read().hserdy() {} |
| 131 | } | 142 | } |
| 132 | } | 143 | } |
| @@ -177,9 +188,12 @@ pub(crate) unsafe fn init(config: Config) { | |||
| 177 | 188 | ||
| 178 | (HSI_FREQ / div, Sw::HSI) | 189 | (HSI_FREQ / div, Sw::HSI) |
| 179 | } | 190 | } |
| 180 | ClockSrc::HSE(freq) => { | 191 | ClockSrc::HSE(freq, mode) => { |
| 181 | // Enable HSE | 192 | // Enable HSE |
| 182 | RCC.cr().write(|w| w.set_hseon(true)); | 193 | RCC.cr().write(|w| { |
| 194 | w.set_hseon(true); | ||
| 195 | w.set_hsebyp(mode != HseMode::Oscillator); | ||
| 196 | }); | ||
| 183 | while !RCC.cr().read().hserdy() {} | 197 | while !RCC.cr().read().hserdy() {} |
| 184 | 198 | ||
| 185 | (freq, Sw::HSE) | 199 | (freq, Sw::HSE) |
