Add OTG core DMA address registers

1 files changed, 12 insertions, 0 deletions

diff --git a/embassy-usb-synopsys-otg/src/otg_v1.rs b/embassy-usb-synopsys-otg/src/otg_v1.rs
index 111bc4a63..a8530980c 100644
--- a/embassy-usb-synopsys-otg/src/otg_v1.rs
+++ b/embassy-usb-synopsys-otg/src/otg_v1.rs
@@ -272,6 +272,12 @@ impl Otg {
         assert!(n < 12usize);
         unsafe { Reg::from_ptr(self.ptr.add(0x0510usize + n * 32usize) as _) }
     }
+    #[doc = "Host channel DMA address register"]
+    #[inline(always)]
+    pub const fn hcdma(self, n: usize) -> Reg<u32, RW> {
+        assert!(n < 12usize);
+        unsafe { Reg::from_ptr(self.ptr.add(0x0514usize + n * 32usize) as _) }
+    }
     #[doc = "Device configuration register"]
     #[inline(always)]
     pub const fn dcfg(self) -> Reg<regs::Dcfg, RW> {
@@ -364,6 +370,12 @@ impl Otg {
         assert!(n < 16usize);
         unsafe { Reg::from_ptr(self.ptr.add(0x0b10usize + n * 32usize) as _) }
     }
+    #[doc = "Device OUT/IN endpoint DMA address register"]
+    #[inline(always)]
+    pub const fn doepdma(self, n: usize) -> Reg<u32, RW> {
+        assert!(n < 16usize);
+        unsafe { Reg::from_ptr(self.ptr.add(0x0b14usize + n * 32usize) as _) }
+    }
     #[doc = "Power and clock gating control register"]
     #[inline(always)]
     pub const fn pcgcctl(self) -> Reg<regs::Pcgcctl, RW> {