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authorDario Nieuwenhuis <[email protected]>2024-04-02 17:10:27 +0000
committerGitHub <[email protected]>2024-04-02 17:10:27 +0000
commit0e709ab0ea4ba5349de23fb24e0a70f01c2fa1e5 (patch)
treefa6bb9e4e7eea68834808f6844881b892a2ff3e2
parente29b5619d1dafb46a25f42a5b3552605bb3c2d86 (diff)
parent7c36e8dbc7867c7fef0e74816b482a577ae2dc2d (diff)
Merge pull request #2763 from UPB-FILS-MA/rp_rename_pwm_channel_to_slice
rp2040: rename all usages of pwm channel to pwm slices
-rw-r--r--embassy-rp/src/pwm.rs128
1 files changed, 64 insertions, 64 deletions
diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs
index 3b980108a..5aab3ff4f 100644
--- a/embassy-rp/src/pwm.rs
+++ b/embassy-rp/src/pwm.rs
@@ -82,13 +82,13 @@ impl From<InputMode> for Divmode {
82} 82}
83 83
84/// PWM driver. 84/// PWM driver.
85pub struct Pwm<'d, T: Channel> { 85pub struct Pwm<'d, T: Slice> {
86 inner: PeripheralRef<'d, T>, 86 inner: PeripheralRef<'d, T>,
87 pin_a: Option<PeripheralRef<'d, AnyPin>>, 87 pin_a: Option<PeripheralRef<'d, AnyPin>>,
88 pin_b: Option<PeripheralRef<'d, AnyPin>>, 88 pin_b: Option<PeripheralRef<'d, AnyPin>>,
89} 89}
90 90
91impl<'d, T: Channel> Pwm<'d, T> { 91impl<'d, T: Slice> Pwm<'d, T> {
92 fn new_inner( 92 fn new_inner(
93 inner: impl Peripheral<P = T> + 'd, 93 inner: impl Peripheral<P = T> + 'd,
94 a: Option<PeripheralRef<'d, AnyPin>>, 94 a: Option<PeripheralRef<'d, AnyPin>>,
@@ -129,7 +129,7 @@ impl<'d, T: Channel> Pwm<'d, T> {
129 #[inline] 129 #[inline]
130 pub fn new_output_a( 130 pub fn new_output_a(
131 inner: impl Peripheral<P = T> + 'd, 131 inner: impl Peripheral<P = T> + 'd,
132 a: impl Peripheral<P = impl PwmPinA<T>> + 'd, 132 a: impl Peripheral<P = impl ChannelAPin<T>> + 'd,
133 config: Config, 133 config: Config,
134 ) -> Self { 134 ) -> Self {
135 into_ref!(a); 135 into_ref!(a);
@@ -140,7 +140,7 @@ impl<'d, T: Channel> Pwm<'d, T> {
140 #[inline] 140 #[inline]
141 pub fn new_output_b( 141 pub fn new_output_b(
142 inner: impl Peripheral<P = T> + 'd, 142 inner: impl Peripheral<P = T> + 'd,
143 b: impl Peripheral<P = impl PwmPinB<T>> + 'd, 143 b: impl Peripheral<P = impl ChannelBPin<T>> + 'd,
144 config: Config, 144 config: Config,
145 ) -> Self { 145 ) -> Self {
146 into_ref!(b); 146 into_ref!(b);
@@ -151,8 +151,8 @@ impl<'d, T: Channel> Pwm<'d, T> {
151 #[inline] 151 #[inline]
152 pub fn new_output_ab( 152 pub fn new_output_ab(
153 inner: impl Peripheral<P = T> + 'd, 153 inner: impl Peripheral<P = T> + 'd,
154 a: impl Peripheral<P = impl PwmPinA<T>> + 'd, 154 a: impl Peripheral<P = impl ChannelAPin<T>> + 'd,
155 b: impl Peripheral<P = impl PwmPinB<T>> + 'd, 155 b: impl Peripheral<P = impl ChannelBPin<T>> + 'd,
156 config: Config, 156 config: Config,
157 ) -> Self { 157 ) -> Self {
158 into_ref!(a, b); 158 into_ref!(a, b);
@@ -163,7 +163,7 @@ impl<'d, T: Channel> Pwm<'d, T> {
163 #[inline] 163 #[inline]
164 pub fn new_input( 164 pub fn new_input(
165 inner: impl Peripheral<P = T> + 'd, 165 inner: impl Peripheral<P = T> + 'd,
166 b: impl Peripheral<P = impl PwmPinB<T>> + 'd, 166 b: impl Peripheral<P = impl ChannelBPin<T>> + 'd,
167 mode: InputMode, 167 mode: InputMode,
168 config: Config, 168 config: Config,
169 ) -> Self { 169 ) -> Self {
@@ -175,8 +175,8 @@ impl<'d, T: Channel> Pwm<'d, T> {
175 #[inline] 175 #[inline]
176 pub fn new_output_input( 176 pub fn new_output_input(
177 inner: impl Peripheral<P = T> + 'd, 177 inner: impl Peripheral<P = T> + 'd,
178 a: impl Peripheral<P = impl PwmPinA<T>> + 'd, 178 a: impl Peripheral<P = impl ChannelAPin<T>> + 'd,
179 b: impl Peripheral<P = impl PwmPinB<T>> + 'd, 179 b: impl Peripheral<P = impl ChannelBPin<T>> + 'd,
180 mode: InputMode, 180 mode: InputMode,
181 config: Config, 181 config: Config,
182 ) -> Self { 182 ) -> Self {
@@ -265,18 +265,18 @@ impl<'d, T: Channel> Pwm<'d, T> {
265 } 265 }
266} 266}
267 267
268/// Batch representation of PWM channels. 268/// Batch representation of PWM slices.
269pub struct PwmBatch(u32); 269pub struct PwmBatch(u32);
270 270
271impl PwmBatch { 271impl PwmBatch {
272 #[inline] 272 #[inline]
273 /// Enable a PWM channel in this batch. 273 /// Enable a PWM slice in this batch.
274 pub fn enable(&mut self, pwm: &Pwm<'_, impl Channel>) { 274 pub fn enable(&mut self, pwm: &Pwm<'_, impl Slice>) {
275 self.0 |= pwm.bit(); 275 self.0 |= pwm.bit();
276 } 276 }
277 277
278 #[inline] 278 #[inline]
279 /// Enable channels in this batch in a PWM. 279 /// Enable slices in this batch in a PWM.
280 pub fn set_enabled(enabled: bool, batch: impl FnOnce(&mut PwmBatch)) { 280 pub fn set_enabled(enabled: bool, batch: impl FnOnce(&mut PwmBatch)) {
281 let mut en = PwmBatch(0); 281 let mut en = PwmBatch(0);
282 batch(&mut en); 282 batch(&mut en);
@@ -288,7 +288,7 @@ impl PwmBatch {
288 } 288 }
289} 289}
290 290
291impl<'d, T: Channel> Drop for Pwm<'d, T> { 291impl<'d, T: Slice> Drop for Pwm<'d, T> {
292 fn drop(&mut self) { 292 fn drop(&mut self) {
293 self.inner.regs().csr().write_clear(|w| w.set_en(false)); 293 self.inner.regs().csr().write_clear(|w| w.set_en(false));
294 if let Some(pin) = &self.pin_a { 294 if let Some(pin) = &self.pin_a {
@@ -301,24 +301,24 @@ impl<'d, T: Channel> Drop for Pwm<'d, T> {
301} 301}
302 302
303mod sealed { 303mod sealed {
304 pub trait Channel {} 304 pub trait Slice {}
305} 305}
306 306
307/// PWM Channel. 307/// PWM Slice.
308pub trait Channel: Peripheral<P = Self> + sealed::Channel + Sized + 'static { 308pub trait Slice: Peripheral<P = Self> + sealed::Slice + Sized + 'static {
309 /// Channel number. 309 /// Slice number.
310 fn number(&self) -> u8; 310 fn number(&self) -> u8;
311 311
312 /// Channel register block. 312 /// Slice register block.
313 fn regs(&self) -> pac::pwm::Channel { 313 fn regs(&self) -> pac::pwm::Channel {
314 pac::PWM.ch(self.number() as _) 314 pac::PWM.ch(self.number() as _)
315 } 315 }
316} 316}
317 317
318macro_rules! channel { 318macro_rules! slice {
319 ($name:ident, $num:expr) => { 319 ($name:ident, $num:expr) => {
320 impl sealed::Channel for peripherals::$name {} 320 impl sealed::Slice for peripherals::$name {}
321 impl Channel for peripherals::$name { 321 impl Slice for peripherals::$name {
322 fn number(&self) -> u8 { 322 fn number(&self) -> u8 {
323 $num 323 $num
324 } 324 }
@@ -326,19 +326,19 @@ macro_rules! channel {
326 }; 326 };
327} 327}
328 328
329channel!(PWM_SLICE0, 0); 329slice!(PWM_SLICE0, 0);
330channel!(PWM_SLICE1, 1); 330slice!(PWM_SLICE1, 1);
331channel!(PWM_SLICE2, 2); 331slice!(PWM_SLICE2, 2);
332channel!(PWM_SLICE3, 3); 332slice!(PWM_SLICE3, 3);
333channel!(PWM_SLICE4, 4); 333slice!(PWM_SLICE4, 4);
334channel!(PWM_SLICE5, 5); 334slice!(PWM_SLICE5, 5);
335channel!(PWM_SLICE6, 6); 335slice!(PWM_SLICE6, 6);
336channel!(PWM_SLICE7, 7); 336slice!(PWM_SLICE7, 7);
337 337
338/// PWM Pin A. 338/// PWM Channel A.
339pub trait PwmPinA<T: Channel>: GpioPin {} 339pub trait ChannelAPin<T: Slice>: GpioPin {}
340/// PWM Pin B. 340/// PWM Channel B.
341pub trait PwmPinB<T: Channel>: GpioPin {} 341pub trait ChannelBPin<T: Slice>: GpioPin {}
342 342
343macro_rules! impl_pin { 343macro_rules! impl_pin {
344 ($pin:ident, $channel:ident, $kind:ident) => { 344 ($pin:ident, $channel:ident, $kind:ident) => {
@@ -346,33 +346,33 @@ macro_rules! impl_pin {
346 }; 346 };
347} 347}
348 348
349impl_pin!(PIN_0, PWM_SLICE0, PwmPinA); 349impl_pin!(PIN_0, PWM_SLICE0, ChannelAPin);
350impl_pin!(PIN_1, PWM_SLICE0, PwmPinB); 350impl_pin!(PIN_1, PWM_SLICE0, ChannelBPin);
351impl_pin!(PIN_2, PWM_SLICE1, PwmPinA); 351impl_pin!(PIN_2, PWM_SLICE1, ChannelAPin);
352impl_pin!(PIN_3, PWM_SLICE1, PwmPinB); 352impl_pin!(PIN_3, PWM_SLICE1, ChannelBPin);
353impl_pin!(PIN_4, PWM_SLICE2, PwmPinA); 353impl_pin!(PIN_4, PWM_SLICE2, ChannelAPin);
354impl_pin!(PIN_5, PWM_SLICE2, PwmPinB); 354impl_pin!(PIN_5, PWM_SLICE2, ChannelBPin);
355impl_pin!(PIN_6, PWM_SLICE3, PwmPinA); 355impl_pin!(PIN_6, PWM_SLICE3, ChannelAPin);
356impl_pin!(PIN_7, PWM_SLICE3, PwmPinB); 356impl_pin!(PIN_7, PWM_SLICE3, ChannelBPin);
357impl_pin!(PIN_8, PWM_SLICE4, PwmPinA); 357impl_pin!(PIN_8, PWM_SLICE4, ChannelAPin);
358impl_pin!(PIN_9, PWM_SLICE4, PwmPinB); 358impl_pin!(PIN_9, PWM_SLICE4, ChannelBPin);
359impl_pin!(PIN_10, PWM_SLICE5, PwmPinA); 359impl_pin!(PIN_10, PWM_SLICE5, ChannelAPin);
360impl_pin!(PIN_11, PWM_SLICE5, PwmPinB); 360impl_pin!(PIN_11, PWM_SLICE5, ChannelBPin);
361impl_pin!(PIN_12, PWM_SLICE6, PwmPinA); 361impl_pin!(PIN_12, PWM_SLICE6, ChannelAPin);
362impl_pin!(PIN_13, PWM_SLICE6, PwmPinB); 362impl_pin!(PIN_13, PWM_SLICE6, ChannelBPin);
363impl_pin!(PIN_14, PWM_SLICE7, PwmPinA); 363impl_pin!(PIN_14, PWM_SLICE7, ChannelAPin);
364impl_pin!(PIN_15, PWM_SLICE7, PwmPinB); 364impl_pin!(PIN_15, PWM_SLICE7, ChannelBPin);
365impl_pin!(PIN_16, PWM_SLICE0, PwmPinA); 365impl_pin!(PIN_16, PWM_SLICE0, ChannelAPin);
366impl_pin!(PIN_17, PWM_SLICE0, PwmPinB); 366impl_pin!(PIN_17, PWM_SLICE0, ChannelBPin);
367impl_pin!(PIN_18, PWM_SLICE1, PwmPinA); 367impl_pin!(PIN_18, PWM_SLICE1, ChannelAPin);
368impl_pin!(PIN_19, PWM_SLICE1, PwmPinB); 368impl_pin!(PIN_19, PWM_SLICE1, ChannelBPin);
369impl_pin!(PIN_20, PWM_SLICE2, PwmPinA); 369impl_pin!(PIN_20, PWM_SLICE2, ChannelAPin);
370impl_pin!(PIN_21, PWM_SLICE2, PwmPinB); 370impl_pin!(PIN_21, PWM_SLICE2, ChannelBPin);
371impl_pin!(PIN_22, PWM_SLICE3, PwmPinA); 371impl_pin!(PIN_22, PWM_SLICE3, ChannelAPin);
372impl_pin!(PIN_23, PWM_SLICE3, PwmPinB); 372impl_pin!(PIN_23, PWM_SLICE3, ChannelBPin);
373impl_pin!(PIN_24, PWM_SLICE4, PwmPinA); 373impl_pin!(PIN_24, PWM_SLICE4, ChannelAPin);
374impl_pin!(PIN_25, PWM_SLICE4, PwmPinB); 374impl_pin!(PIN_25, PWM_SLICE4, ChannelBPin);
375impl_pin!(PIN_26, PWM_SLICE5, PwmPinA); 375impl_pin!(PIN_26, PWM_SLICE5, ChannelAPin);
376impl_pin!(PIN_27, PWM_SLICE5, PwmPinB); 376impl_pin!(PIN_27, PWM_SLICE5, ChannelBPin);
377impl_pin!(PIN_28, PWM_SLICE6, PwmPinA); 377impl_pin!(PIN_28, PWM_SLICE6, ChannelAPin);
378impl_pin!(PIN_29, PWM_SLICE6, PwmPinB); 378impl_pin!(PIN_29, PWM_SLICE6, ChannelBPin);