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authorxoviat <[email protected]>2025-12-03 10:15:14 -0600
committerxoviat <[email protected]>2025-12-03 10:15:14 -0600
commit0fc247a384b70e29f78c303909fc3fe636710283 (patch)
treefe0462588d301f1e0d30d831e71f24cbe8668c21
parent077e59a192ca4cb096a9ef939d06ebefebbac42d (diff)
parent95fd1f46a2c44f961e27f48920d87468d39a3793 (diff)
Merge branch 'main' of github.com:embassy-rs/embassy into timer
Diffstat
-rw-r--r--README.md2
-rw-r--r--cyw43/CHANGELOG.md2
-rw-r--r--cyw43/src/control.rs5
-rw-r--r--docs/pages/overview.adoc6
-rw-r--r--embassy-net-esp-hosted/CHANGELOG.md1
-rw-r--r--embassy-net-esp-hosted/src/control.rs40
-rw-r--r--embassy-net-esp-hosted/src/ioctl.rs27
-rw-r--r--embassy-net-esp-hosted/src/lib.rs5
-rw-r--r--embassy-net-esp-hosted/src/proto.rs12
-rw-r--r--embassy-net-nrf91/Cargo.toml2
-rw-r--r--embassy-nrf/CHANGELOG.md1
-rw-r--r--embassy-nrf/Cargo.toml18
-rw-r--r--embassy-nrf/src/chips/nrf54l05_app.rs746
-rw-r--r--embassy-nrf/src/chips/nrf54l10_app.rs746
-rw-r--r--embassy-nrf/src/lib.rs14
-rw-r--r--examples/rp235x/src/bin/pio_i2s.rs4
16 files changed, 1609 insertions, 22 deletions
diff --git a/README.md b/README.md
index 950d19a6d..1d6f3499d 100644
--- a/README.md
+++ b/README.md
@@ -38,7 +38,7 @@ Rust's [async/await](https://rust-lang.github.io/async-book/) allows for unprece
38 38
39- **Bluetooth** 39- **Bluetooth**
40 - The [trouble](https://github.com/embassy-rs/trouble) crate provides a Bluetooth Low Energy 4.x and 5.x Host that runs on any microcontroller implementing the [bt-hci](https://github.com/embassy-rs/bt-hci) traits (currently 40 - The [trouble](https://github.com/embassy-rs/trouble) crate provides a Bluetooth Low Energy 4.x and 5.x Host that runs on any microcontroller implementing the [bt-hci](https://github.com/embassy-rs/bt-hci) traits (currently
41 `nRF52`, `rp2040`, `rp23xx` and `esp32` and `serial` controllers are supported). 41 `nRF52`, `nrf54`, `rp2040`, `rp23xx` and `esp32` and `serial` controllers are supported).
42 - The [nrf-softdevice](https://github.com/embassy-rs/nrf-softdevice) crate provides Bluetooth Low Energy 4.x and 5.x support for nRF52 microcontrollers. 42 - The [nrf-softdevice](https://github.com/embassy-rs/nrf-softdevice) crate provides Bluetooth Low Energy 4.x and 5.x support for nRF52 microcontrollers.
43 - The [embassy-stm32-wpan](https://github.com/embassy-rs/embassy/tree/main/embassy-stm32-wpan) crate provides Bluetooth Low Energy 5.x support for stm32wb microcontrollers. 43 - The [embassy-stm32-wpan](https://github.com/embassy-rs/embassy/tree/main/embassy-stm32-wpan) crate provides Bluetooth Low Energy 5.x support for stm32wb microcontrollers.
44 44
diff --git a/cyw43/CHANGELOG.md b/cyw43/CHANGELOG.md
index 9fe341357..4f0dc896b 100644
--- a/cyw43/CHANGELOG.md
+++ b/cyw43/CHANGELOG.md
@@ -8,6 +8,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
8<!-- next-header --> 8<!-- next-header -->
9## Unreleased - ReleaseDate 9## Unreleased - ReleaseDate
10 10
11- Reset WPA security before creating secure AP
12
11## 0.6.0 - 2025-11-27 13## 0.6.0 - 2025-11-27
12 14
13- Updated documentation for Control::join() #4678 15- Updated documentation for Control::join() #4678
diff --git a/cyw43/src/control.rs b/cyw43/src/control.rs
index 49e3faee4..219198d1f 100644
--- a/cyw43/src/control.rs
+++ b/cyw43/src/control.rs
@@ -436,6 +436,9 @@ impl<'a> Control<'a> {
436 // Set wifi up again 436 // Set wifi up again
437 self.up().await; 437 self.up().await;
438 438
439 // Disable authentication
440 self.ioctl_set_u32(Ioctl::SetAuth, 0, AUTH_OPEN).await;
441
439 // Turn on AP mode 442 // Turn on AP mode
440 self.ioctl_set_u32(Ioctl::SetAp, 0, 1).await; 443 self.ioctl_set_u32(Ioctl::SetAp, 0, 1).await;
441 444
@@ -470,8 +473,6 @@ impl<'a> Control<'a> {
470 pfi.passphrase[..passphrase.as_bytes().len()].copy_from_slice(passphrase.as_bytes()); 473 pfi.passphrase[..passphrase.as_bytes().len()].copy_from_slice(passphrase.as_bytes());
471 self.ioctl(IoctlType::Set, Ioctl::SetWsecPmk, 0, &mut pfi.to_bytes()) 474 self.ioctl(IoctlType::Set, Ioctl::SetWsecPmk, 0, &mut pfi.to_bytes())
472 .await; 475 .await;
473 } else {
474 self.ioctl_set_u32(Ioctl::SetAuth, 0, 0).await;
475 } 476 }
476 477
477 // Change mutlicast rate from 1 Mbps to 11 Mbps 478 // Change mutlicast rate from 1 Mbps to 11 Mbps
diff --git a/docs/pages/overview.adoc b/docs/pages/overview.adoc
index 18eaaeb75..894789d33 100644
--- a/docs/pages/overview.adoc
+++ b/docs/pages/overview.adoc
@@ -27,7 +27,7 @@ Embassy provides implementations of both async and blocking APIs where it makes
27The Embassy project maintains HALs for select hardware, but you can still use HALs from other projects with Embassy. 27The Embassy project maintains HALs for select hardware, but you can still use HALs from other projects with Embassy.
28 28
29* link:https://docs.embassy.dev/embassy-stm32/[embassy-stm32], for all STM32 microcontroller families. 29* link:https://docs.embassy.dev/embassy-stm32/[embassy-stm32], for all STM32 microcontroller families.
30* link:https://docs.embassy.dev/embassy-nrf/[embassy-nrf], for the Nordic Semiconductor nRF52, nRF53, nRF91 series. 30* link:https://docs.embassy.dev/embassy-nrf/[embassy-nrf], for the Nordic Semiconductor nRF52, nRF53, nRF54, nRF91 series.
31* link:https://docs.embassy.dev/embassy-rp/[embassy-rp], for the Raspberry Pi RP2040 as well as RP235x microcontroller. 31* link:https://docs.embassy.dev/embassy-rp/[embassy-rp], for the Raspberry Pi RP2040 as well as RP235x microcontroller.
32* link:https://docs.embassy.dev/embassy-mspm0/[embassy-mspm0], for the Texas Instruments MSPM0 microcontrollers. 32* link:https://docs.embassy.dev/embassy-mspm0/[embassy-mspm0], for the Texas Instruments MSPM0 microcontrollers.
33* link:https://github.com/esp-rs/esp-hal[esp-hal], for the Espressif Systems ESP32 series of chips. 33* link:https://github.com/esp-rs/esp-hal[esp-hal], for the Espressif Systems ESP32 series of chips.
@@ -42,7 +42,9 @@ as they implement both the link:https://github.com/rust-embedded/embedded-hal[Em
42The link:https://docs.embassy.dev/embassy-net/[embassy-net] network stack implements extensive networking functionality, including Ethernet, IP, TCP, UDP, ICMP and DHCP. Async drastically simplifies managing timeouts and serving multiple connections concurrently. Several drivers for WiFi and Ethernet chips can be found. 42The link:https://docs.embassy.dev/embassy-net/[embassy-net] network stack implements extensive networking functionality, including Ethernet, IP, TCP, UDP, ICMP and DHCP. Async drastically simplifies managing timeouts and serving multiple connections concurrently. Several drivers for WiFi and Ethernet chips can be found.
43 43
44=== Bluetooth 44=== Bluetooth
45The link:https://github.com/embassy-rs/nrf-softdevice[nrf-softdevice] crate provides Bluetooth Low Energy 4.x and 5.x support for nRF52 microcontrollers. 45
46* The link:https://github.com/embassy-rs/trouble[trouble] crate provides a Bluetooth Low Energy 4.x and 5.x Host that runs on any microcontroller implementing the link:https://github.com/embassy-rs/bt-hci[bt-hci] traits (currently `nRF52`, `nrf54`, `rp2040`, `rp23xx` and `esp32` and `serial` controllers are supported).
47* The link:https://github.com/embassy-rs/nrf-softdevice[nrf-softdevice] crate provides Bluetooth Low Energy 4.x and 5.x support for nRF52 microcontrollers.
46 48
47=== LoRa 49=== LoRa
48link:https://github.com/lora-rs/lora-rs[lora-rs] supports LoRa networking on a wide range of LoRa radios, fully integrated with a Rust LoRaWAN implementation. It provides four crates — lora-phy, lora-modulation, lorawan-encoding, and lorawan-device — and basic examples for various development boards. It has support for STM32WL wireless microcontrollers or Semtech SX127x transceivers, among others. 50link:https://github.com/lora-rs/lora-rs[lora-rs] supports LoRa networking on a wide range of LoRa radios, fully integrated with a Rust LoRaWAN implementation. It provides four crates — lora-phy, lora-modulation, lorawan-encoding, and lorawan-device — and basic examples for various development boards. It has support for STM32WL wireless microcontrollers or Semtech SX127x transceivers, among others.
diff --git a/embassy-net-esp-hosted/CHANGELOG.md b/embassy-net-esp-hosted/CHANGELOG.md
index d8b912295..6991b39fd 100644
--- a/embassy-net-esp-hosted/CHANGELOG.md
+++ b/embassy-net-esp-hosted/CHANGELOG.md
@@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
11- Add an `Interface` trait to allow using other interface transports. 11- Add an `Interface` trait to allow using other interface transports.
12- Switch to `micropb` for protobuf. 12- Switch to `micropb` for protobuf.
13- Update protos to latest `esp-hosted-fg`. 13- Update protos to latest `esp-hosted-fg`.
14- Add support for OTA firmware updates.
14 15
15## 0.2.1 - 2025-08-26 16## 0.2.1 - 2025-08-26
16 17
diff --git a/embassy-net-esp-hosted/src/control.rs b/embassy-net-esp-hosted/src/control.rs
index 38ec648b4..eb79593f6 100644
--- a/embassy-net-esp-hosted/src/control.rs
+++ b/embassy-net-esp-hosted/src/control.rs
@@ -146,6 +146,43 @@ impl<'a> Control<'a> {
146 Ok(()) 146 Ok(())
147 } 147 }
148 148
149 /// Initiate a firmware update.
150 pub async fn ota_begin(&mut self) -> Result<(), Error> {
151 let req = proto::CtrlMsg_Req_OTABegin {};
152 ioctl!(self, ReqOtaBegin, RespOtaBegin, req, resp);
153 Ok(())
154 }
155
156 /// Write slice of firmware to a device.
157 ///
158 /// [`ota_begin`] must be called first.
159 ///
160 /// The slice is split into chunks that can be sent across
161 /// the ioctl protocol to the wifi adapter.
162 pub async fn ota_write(&mut self, data: &[u8]) -> Result<(), Error> {
163 for chunk in data.chunks(256) {
164 let req = proto::CtrlMsg_Req_OTAWrite {
165 ota_data: heapless::Vec::from_slice(chunk).unwrap(),
166 };
167 ioctl!(self, ReqOtaWrite, RespOtaWrite, req, resp);
168 }
169 Ok(())
170 }
171
172 /// End the OTA session.
173 ///
174 /// [`ota_begin`] must be called first.
175 ///
176 /// NOTE: Will reset the wifi adapter after 5 seconds.
177 pub async fn ota_end(&mut self) -> Result<(), Error> {
178 let req = proto::CtrlMsg_Req_OTAEnd {};
179 ioctl!(self, ReqOtaEnd, RespOtaEnd, req, resp);
180 self.shared.ota_done();
181 // Wait for re-init
182 self.init().await?;
183 Ok(())
184 }
185
149 /// duration in seconds, clamped to [10, 3600] 186 /// duration in seconds, clamped to [10, 3600]
150 async fn set_heartbeat(&mut self, duration: u32) -> Result<(), Error> { 187 async fn set_heartbeat(&mut self, duration: u32) -> Result<(), Error> {
151 let req = proto::CtrlMsg_Req_ConfigHeartbeat { 188 let req = proto::CtrlMsg_Req_ConfigHeartbeat {
@@ -175,7 +212,8 @@ impl<'a> Control<'a> {
175 async fn ioctl(&mut self, msg: &mut CtrlMsg) -> Result<(), Error> { 212 async fn ioctl(&mut self, msg: &mut CtrlMsg) -> Result<(), Error> {
176 debug!("ioctl req: {:?}", &msg); 213 debug!("ioctl req: {:?}", &msg);
177 214
178 let mut buf = [0u8; 128]; 215 // Theoretical max overhead is 29 bytes. Biggest message is OTA write with 256 bytes.
216 let mut buf = [0u8; 256 + 29];
179 let buf_len = buf.len(); 217 let buf_len = buf.len();
180 218
181 let mut encoder = PbEncoder::new(&mut buf[..]); 219 let mut encoder = PbEncoder::new(&mut buf[..]);
diff --git a/embassy-net-esp-hosted/src/ioctl.rs b/embassy-net-esp-hosted/src/ioctl.rs
index a516f80c7..de0f867e8 100644
--- a/embassy-net-esp-hosted/src/ioctl.rs
+++ b/embassy-net-esp-hosted/src/ioctl.rs
@@ -23,16 +23,23 @@ pub struct Shared(RefCell<SharedInner>);
23 23
24struct SharedInner { 24struct SharedInner {
25 ioctl: IoctlState, 25 ioctl: IoctlState,
26 is_init: bool, 26 state: ControlState,
27 control_waker: WakerRegistration, 27 control_waker: WakerRegistration,
28 runner_waker: WakerRegistration, 28 runner_waker: WakerRegistration,
29} 29}
30 30
31#[derive(Clone, Copy)]
32pub(crate) enum ControlState {
33 Init,
34 Reboot,
35 Ready,
36}
37
31impl Shared { 38impl Shared {
32 pub fn new() -> Self { 39 pub fn new() -> Self {
33 Self(RefCell::new(SharedInner { 40 Self(RefCell::new(SharedInner {
34 ioctl: IoctlState::Done { resp_len: 0 }, 41 ioctl: IoctlState::Done { resp_len: 0 },
35 is_init: false, 42 state: ControlState::Init,
36 control_waker: WakerRegistration::new(), 43 control_waker: WakerRegistration::new(),
37 runner_waker: WakerRegistration::new(), 44 runner_waker: WakerRegistration::new(),
38 })) 45 }))
@@ -99,18 +106,30 @@ impl Shared {
99 } 106 }
100 } 107 }
101 108
109 // ota
110 pub fn ota_done(&self) {
111 let mut this = self.0.borrow_mut();
112 this.state = ControlState::Reboot;
113 }
114
102 // // // // // // // // // // // // // // // // // // // // 115 // // // // // // // // // // // // // // // // // // // //
116 //
117 // check if ota is in progress
118 pub(crate) fn state(&self) -> ControlState {
119 let this = self.0.borrow();
120 this.state
121 }
103 122
104 pub fn init_done(&self) { 123 pub fn init_done(&self) {
105 let mut this = self.0.borrow_mut(); 124 let mut this = self.0.borrow_mut();
106 this.is_init = true; 125 this.state = ControlState::Ready;
107 this.control_waker.wake(); 126 this.control_waker.wake();
108 } 127 }
109 128
110 pub fn init_wait(&self) -> impl Future<Output = ()> + '_ { 129 pub fn init_wait(&self) -> impl Future<Output = ()> + '_ {
111 poll_fn(|cx| { 130 poll_fn(|cx| {
112 let mut this = self.0.borrow_mut(); 131 let mut this = self.0.borrow_mut();
113 if this.is_init { 132 if let ControlState::Ready = this.state {
114 Poll::Ready(()) 133 Poll::Ready(())
115 } else { 134 } else {
116 this.control_waker.register(cx.waker()); 135 this.control_waker.register(cx.waker());
diff --git a/embassy-net-esp-hosted/src/lib.rs b/embassy-net-esp-hosted/src/lib.rs
index d882af8cf..2c7377281 100644
--- a/embassy-net-esp-hosted/src/lib.rs
+++ b/embassy-net-esp-hosted/src/lib.rs
@@ -234,6 +234,11 @@ where
234 tx_buf[..PayloadHeader::SIZE].fill(0); 234 tx_buf[..PayloadHeader::SIZE].fill(0);
235 } 235 }
236 Either4::Fourth(()) => { 236 Either4::Fourth(()) => {
237 // Extend the deadline if initializing
238 if let ioctl::ControlState::Reboot = self.shared.state() {
239 self.heartbeat_deadline = Instant::now() + HEARTBEAT_MAX_GAP;
240 continue;
241 }
237 panic!("heartbeat from esp32 stopped") 242 panic!("heartbeat from esp32 stopped")
238 } 243 }
239 } 244 }
diff --git a/embassy-net-esp-hosted/src/proto.rs b/embassy-net-esp-hosted/src/proto.rs
index 74c67bd61..09bec8984 100644
--- a/embassy-net-esp-hosted/src/proto.rs
+++ b/embassy-net-esp-hosted/src/proto.rs
@@ -16,7 +16,7 @@ Switch to a proper script when https://github.com/YuhanLiin/micropb/issues/30 is
16 // Special config for things that need to be larger 16 // Special config for things that need to be larger
17 g.configure( 17 g.configure(
18 ".CtrlMsg_Req_OTAWrite.ota_data", 18 ".CtrlMsg_Req_OTAWrite.ota_data",
19 micropb_gen::Config::new().max_bytes(1024), 19 micropb_gen::Config::new().max_bytes(256),
20 ); 20 );
21 g.configure( 21 g.configure(
22 ".CtrlMsg_Event_ESPInit.init_data", 22 ".CtrlMsg_Event_ESPInit.init_data",
@@ -4296,28 +4296,28 @@ impl ::micropb::MessageEncode for CtrlMsg_Resp_OTABegin {
4296#[derive(Debug, Default, PartialEq, Clone)] 4296#[derive(Debug, Default, PartialEq, Clone)]
4297#[cfg_attr(feature = "defmt", derive(defmt::Format))] 4297#[cfg_attr(feature = "defmt", derive(defmt::Format))]
4298pub struct CtrlMsg_Req_OTAWrite { 4298pub struct CtrlMsg_Req_OTAWrite {
4299 pub r#ota_data: ::micropb::heapless::Vec<u8, 1024>, 4299 pub r#ota_data: ::micropb::heapless::Vec<u8, 256>,
4300} 4300}
4301impl CtrlMsg_Req_OTAWrite { 4301impl CtrlMsg_Req_OTAWrite {
4302 ///Return a reference to `ota_data` 4302 ///Return a reference to `ota_data`
4303 #[inline] 4303 #[inline]
4304 pub fn r#ota_data(&self) -> &::micropb::heapless::Vec<u8, 1024> { 4304 pub fn r#ota_data(&self) -> &::micropb::heapless::Vec<u8, 256> {
4305 &self.r#ota_data 4305 &self.r#ota_data
4306 } 4306 }
4307 ///Return a mutable reference to `ota_data` 4307 ///Return a mutable reference to `ota_data`
4308 #[inline] 4308 #[inline]
4309 pub fn mut_ota_data(&mut self) -> &mut ::micropb::heapless::Vec<u8, 1024> { 4309 pub fn mut_ota_data(&mut self) -> &mut ::micropb::heapless::Vec<u8, 256> {
4310 &mut self.r#ota_data 4310 &mut self.r#ota_data
4311 } 4311 }
4312 ///Set the value of `ota_data` 4312 ///Set the value of `ota_data`
4313 #[inline] 4313 #[inline]
4314 pub fn set_ota_data(&mut self, value: ::micropb::heapless::Vec<u8, 1024>) -> &mut Self { 4314 pub fn set_ota_data(&mut self, value: ::micropb::heapless::Vec<u8, 256>) -> &mut Self {
4315 self.r#ota_data = value.into(); 4315 self.r#ota_data = value.into();
4316 self 4316 self
4317 } 4317 }
4318 ///Builder method that sets the value of `ota_data`. Useful for initializing the message. 4318 ///Builder method that sets the value of `ota_data`. Useful for initializing the message.
4319 #[inline] 4319 #[inline]
4320 pub fn init_ota_data(mut self, value: ::micropb::heapless::Vec<u8, 1024>) -> Self { 4320 pub fn init_ota_data(mut self, value: ::micropb::heapless::Vec<u8, 256>) -> Self {
4321 self.r#ota_data = value.into(); 4321 self.r#ota_data = value.into();
4322 self 4322 self
4323 } 4323 }
diff --git a/embassy-net-nrf91/Cargo.toml b/embassy-net-nrf91/Cargo.toml
index 8cf11f1fb..cd9bf2987 100644
--- a/embassy-net-nrf91/Cargo.toml
+++ b/embassy-net-nrf91/Cargo.toml
@@ -18,7 +18,7 @@ log = ["dep:log"]
18defmt = { version = "1.0.1", optional = true } 18defmt = { version = "1.0.1", optional = true }
19log = { version = "0.4.14", optional = true } 19log = { version = "0.4.14", optional = true }
20 20
21nrf-pac = { version = "0.1.0", git = "https://github.com/embassy-rs/nrf-pac.git", rev = "176dc4afe1dd8df78f3cbda4479ab5151aa32252" } 21nrf-pac = { version = "0.1.0", git = "https://github.com/embassy-rs/nrf-pac.git", rev = "52fd51ce762a3d3a81660dea62947e6d2d1e9d91" }
22cortex-m = "0.7.7" 22cortex-m = "0.7.7"
23 23
24embassy-time = { version = "0.5.0", path = "../embassy-time" } 24embassy-time = { version = "0.5.0", path = "../embassy-time" }
diff --git a/embassy-nrf/CHANGELOG.md b/embassy-nrf/CHANGELOG.md
index 5657ddcfb..d26671674 100644
--- a/embassy-nrf/CHANGELOG.md
+++ b/embassy-nrf/CHANGELOG.md
@@ -29,6 +29,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
29- changed: add workaround for anomaly 66 on nrf52 29- changed: add workaround for anomaly 66 on nrf52
30- added: expose PPI events available on SPIS peripheral 30- added: expose PPI events available on SPIS peripheral
31- added: add basic GRTC time driver support for nRF54L 31- added: add basic GRTC time driver support for nRF54L
32* added: support for nrf54l10 and nrf54l05
32 33
33## 0.8.0 - 2025-09-30 34## 0.8.0 - 2025-09-30
34 35
diff --git a/embassy-nrf/Cargo.toml b/embassy-nrf/Cargo.toml
index f73772682..c51af59d2 100644
--- a/embassy-nrf/Cargo.toml
+++ b/embassy-nrf/Cargo.toml
@@ -25,6 +25,10 @@ build = [
25 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf5340-net", "time", "time-driver-rtc1"]}, 25 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf5340-net", "time", "time-driver-rtc1"]},
26 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf54l15-app-s", "time", "time-driver-grtc"]}, 26 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf54l15-app-s", "time", "time-driver-grtc"]},
27 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf54l15-app-ns", "time", "time-driver-grtc"]}, 27 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf54l15-app-ns", "time", "time-driver-grtc"]},
28 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf54l10-app-s", "time", "time-driver-grtc"]},
29 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf54l10-app-ns", "time", "time-driver-grtc"]},
30 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf54l05-app-s", "time", "time-driver-grtc"]},
31 {target = "thumbv8m.main-none-eabihf", features = ["gpiote", "nrf54l05-app-ns", "time", "time-driver-grtc"]},
28 {target = "thumbv7em-none-eabi", features = ["gpiote", "nrf52840", "time"]}, 32 {target = "thumbv7em-none-eabi", features = ["gpiote", "nrf52840", "time"]},
29 {target = "thumbv7em-none-eabi", features = ["gpiote", "nrf52840", "time-driver-rtc1"]}, 33 {target = "thumbv7em-none-eabi", features = ["gpiote", "nrf52840", "time-driver-rtc1"]},
30 {target = "thumbv7em-none-eabi", features = ["gpiote", "nrf52840", "time", "time-driver-rtc1"]}, 34 {target = "thumbv7em-none-eabi", features = ["gpiote", "nrf52840", "time", "time-driver-rtc1"]},
@@ -130,6 +134,14 @@ nrf5340-net = ["_nrf5340-net"]
130nrf54l15-app-s = ["_nrf54l15-app", "_s", "_multi_wdt"] 134nrf54l15-app-s = ["_nrf54l15-app", "_s", "_multi_wdt"]
131## nRF54L15 application core in Non-Secure mode 135## nRF54L15 application core in Non-Secure mode
132nrf54l15-app-ns = ["_nrf54l15-app", "_ns"] 136nrf54l15-app-ns = ["_nrf54l15-app", "_ns"]
137## nRF54L10 application core in Secure mode
138nrf54l10-app-s = ["_nrf54l10-app", "_s", "_multi_wdt"]
139## nRF54L10 application core in Non-Secure mode
140nrf54l10-app-ns = ["_nrf54l10-app", "_ns"]
141## nRF54L05 application core in Secure mode
142nrf54l05-app-s = ["_nrf54l05-app", "_s", "_multi_wdt"]
143## nRF54L05 application core in Non-Secure mode
144nrf54l05-app-ns = ["_nrf54l05-app", "_ns"]
133 145
134## nRF9160 in Secure mode 146## nRF9160 in Secure mode
135nrf9160-s = ["_nrf9160", "_s", "_nrf91"] 147nrf9160-s = ["_nrf9160", "_s", "_nrf91"]
@@ -153,6 +165,10 @@ _nrf5340-net = ["_nrf5340", "nrf-pac/nrf5340-net"]
153_nrf5340 = ["_gpio-p1", "_dppi"] 165_nrf5340 = ["_gpio-p1", "_dppi"]
154_nrf54l15-app = ["_nrf54l15", "nrf-pac/nrf54l15-app"] 166_nrf54l15-app = ["_nrf54l15", "nrf-pac/nrf54l15-app"]
155_nrf54l15 = ["_nrf54l", "_gpio-p1", "_gpio-p2"] 167_nrf54l15 = ["_nrf54l", "_gpio-p1", "_gpio-p2"]
168_nrf54l10-app = ["_nrf54l10", "nrf-pac/nrf54l10-app"]
169_nrf54l10 = ["_nrf54l", "_gpio-p1", "_gpio-p2"]
170_nrf54l05-app = ["_nrf54l05", "nrf-pac/nrf54l05-app"]
171_nrf54l05 = ["_nrf54l", "_gpio-p1", "_gpio-p2"]
156_nrf54l = ["_dppi", "_grtc"] 172_nrf54l = ["_dppi", "_grtc"]
157 173
158_nrf9160 = ["nrf-pac/nrf9160", "_dppi", "_spi-v1"] 174_nrf9160 = ["nrf-pac/nrf9160", "_dppi", "_spi-v1"]
@@ -202,7 +218,7 @@ embedded-io-async = { version = "0.6.1" }
202rand-core-06 = { package = "rand_core", version = "0.6" } 218rand-core-06 = { package = "rand_core", version = "0.6" }
203rand-core-09 = { package = "rand_core", version = "0.9" } 219rand-core-09 = { package = "rand_core", version = "0.9" }
204 220
205nrf-pac = { version = "0.1.0", git = "https://github.com/embassy-rs/nrf-pac.git", rev = "176dc4afe1dd8df78f3cbda4479ab5151aa32252" } 221nrf-pac = { version = "0.1.0", git = "https://github.com/embassy-rs/nrf-pac.git", rev = "52fd51ce762a3d3a81660dea62947e6d2d1e9d91" }
206 222
207defmt = { version = "1.0.1", optional = true } 223defmt = { version = "1.0.1", optional = true }
208bitflags = "2.4.2" 224bitflags = "2.4.2"
diff --git a/embassy-nrf/src/chips/nrf54l05_app.rs b/embassy-nrf/src/chips/nrf54l05_app.rs
new file mode 100644
index 000000000..8e6595248
--- /dev/null
+++ b/embassy-nrf/src/chips/nrf54l05_app.rs
@@ -0,0 +1,746 @@
1/// Peripheral Access Crate
2#[allow(unused_imports)]
3#[rustfmt::skip]
4pub mod pac {
5 pub use nrf_pac::*;
6
7 #[cfg(feature = "_ns")]
8 #[doc(no_inline)]
9 pub use nrf_pac::{
10 FICR_NS as FICR,
11 DPPIC00_NS as DPPIC00,
12 PPIB00_NS as PPIB00,
13 PPIB01_NS as PPIB01,
14 AAR00_NS as AAR00,
15 CCM00_NS as CCM00,
16 ECB00_NS as ECB00,
17 SPIM00_NS as SPIM00,
18 SPIS00_NS as SPIS00,
19 UARTE00_NS as UARTE00,
20 VPR00_NS as VPR00,
21 P2_NS as P2,
22 CTRLAP_NS as CTRLAP,
23 TAD_NS as TAD,
24 TIMER00_NS as TIMER00,
25 DPPIC10_NS as DPPIC10,
26 PPIB10_NS as PPIB10,
27 PPIB11_NS as PPIB11,
28 TIMER10_NS as TIMER10,
29 EGU10_NS as EGU10,
30 RADIO_NS as RADIO,
31 DPPIC20_NS as DPPIC20,
32 PPIB20_NS as PPIB20,
33 PPIB21_NS as PPIB21,
34 PPIB22_NS as PPIB22,
35 SPIM20_NS as SPIM20,
36 SPIS20_NS as SPIS20,
37 TWIM20_NS as TWIM20,
38 TWIS20_NS as TWIS20,
39 UARTE20_NS as UARTE20,
40 SPIM21_NS as SPIM21,
41 SPIS21_NS as SPIS21,
42 TWIM21_NS as TWIM21,
43 TWIS21_NS as TWIS21,
44 UARTE21_NS as UARTE21,
45 SPIM22_NS as SPIM22,
46 SPIS22_NS as SPIS22,
47 TWIM22_NS as TWIM22,
48 TWIS22_NS as TWIS22,
49 UARTE22_NS as UARTE22,
50 EGU20_NS as EGU20,
51 TIMER20_NS as TIMER20,
52 TIMER21_NS as TIMER21,
53 TIMER22_NS as TIMER22,
54 TIMER23_NS as TIMER23,
55 TIMER24_NS as TIMER24,
56 MEMCONF_NS as MEMCONF,
57 PDM20_NS as PDM20,
58 PDM21_NS as PDM21,
59 PWM20_NS as PWM20,
60 PWM21_NS as PWM21,
61 PWM22_NS as PWM22,
62 SAADC_NS as SAADC,
63 NFCT_NS as NFCT,
64 TEMP_NS as TEMP,
65 P1_NS as P1,
66 GPIOTE20_NS as GPIOTE20,
67 I2S20_NS as I2S20,
68 QDEC20_NS as QDEC20,
69 QDEC21_NS as QDEC21,
70 GRTC_NS as GRTC,
71 DPPIC30_NS as DPPIC30,
72 PPIB30_NS as PPIB30,
73 SPIM30_NS as SPIM30,
74 SPIS30_NS as SPIS30,
75 TWIM30_NS as TWIM30,
76 TWIS30_NS as TWIS30,
77 UARTE30_NS as UARTE30,
78 COMP_NS as COMP,
79 LPCOMP_NS as LPCOMP,
80 WDT31_NS as WDT31,
81 P0_NS as P0,
82 GPIOTE30_NS as GPIOTE30,
83 CLOCK_NS as CLOCK,
84 POWER_NS as POWER,
85 RESET_NS as RESET,
86 OSCILLATORS_NS as OSCILLATORS,
87 REGULATORS_NS as REGULATORS,
88 TPIU_NS as TPIU,
89 ETM_NS as ETM,
90 };
91
92 #[cfg(feature = "_s")]
93 #[doc(no_inline)]
94 pub use nrf_pac::{
95 FICR_NS as FICR,
96 SICR_S as SICR,
97 ICACHEDATA_S as ICACHEDATA,
98 ICACHEINFO_S as ICACHEINFO,
99 SWI00_S as SWI00,
100 SWI01_S as SWI01,
101 SWI02_S as SWI02,
102 SWI03_S as SWI03,
103 SPU00_S as SPU00,
104 MPC00_S as MPC00,
105 DPPIC00_S as DPPIC00,
106 PPIB00_S as PPIB00,
107 PPIB01_S as PPIB01,
108 KMU_S as KMU,
109 AAR00_S as AAR00,
110 CCM00_S as CCM00,
111 ECB00_S as ECB00,
112 CRACEN_S as CRACEN,
113 SPIM00_S as SPIM00,
114 SPIS00_S as SPIS00,
115 UARTE00_S as UARTE00,
116 GLITCHDET_S as GLITCHDET,
117 RRAMC_S as RRAMC,
118 VPR00_S as VPR00,
119 P2_S as P2,
120 CTRLAP_S as CTRLAP,
121 TAD_S as TAD,
122 TIMER00_S as TIMER00,
123 SPU10_S as SPU10,
124 DPPIC10_S as DPPIC10,
125 PPIB10_S as PPIB10,
126 PPIB11_S as PPIB11,
127 TIMER10_S as TIMER10,
128 EGU10_S as EGU10,
129 RADIO_S as RADIO,
130 SPU20_S as SPU20,
131 DPPIC20_S as DPPIC20,
132 PPIB20_S as PPIB20,
133 PPIB21_S as PPIB21,
134 PPIB22_S as PPIB22,
135 SPIM20_S as SPIM20,
136 SPIS20_S as SPIS20,
137 TWIM20_S as TWIM20,
138 TWIS20_S as TWIS20,
139 UARTE20_S as UARTE20,
140 SPIM21_S as SPIM21,
141 SPIS21_S as SPIS21,
142 TWIM21_S as TWIM21,
143 TWIS21_S as TWIS21,
144 UARTE21_S as UARTE21,
145 SPIM22_S as SPIM22,
146 SPIS22_S as SPIS22,
147 TWIM22_S as TWIM22,
148 TWIS22_S as TWIS22,
149 UARTE22_S as UARTE22,
150 EGU20_S as EGU20,
151 TIMER20_S as TIMER20,
152 TIMER21_S as TIMER21,
153 TIMER22_S as TIMER22,
154 TIMER23_S as TIMER23,
155 TIMER24_S as TIMER24,
156 MEMCONF_S as MEMCONF,
157 PDM20_S as PDM20,
158 PDM21_S as PDM21,
159 PWM20_S as PWM20,
160 PWM21_S as PWM21,
161 PWM22_S as PWM22,
162 SAADC_S as SAADC,
163 NFCT_S as NFCT,
164 TEMP_S as TEMP,
165 P1_S as P1,
166 GPIOTE20_S as GPIOTE20,
167 TAMPC_S as TAMPC,
168 I2S20_S as I2S20,
169 QDEC20_S as QDEC20,
170 QDEC21_S as QDEC21,
171 GRTC_S as GRTC,
172 SPU30_S as SPU30,
173 DPPIC30_S as DPPIC30,
174 PPIB30_S as PPIB30,
175 SPIM30_S as SPIM30,
176 SPIS30_S as SPIS30,
177 TWIM30_S as TWIM30,
178 TWIS30_S as TWIS30,
179 UARTE30_S as UARTE30,
180 COMP_S as COMP,
181 LPCOMP_S as LPCOMP,
182 WDT30_S as WDT30,
183 WDT31_S as WDT31,
184 P0_S as P0,
185 GPIOTE30_S as GPIOTE30,
186 CLOCK_S as CLOCK,
187 POWER_S as POWER,
188 RESET_S as RESET,
189 OSCILLATORS_S as OSCILLATORS,
190 REGULATORS_S as REGULATORS,
191 CRACENCORE_S as CRACENCORE,
192 CPUC_S as CPUC,
193 ICACHE_S as ICACHE,
194 };
195}
196
197/// The maximum buffer size that the EasyDMA can send/recv in one operation.
198pub const EASY_DMA_SIZE: usize = (1 << 16) - 1;
199pub const FORCE_COPY_BUFFER_SIZE: usize = 1024;
200
201// 1.5 MB NVM
202#[allow(unused)]
203pub const FLASH_SIZE: usize = 1524 * 1024;
204
205embassy_hal_internal::peripherals! {
206 // PPI
207 PPI00_CH0,
208 PPI00_CH1,
209 PPI00_CH2,
210 PPI00_CH3,
211 PPI00_CH4,
212 PPI00_CH5,
213 PPI00_CH6,
214 PPI00_CH7,
215
216 PPI10_CH0,
217 PPI10_CH1,
218 PPI10_CH2,
219 PPI10_CH3,
220 PPI10_CH4,
221 PPI10_CH5,
222 PPI10_CH6,
223 PPI10_CH7,
224 PPI10_CH8,
225 PPI10_CH9,
226 PPI10_CH10,
227 PPI10_CH11,
228 PPI10_CH12,
229 PPI10_CH13,
230 PPI10_CH14,
231 PPI10_CH15,
232 PPI10_CH16,
233 PPI10_CH17,
234 PPI10_CH18,
235 PPI10_CH19,
236 PPI10_CH20,
237 PPI10_CH21,
238 PPI10_CH22,
239 PPI10_CH23,
240
241 PPI20_CH0,
242 PPI20_CH1,
243 PPI20_CH2,
244 PPI20_CH3,
245 PPI20_CH4,
246 PPI20_CH5,
247 PPI20_CH6,
248 PPI20_CH7,
249 PPI20_CH8,
250 PPI20_CH9,
251 PPI20_CH10,
252 PPI20_CH11,
253 PPI20_CH12,
254 PPI20_CH13,
255 PPI20_CH14,
256 PPI20_CH15,
257
258 PPI30_CH0,
259 PPI30_CH1,
260 PPI30_CH2,
261 PPI30_CH3,
262
263 PPI00_GROUP0,
264 PPI00_GROUP1,
265
266 PPI10_GROUP0,
267 PPI10_GROUP1,
268 PPI10_GROUP2,
269 PPI10_GROUP3,
270 PPI10_GROUP4,
271 PPI10_GROUP5,
272
273 PPI20_GROUP0,
274 PPI20_GROUP1,
275 PPI20_GROUP2,
276 PPI20_GROUP3,
277 PPI20_GROUP4,
278 PPI20_GROUP5,
279
280 PPI30_GROUP0,
281 PPI30_GROUP1,
282
283 // PPI BRIDGE channels
284 PPIB00_CH0,
285 PPIB00_CH1,
286 PPIB00_CH2,
287 PPIB00_CH3,
288 PPIB00_CH4,
289 PPIB00_CH5,
290 PPIB00_CH6,
291 PPIB00_CH7,
292
293 PPIB01_CH0,
294 PPIB01_CH1,
295 PPIB01_CH2,
296 PPIB01_CH3,
297 PPIB01_CH4,
298 PPIB01_CH5,
299 PPIB01_CH6,
300 PPIB01_CH7,
301
302 PPIB10_CH0,
303 PPIB10_CH1,
304 PPIB10_CH2,
305 PPIB10_CH3,
306 PPIB10_CH4,
307 PPIB10_CH5,
308 PPIB10_CH6,
309 PPIB10_CH7,
310
311 PPIB11_CH0,
312 PPIB11_CH1,
313 PPIB11_CH2,
314 PPIB11_CH3,
315 PPIB11_CH4,
316 PPIB11_CH5,
317 PPIB11_CH6,
318 PPIB11_CH7,
319 PPIB11_CH8,
320 PPIB11_CH9,
321 PPIB11_CH10,
322 PPIB11_CH11,
323 PPIB11_CH12,
324 PPIB11_CH13,
325 PPIB11_CH14,
326 PPIB11_CH15,
327
328 PPIB20_CH0,
329 PPIB20_CH1,
330 PPIB20_CH2,
331 PPIB20_CH3,
332 PPIB20_CH4,
333 PPIB20_CH5,
334 PPIB20_CH6,
335 PPIB20_CH7,
336
337 PPIB21_CH0,
338 PPIB21_CH1,
339 PPIB21_CH2,
340 PPIB21_CH3,
341 PPIB21_CH4,
342 PPIB21_CH5,
343 PPIB21_CH6,
344 PPIB21_CH7,
345 PPIB21_CH8,
346 PPIB21_CH9,
347 PPIB21_CH10,
348 PPIB21_CH11,
349 PPIB21_CH12,
350 PPIB21_CH13,
351 PPIB21_CH14,
352 PPIB21_CH15,
353
354 PPIB22_CH0,
355 PPIB22_CH1,
356 PPIB22_CH2,
357 PPIB22_CH3,
358
359 PPIB30_CH0,
360 PPIB30_CH1,
361 PPIB30_CH2,
362 PPIB30_CH3,
363
364 // Timers
365 TIMER00,
366 TIMER10,
367 TIMER20,
368 TIMER21,
369 TIMER22,
370 TIMER23,
371 TIMER24,
372
373 // GPIO port 0
374 P0_00,
375 P0_01,
376 P0_02,
377 P0_03,
378 P0_04,
379 P0_05,
380 P0_06,
381
382 // GPIO port 1
383 P1_00,
384 P1_01,
385 P1_02,
386 P1_03,
387 P1_04,
388 P1_05,
389 P1_06,
390 P1_07,
391 P1_08,
392 P1_09,
393 P1_10,
394 P1_11,
395 P1_12,
396 P1_13,
397 P1_14,
398 P1_15,
399 P1_16,
400
401
402 // GPIO port 2
403 P2_00,
404 P2_01,
405 P2_02,
406 P2_03,
407 P2_04,
408 P2_05,
409 P2_06,
410 P2_07,
411 P2_08,
412 P2_09,
413 P2_10,
414
415 // GRTC
416 GRTC_CH0,
417 #[cfg(not(feature = "time-driver-grtc"))]
418 GRTC_CH1,
419 GRTC_CH2,
420 GRTC_CH3,
421 GRTC_CH4,
422 GRTC_CH5,
423 GRTC_CH6,
424 GRTC_CH7,
425 GRTC_CH8,
426 GRTC_CH9,
427 GRTC_CH10,
428 GRTC_CH11,
429
430 // PWM
431 PWM20,
432 PWM21,
433 PWM22,
434
435 // SERIAL
436 SERIAL00,
437 SERIAL20,
438 SERIAL21,
439 SERIAL22,
440 SERIAL30,
441
442 // SAADC
443 SAADC,
444
445 // RADIO
446 RADIO,
447
448
449 // GPIOTE instances
450 GPIOTE20,
451 GPIOTE30,
452
453 // GPIOTE channels
454 GPIOTE20_CH0,
455 GPIOTE20_CH1,
456 GPIOTE20_CH2,
457 GPIOTE20_CH3,
458 GPIOTE20_CH4,
459 GPIOTE20_CH5,
460 GPIOTE20_CH6,
461 GPIOTE20_CH7,
462 GPIOTE30_CH0,
463 GPIOTE30_CH1,
464 GPIOTE30_CH2,
465 GPIOTE30_CH3,
466
467 // CRACEN
468 #[cfg(feature = "_s")]
469 CRACEN,
470
471 #[cfg(feature = "_s")]
472 // RRAMC
473 RRAMC,
474
475 // TEMP
476 TEMP,
477
478 // WDT
479 #[cfg(feature = "_ns")]
480 WDT,
481 #[cfg(feature = "_s")]
482 WDT0,
483 #[cfg(feature = "_s")]
484 WDT1,
485}
486
487impl_pin!(P0_00, 0, 0);
488impl_pin!(P0_01, 0, 1);
489impl_pin!(P0_02, 0, 2);
490impl_pin!(P0_03, 0, 3);
491impl_pin!(P0_04, 0, 4);
492impl_pin!(P0_05, 0, 5);
493impl_pin!(P0_06, 0, 6);
494
495impl_pin!(P1_00, 1, 0);
496impl_pin!(P1_01, 1, 1);
497impl_pin!(P1_02, 1, 2);
498impl_pin!(P1_03, 1, 3);
499impl_pin!(P1_04, 1, 4);
500impl_pin!(P1_05, 1, 5);
501impl_pin!(P1_06, 1, 6);
502impl_pin!(P1_07, 1, 7);
503impl_pin!(P1_08, 1, 8);
504impl_pin!(P1_09, 1, 9);
505impl_pin!(P1_10, 1, 10);
506impl_pin!(P1_11, 1, 11);
507impl_pin!(P1_12, 1, 12);
508impl_pin!(P1_13, 1, 13);
509impl_pin!(P1_14, 1, 14);
510impl_pin!(P1_15, 1, 15);
511impl_pin!(P1_16, 1, 16);
512
513impl_pin!(P2_00, 2, 0);
514impl_pin!(P2_01, 2, 1);
515impl_pin!(P2_02, 2, 2);
516impl_pin!(P2_03, 2, 3);
517impl_pin!(P2_04, 2, 4);
518impl_pin!(P2_05, 2, 5);
519impl_pin!(P2_06, 2, 6);
520impl_pin!(P2_07, 2, 7);
521impl_pin!(P2_08, 2, 8);
522impl_pin!(P2_09, 2, 9);
523impl_pin!(P2_10, 2, 10);
524
525cfg_if::cfg_if! {
526 if #[cfg(feature = "gpiote")] {
527 impl_gpiote_pin!(P0_00, GPIOTE30);
528 impl_gpiote_pin!(P0_01, GPIOTE30);
529 impl_gpiote_pin!(P0_02, GPIOTE30);
530 impl_gpiote_pin!(P0_03, GPIOTE30);
531 impl_gpiote_pin!(P0_04, GPIOTE30);
532 impl_gpiote_pin!(P0_05, GPIOTE30);
533 impl_gpiote_pin!(P0_06, GPIOTE30);
534
535 impl_gpiote_pin!(P1_00, GPIOTE20);
536 impl_gpiote_pin!(P1_01, GPIOTE20);
537 impl_gpiote_pin!(P1_02, GPIOTE20);
538 impl_gpiote_pin!(P1_03, GPIOTE20);
539 impl_gpiote_pin!(P1_04, GPIOTE20);
540 impl_gpiote_pin!(P1_05, GPIOTE20);
541 impl_gpiote_pin!(P1_06, GPIOTE20);
542 impl_gpiote_pin!(P1_07, GPIOTE20);
543 impl_gpiote_pin!(P1_08, GPIOTE20);
544 impl_gpiote_pin!(P1_09, GPIOTE20);
545 impl_gpiote_pin!(P1_10, GPIOTE20);
546 impl_gpiote_pin!(P1_11, GPIOTE20);
547 impl_gpiote_pin!(P1_12, GPIOTE20);
548 impl_gpiote_pin!(P1_13, GPIOTE20);
549 impl_gpiote_pin!(P1_14, GPIOTE20);
550 impl_gpiote_pin!(P1_15, GPIOTE20);
551 impl_gpiote_pin!(P1_16, GPIOTE20);
552 }
553}
554
555#[cfg(feature = "_ns")]
556impl_wdt!(WDT, WDT31, WDT31, 0);
557#[cfg(feature = "_s")]
558impl_wdt!(WDT0, WDT31, WDT31, 0);
559#[cfg(feature = "_s")]
560impl_wdt!(WDT1, WDT30, WDT30, 1);
561// DPPI00 channels
562impl_ppi_channel!(PPI00_CH0, DPPIC00, 0 => configurable);
563impl_ppi_channel!(PPI00_CH1, DPPIC00, 1 => configurable);
564impl_ppi_channel!(PPI00_CH2, DPPIC00, 2 => configurable);
565impl_ppi_channel!(PPI00_CH3, DPPIC00, 3 => configurable);
566impl_ppi_channel!(PPI00_CH4, DPPIC00, 4 => configurable);
567impl_ppi_channel!(PPI00_CH5, DPPIC00, 5 => configurable);
568impl_ppi_channel!(PPI00_CH6, DPPIC00, 6 => configurable);
569impl_ppi_channel!(PPI00_CH7, DPPIC00, 7 => configurable);
570
571// DPPI10 channels
572impl_ppi_channel!(PPI10_CH0, DPPIC10, 0 => static);
573
574// DPPI20 channels
575impl_ppi_channel!(PPI20_CH0, DPPIC20, 0 => configurable);
576impl_ppi_channel!(PPI20_CH1, DPPIC20, 1 => configurable);
577impl_ppi_channel!(PPI20_CH2, DPPIC20, 2 => configurable);
578impl_ppi_channel!(PPI20_CH3, DPPIC20, 3 => configurable);
579impl_ppi_channel!(PPI20_CH4, DPPIC20, 4 => configurable);
580impl_ppi_channel!(PPI20_CH5, DPPIC20, 5 => configurable);
581impl_ppi_channel!(PPI20_CH6, DPPIC20, 6 => configurable);
582impl_ppi_channel!(PPI20_CH7, DPPIC20, 7 => configurable);
583impl_ppi_channel!(PPI20_CH8, DPPIC20, 8 => configurable);
584impl_ppi_channel!(PPI20_CH9, DPPIC20, 9 => configurable);
585impl_ppi_channel!(PPI20_CH10, DPPIC20, 10 => configurable);
586impl_ppi_channel!(PPI20_CH11, DPPIC20, 11 => configurable);
587impl_ppi_channel!(PPI20_CH12, DPPIC20, 12 => configurable);
588impl_ppi_channel!(PPI20_CH13, DPPIC20, 13 => configurable);
589impl_ppi_channel!(PPI20_CH14, DPPIC20, 14 => configurable);
590impl_ppi_channel!(PPI20_CH15, DPPIC20, 15 => configurable);
591
592// DPPI30 channels
593impl_ppi_channel!(PPI30_CH0, DPPIC30, 0 => configurable);
594impl_ppi_channel!(PPI30_CH1, DPPIC30, 1 => configurable);
595impl_ppi_channel!(PPI30_CH2, DPPIC30, 2 => configurable);
596impl_ppi_channel!(PPI30_CH3, DPPIC30, 3 => configurable);
597
598// DPPI00 groups
599impl_ppi_group!(PPI00_GROUP0, DPPIC00, 0);
600impl_ppi_group!(PPI00_GROUP1, DPPIC00, 1);
601
602// DPPI10 groups
603impl_ppi_group!(PPI10_GROUP0, DPPIC10, 0);
604
605// DPPI20 groups
606impl_ppi_group!(PPI20_GROUP0, DPPIC20, 0);
607impl_ppi_group!(PPI20_GROUP1, DPPIC20, 1);
608impl_ppi_group!(PPI20_GROUP2, DPPIC20, 2);
609impl_ppi_group!(PPI20_GROUP3, DPPIC20, 3);
610impl_ppi_group!(PPI20_GROUP4, DPPIC20, 4);
611impl_ppi_group!(PPI20_GROUP5, DPPIC20, 5);
612
613// DPPI30 groups
614impl_ppi_group!(PPI30_GROUP0, DPPIC30, 0);
615impl_ppi_group!(PPI30_GROUP1, DPPIC30, 1);
616
617impl_timer!(TIMER00, TIMER00, TIMER00);
618impl_timer!(TIMER10, TIMER10, TIMER10);
619impl_timer!(TIMER20, TIMER20, TIMER20);
620impl_timer!(TIMER21, TIMER21, TIMER21);
621impl_timer!(TIMER22, TIMER22, TIMER22);
622impl_timer!(TIMER23, TIMER23, TIMER23);
623impl_timer!(TIMER24, TIMER24, TIMER24);
624
625impl_twim!(SERIAL20, TWIM20, SERIAL20);
626impl_twim!(SERIAL21, TWIM21, SERIAL21);
627impl_twim!(SERIAL22, TWIM22, SERIAL22);
628impl_twim!(SERIAL30, TWIM30, SERIAL30);
629
630impl_twis!(SERIAL20, TWIS20, SERIAL20);
631impl_twis!(SERIAL21, TWIS21, SERIAL21);
632impl_twis!(SERIAL22, TWIS22, SERIAL22);
633impl_twis!(SERIAL30, TWIS30, SERIAL30);
634
635impl_pwm!(PWM20, PWM20, PWM20);
636impl_pwm!(PWM21, PWM21, PWM21);
637impl_pwm!(PWM22, PWM22, PWM22);
638
639#[cfg(feature = "_s")]
640impl_spim!(
641 SERIAL00,
642 SPIM00,
643 SERIAL00,
644 match pac::OSCILLATORS_S.pll().currentfreq().read().currentfreq() {
645 pac::oscillators::vals::Currentfreq::CK128M => 128_000_000,
646 pac::oscillators::vals::Currentfreq::CK64M => 64_000_000,
647 _ => unreachable!(),
648 }
649);
650#[cfg(feature = "_ns")]
651impl_spim!(
652 SERIAL00,
653 SPIM00,
654 SERIAL00,
655 match pac::OSCILLATORS_NS.pll().currentfreq().read().currentfreq() {
656 pac::oscillators::vals::Currentfreq::CK128M => 128_000_000,
657 pac::oscillators::vals::Currentfreq::CK64M => 64_000_000,
658 _ => unreachable!(),
659 }
660);
661impl_spim!(SERIAL20, SPIM20, SERIAL20, 16_000_000);
662impl_spim!(SERIAL21, SPIM21, SERIAL21, 16_000_000);
663impl_spim!(SERIAL22, SPIM22, SERIAL22, 16_000_000);
664impl_spim!(SERIAL30, SPIM30, SERIAL30, 16_000_000);
665
666impl_spis!(SERIAL20, SPIS20, SERIAL20);
667impl_spis!(SERIAL21, SPIS21, SERIAL21);
668impl_spis!(SERIAL22, SPIS22, SERIAL22);
669impl_spis!(SERIAL30, SPIS30, SERIAL30);
670
671impl_uarte!(SERIAL00, UARTE00, SERIAL00);
672impl_uarte!(SERIAL20, UARTE20, SERIAL20);
673impl_uarte!(SERIAL21, UARTE21, SERIAL21);
674impl_uarte!(SERIAL22, UARTE22, SERIAL22);
675impl_uarte!(SERIAL30, UARTE30, SERIAL30);
676
677// NB: SAADC uses "pin" abstraction, not "AIN"
678impl_saadc_input!(P1_04, 1, 4);
679impl_saadc_input!(P1_05, 1, 5);
680impl_saadc_input!(P1_06, 1, 6);
681impl_saadc_input!(P1_07, 1, 7);
682impl_saadc_input!(P1_11, 1, 11);
683impl_saadc_input!(P1_12, 1, 12);
684impl_saadc_input!(P1_13, 1, 13);
685impl_saadc_input!(P1_14, 1, 14);
686
687#[cfg(feature = "_s")]
688impl_cracen!(CRACEN, CRACEN, CRACEN);
689
690embassy_hal_internal::interrupt_mod!(
691 SWI00,
692 SWI01,
693 SWI02,
694 SWI03,
695 SPU00,
696 MPC00,
697 AAR00_CCM00,
698 ECB00,
699 CRACEN,
700 SERIAL00,
701 RRAMC,
702 VPR00,
703 CTRLAP,
704 TIMER00,
705 SPU10,
706 TIMER10,
707 EGU10,
708 RADIO_0,
709 RADIO_1,
710 SPU20,
711 SERIAL20,
712 SERIAL21,
713 SERIAL22,
714 EGU20,
715 TIMER20,
716 TIMER21,
717 TIMER22,
718 TIMER23,
719 TIMER24,
720 PDM20,
721 PDM21,
722 PWM20,
723 PWM21,
724 PWM22,
725 SAADC,
726 NFCT,
727 TEMP,
728 GPIOTE20_0,
729 GPIOTE20_1,
730 TAMPC,
731 I2S20,
732 QDEC20,
733 QDEC21,
734 GRTC_0,
735 GRTC_1,
736 GRTC_2,
737 GRTC_3,
738 SPU30,
739 SERIAL30,
740 COMP_LPCOMP,
741 WDT30,
742 WDT31,
743 GPIOTE30_0,
744 GPIOTE30_1,
745 CLOCK_POWER,
746);
diff --git a/embassy-nrf/src/chips/nrf54l10_app.rs b/embassy-nrf/src/chips/nrf54l10_app.rs
new file mode 100644
index 000000000..8e6595248
--- /dev/null
+++ b/embassy-nrf/src/chips/nrf54l10_app.rs
@@ -0,0 +1,746 @@
1/// Peripheral Access Crate
2#[allow(unused_imports)]
3#[rustfmt::skip]
4pub mod pac {
5 pub use nrf_pac::*;
6
7 #[cfg(feature = "_ns")]
8 #[doc(no_inline)]
9 pub use nrf_pac::{
10 FICR_NS as FICR,
11 DPPIC00_NS as DPPIC00,
12 PPIB00_NS as PPIB00,
13 PPIB01_NS as PPIB01,
14 AAR00_NS as AAR00,
15 CCM00_NS as CCM00,
16 ECB00_NS as ECB00,
17 SPIM00_NS as SPIM00,
18 SPIS00_NS as SPIS00,
19 UARTE00_NS as UARTE00,
20 VPR00_NS as VPR00,
21 P2_NS as P2,
22 CTRLAP_NS as CTRLAP,
23 TAD_NS as TAD,
24 TIMER00_NS as TIMER00,
25 DPPIC10_NS as DPPIC10,
26 PPIB10_NS as PPIB10,
27 PPIB11_NS as PPIB11,
28 TIMER10_NS as TIMER10,
29 EGU10_NS as EGU10,
30 RADIO_NS as RADIO,
31 DPPIC20_NS as DPPIC20,
32 PPIB20_NS as PPIB20,
33 PPIB21_NS as PPIB21,
34 PPIB22_NS as PPIB22,
35 SPIM20_NS as SPIM20,
36 SPIS20_NS as SPIS20,
37 TWIM20_NS as TWIM20,
38 TWIS20_NS as TWIS20,
39 UARTE20_NS as UARTE20,
40 SPIM21_NS as SPIM21,
41 SPIS21_NS as SPIS21,
42 TWIM21_NS as TWIM21,
43 TWIS21_NS as TWIS21,
44 UARTE21_NS as UARTE21,
45 SPIM22_NS as SPIM22,
46 SPIS22_NS as SPIS22,
47 TWIM22_NS as TWIM22,
48 TWIS22_NS as TWIS22,
49 UARTE22_NS as UARTE22,
50 EGU20_NS as EGU20,
51 TIMER20_NS as TIMER20,
52 TIMER21_NS as TIMER21,
53 TIMER22_NS as TIMER22,
54 TIMER23_NS as TIMER23,
55 TIMER24_NS as TIMER24,
56 MEMCONF_NS as MEMCONF,
57 PDM20_NS as PDM20,
58 PDM21_NS as PDM21,
59 PWM20_NS as PWM20,
60 PWM21_NS as PWM21,
61 PWM22_NS as PWM22,
62 SAADC_NS as SAADC,
63 NFCT_NS as NFCT,
64 TEMP_NS as TEMP,
65 P1_NS as P1,
66 GPIOTE20_NS as GPIOTE20,
67 I2S20_NS as I2S20,
68 QDEC20_NS as QDEC20,
69 QDEC21_NS as QDEC21,
70 GRTC_NS as GRTC,
71 DPPIC30_NS as DPPIC30,
72 PPIB30_NS as PPIB30,
73 SPIM30_NS as SPIM30,
74 SPIS30_NS as SPIS30,
75 TWIM30_NS as TWIM30,
76 TWIS30_NS as TWIS30,
77 UARTE30_NS as UARTE30,
78 COMP_NS as COMP,
79 LPCOMP_NS as LPCOMP,
80 WDT31_NS as WDT31,
81 P0_NS as P0,
82 GPIOTE30_NS as GPIOTE30,
83 CLOCK_NS as CLOCK,
84 POWER_NS as POWER,
85 RESET_NS as RESET,
86 OSCILLATORS_NS as OSCILLATORS,
87 REGULATORS_NS as REGULATORS,
88 TPIU_NS as TPIU,
89 ETM_NS as ETM,
90 };
91
92 #[cfg(feature = "_s")]
93 #[doc(no_inline)]
94 pub use nrf_pac::{
95 FICR_NS as FICR,
96 SICR_S as SICR,
97 ICACHEDATA_S as ICACHEDATA,
98 ICACHEINFO_S as ICACHEINFO,
99 SWI00_S as SWI00,
100 SWI01_S as SWI01,
101 SWI02_S as SWI02,
102 SWI03_S as SWI03,
103 SPU00_S as SPU00,
104 MPC00_S as MPC00,
105 DPPIC00_S as DPPIC00,
106 PPIB00_S as PPIB00,
107 PPIB01_S as PPIB01,
108 KMU_S as KMU,
109 AAR00_S as AAR00,
110 CCM00_S as CCM00,
111 ECB00_S as ECB00,
112 CRACEN_S as CRACEN,
113 SPIM00_S as SPIM00,
114 SPIS00_S as SPIS00,
115 UARTE00_S as UARTE00,
116 GLITCHDET_S as GLITCHDET,
117 RRAMC_S as RRAMC,
118 VPR00_S as VPR00,
119 P2_S as P2,
120 CTRLAP_S as CTRLAP,
121 TAD_S as TAD,
122 TIMER00_S as TIMER00,
123 SPU10_S as SPU10,
124 DPPIC10_S as DPPIC10,
125 PPIB10_S as PPIB10,
126 PPIB11_S as PPIB11,
127 TIMER10_S as TIMER10,
128 EGU10_S as EGU10,
129 RADIO_S as RADIO,
130 SPU20_S as SPU20,
131 DPPIC20_S as DPPIC20,
132 PPIB20_S as PPIB20,
133 PPIB21_S as PPIB21,
134 PPIB22_S as PPIB22,
135 SPIM20_S as SPIM20,
136 SPIS20_S as SPIS20,
137 TWIM20_S as TWIM20,
138 TWIS20_S as TWIS20,
139 UARTE20_S as UARTE20,
140 SPIM21_S as SPIM21,
141 SPIS21_S as SPIS21,
142 TWIM21_S as TWIM21,
143 TWIS21_S as TWIS21,
144 UARTE21_S as UARTE21,
145 SPIM22_S as SPIM22,
146 SPIS22_S as SPIS22,
147 TWIM22_S as TWIM22,
148 TWIS22_S as TWIS22,
149 UARTE22_S as UARTE22,
150 EGU20_S as EGU20,
151 TIMER20_S as TIMER20,
152 TIMER21_S as TIMER21,
153 TIMER22_S as TIMER22,
154 TIMER23_S as TIMER23,
155 TIMER24_S as TIMER24,
156 MEMCONF_S as MEMCONF,
157 PDM20_S as PDM20,
158 PDM21_S as PDM21,
159 PWM20_S as PWM20,
160 PWM21_S as PWM21,
161 PWM22_S as PWM22,
162 SAADC_S as SAADC,
163 NFCT_S as NFCT,
164 TEMP_S as TEMP,
165 P1_S as P1,
166 GPIOTE20_S as GPIOTE20,
167 TAMPC_S as TAMPC,
168 I2S20_S as I2S20,
169 QDEC20_S as QDEC20,
170 QDEC21_S as QDEC21,
171 GRTC_S as GRTC,
172 SPU30_S as SPU30,
173 DPPIC30_S as DPPIC30,
174 PPIB30_S as PPIB30,
175 SPIM30_S as SPIM30,
176 SPIS30_S as SPIS30,
177 TWIM30_S as TWIM30,
178 TWIS30_S as TWIS30,
179 UARTE30_S as UARTE30,
180 COMP_S as COMP,
181 LPCOMP_S as LPCOMP,
182 WDT30_S as WDT30,
183 WDT31_S as WDT31,
184 P0_S as P0,
185 GPIOTE30_S as GPIOTE30,
186 CLOCK_S as CLOCK,
187 POWER_S as POWER,
188 RESET_S as RESET,
189 OSCILLATORS_S as OSCILLATORS,
190 REGULATORS_S as REGULATORS,
191 CRACENCORE_S as CRACENCORE,
192 CPUC_S as CPUC,
193 ICACHE_S as ICACHE,
194 };
195}
196
197/// The maximum buffer size that the EasyDMA can send/recv in one operation.
198pub const EASY_DMA_SIZE: usize = (1 << 16) - 1;
199pub const FORCE_COPY_BUFFER_SIZE: usize = 1024;
200
201// 1.5 MB NVM
202#[allow(unused)]
203pub const FLASH_SIZE: usize = 1524 * 1024;
204
205embassy_hal_internal::peripherals! {
206 // PPI
207 PPI00_CH0,
208 PPI00_CH1,
209 PPI00_CH2,
210 PPI00_CH3,
211 PPI00_CH4,
212 PPI00_CH5,
213 PPI00_CH6,
214 PPI00_CH7,
215
216 PPI10_CH0,
217 PPI10_CH1,
218 PPI10_CH2,
219 PPI10_CH3,
220 PPI10_CH4,
221 PPI10_CH5,
222 PPI10_CH6,
223 PPI10_CH7,
224 PPI10_CH8,
225 PPI10_CH9,
226 PPI10_CH10,
227 PPI10_CH11,
228 PPI10_CH12,
229 PPI10_CH13,
230 PPI10_CH14,
231 PPI10_CH15,
232 PPI10_CH16,
233 PPI10_CH17,
234 PPI10_CH18,
235 PPI10_CH19,
236 PPI10_CH20,
237 PPI10_CH21,
238 PPI10_CH22,
239 PPI10_CH23,
240
241 PPI20_CH0,
242 PPI20_CH1,
243 PPI20_CH2,
244 PPI20_CH3,
245 PPI20_CH4,
246 PPI20_CH5,
247 PPI20_CH6,
248 PPI20_CH7,
249 PPI20_CH8,
250 PPI20_CH9,
251 PPI20_CH10,
252 PPI20_CH11,
253 PPI20_CH12,
254 PPI20_CH13,
255 PPI20_CH14,
256 PPI20_CH15,
257
258 PPI30_CH0,
259 PPI30_CH1,
260 PPI30_CH2,
261 PPI30_CH3,
262
263 PPI00_GROUP0,
264 PPI00_GROUP1,
265
266 PPI10_GROUP0,
267 PPI10_GROUP1,
268 PPI10_GROUP2,
269 PPI10_GROUP3,
270 PPI10_GROUP4,
271 PPI10_GROUP5,
272
273 PPI20_GROUP0,
274 PPI20_GROUP1,
275 PPI20_GROUP2,
276 PPI20_GROUP3,
277 PPI20_GROUP4,
278 PPI20_GROUP5,
279
280 PPI30_GROUP0,
281 PPI30_GROUP1,
282
283 // PPI BRIDGE channels
284 PPIB00_CH0,
285 PPIB00_CH1,
286 PPIB00_CH2,
287 PPIB00_CH3,
288 PPIB00_CH4,
289 PPIB00_CH5,
290 PPIB00_CH6,
291 PPIB00_CH7,
292
293 PPIB01_CH0,
294 PPIB01_CH1,
295 PPIB01_CH2,
296 PPIB01_CH3,
297 PPIB01_CH4,
298 PPIB01_CH5,
299 PPIB01_CH6,
300 PPIB01_CH7,
301
302 PPIB10_CH0,
303 PPIB10_CH1,
304 PPIB10_CH2,
305 PPIB10_CH3,
306 PPIB10_CH4,
307 PPIB10_CH5,
308 PPIB10_CH6,
309 PPIB10_CH7,
310
311 PPIB11_CH0,
312 PPIB11_CH1,
313 PPIB11_CH2,
314 PPIB11_CH3,
315 PPIB11_CH4,
316 PPIB11_CH5,
317 PPIB11_CH6,
318 PPIB11_CH7,
319 PPIB11_CH8,
320 PPIB11_CH9,
321 PPIB11_CH10,
322 PPIB11_CH11,
323 PPIB11_CH12,
324 PPIB11_CH13,
325 PPIB11_CH14,
326 PPIB11_CH15,
327
328 PPIB20_CH0,
329 PPIB20_CH1,
330 PPIB20_CH2,
331 PPIB20_CH3,
332 PPIB20_CH4,
333 PPIB20_CH5,
334 PPIB20_CH6,
335 PPIB20_CH7,
336
337 PPIB21_CH0,
338 PPIB21_CH1,
339 PPIB21_CH2,
340 PPIB21_CH3,
341 PPIB21_CH4,
342 PPIB21_CH5,
343 PPIB21_CH6,
344 PPIB21_CH7,
345 PPIB21_CH8,
346 PPIB21_CH9,
347 PPIB21_CH10,
348 PPIB21_CH11,
349 PPIB21_CH12,
350 PPIB21_CH13,
351 PPIB21_CH14,
352 PPIB21_CH15,
353
354 PPIB22_CH0,
355 PPIB22_CH1,
356 PPIB22_CH2,
357 PPIB22_CH3,
358
359 PPIB30_CH0,
360 PPIB30_CH1,
361 PPIB30_CH2,
362 PPIB30_CH3,
363
364 // Timers
365 TIMER00,
366 TIMER10,
367 TIMER20,
368 TIMER21,
369 TIMER22,
370 TIMER23,
371 TIMER24,
372
373 // GPIO port 0
374 P0_00,
375 P0_01,
376 P0_02,
377 P0_03,
378 P0_04,
379 P0_05,
380 P0_06,
381
382 // GPIO port 1
383 P1_00,
384 P1_01,
385 P1_02,
386 P1_03,
387 P1_04,
388 P1_05,
389 P1_06,
390 P1_07,
391 P1_08,
392 P1_09,
393 P1_10,
394 P1_11,
395 P1_12,
396 P1_13,
397 P1_14,
398 P1_15,
399 P1_16,
400
401
402 // GPIO port 2
403 P2_00,
404 P2_01,
405 P2_02,
406 P2_03,
407 P2_04,
408 P2_05,
409 P2_06,
410 P2_07,
411 P2_08,
412 P2_09,
413 P2_10,
414
415 // GRTC
416 GRTC_CH0,
417 #[cfg(not(feature = "time-driver-grtc"))]
418 GRTC_CH1,
419 GRTC_CH2,
420 GRTC_CH3,
421 GRTC_CH4,
422 GRTC_CH5,
423 GRTC_CH6,
424 GRTC_CH7,
425 GRTC_CH8,
426 GRTC_CH9,
427 GRTC_CH10,
428 GRTC_CH11,
429
430 // PWM
431 PWM20,
432 PWM21,
433 PWM22,
434
435 // SERIAL
436 SERIAL00,
437 SERIAL20,
438 SERIAL21,
439 SERIAL22,
440 SERIAL30,
441
442 // SAADC
443 SAADC,
444
445 // RADIO
446 RADIO,
447
448
449 // GPIOTE instances
450 GPIOTE20,
451 GPIOTE30,
452
453 // GPIOTE channels
454 GPIOTE20_CH0,
455 GPIOTE20_CH1,
456 GPIOTE20_CH2,
457 GPIOTE20_CH3,
458 GPIOTE20_CH4,
459 GPIOTE20_CH5,
460 GPIOTE20_CH6,
461 GPIOTE20_CH7,
462 GPIOTE30_CH0,
463 GPIOTE30_CH1,
464 GPIOTE30_CH2,
465 GPIOTE30_CH3,
466
467 // CRACEN
468 #[cfg(feature = "_s")]
469 CRACEN,
470
471 #[cfg(feature = "_s")]
472 // RRAMC
473 RRAMC,
474
475 // TEMP
476 TEMP,
477
478 // WDT
479 #[cfg(feature = "_ns")]
480 WDT,
481 #[cfg(feature = "_s")]
482 WDT0,
483 #[cfg(feature = "_s")]
484 WDT1,
485}
486
487impl_pin!(P0_00, 0, 0);
488impl_pin!(P0_01, 0, 1);
489impl_pin!(P0_02, 0, 2);
490impl_pin!(P0_03, 0, 3);
491impl_pin!(P0_04, 0, 4);
492impl_pin!(P0_05, 0, 5);
493impl_pin!(P0_06, 0, 6);
494
495impl_pin!(P1_00, 1, 0);
496impl_pin!(P1_01, 1, 1);
497impl_pin!(P1_02, 1, 2);
498impl_pin!(P1_03, 1, 3);
499impl_pin!(P1_04, 1, 4);
500impl_pin!(P1_05, 1, 5);
501impl_pin!(P1_06, 1, 6);
502impl_pin!(P1_07, 1, 7);
503impl_pin!(P1_08, 1, 8);
504impl_pin!(P1_09, 1, 9);
505impl_pin!(P1_10, 1, 10);
506impl_pin!(P1_11, 1, 11);
507impl_pin!(P1_12, 1, 12);
508impl_pin!(P1_13, 1, 13);
509impl_pin!(P1_14, 1, 14);
510impl_pin!(P1_15, 1, 15);
511impl_pin!(P1_16, 1, 16);
512
513impl_pin!(P2_00, 2, 0);
514impl_pin!(P2_01, 2, 1);
515impl_pin!(P2_02, 2, 2);
516impl_pin!(P2_03, 2, 3);
517impl_pin!(P2_04, 2, 4);
518impl_pin!(P2_05, 2, 5);
519impl_pin!(P2_06, 2, 6);
520impl_pin!(P2_07, 2, 7);
521impl_pin!(P2_08, 2, 8);
522impl_pin!(P2_09, 2, 9);
523impl_pin!(P2_10, 2, 10);
524
525cfg_if::cfg_if! {
526 if #[cfg(feature = "gpiote")] {
527 impl_gpiote_pin!(P0_00, GPIOTE30);
528 impl_gpiote_pin!(P0_01, GPIOTE30);
529 impl_gpiote_pin!(P0_02, GPIOTE30);
530 impl_gpiote_pin!(P0_03, GPIOTE30);
531 impl_gpiote_pin!(P0_04, GPIOTE30);
532 impl_gpiote_pin!(P0_05, GPIOTE30);
533 impl_gpiote_pin!(P0_06, GPIOTE30);
534
535 impl_gpiote_pin!(P1_00, GPIOTE20);
536 impl_gpiote_pin!(P1_01, GPIOTE20);
537 impl_gpiote_pin!(P1_02, GPIOTE20);
538 impl_gpiote_pin!(P1_03, GPIOTE20);
539 impl_gpiote_pin!(P1_04, GPIOTE20);
540 impl_gpiote_pin!(P1_05, GPIOTE20);
541 impl_gpiote_pin!(P1_06, GPIOTE20);
542 impl_gpiote_pin!(P1_07, GPIOTE20);
543 impl_gpiote_pin!(P1_08, GPIOTE20);
544 impl_gpiote_pin!(P1_09, GPIOTE20);
545 impl_gpiote_pin!(P1_10, GPIOTE20);
546 impl_gpiote_pin!(P1_11, GPIOTE20);
547 impl_gpiote_pin!(P1_12, GPIOTE20);
548 impl_gpiote_pin!(P1_13, GPIOTE20);
549 impl_gpiote_pin!(P1_14, GPIOTE20);
550 impl_gpiote_pin!(P1_15, GPIOTE20);
551 impl_gpiote_pin!(P1_16, GPIOTE20);
552 }
553}
554
555#[cfg(feature = "_ns")]
556impl_wdt!(WDT, WDT31, WDT31, 0);
557#[cfg(feature = "_s")]
558impl_wdt!(WDT0, WDT31, WDT31, 0);
559#[cfg(feature = "_s")]
560impl_wdt!(WDT1, WDT30, WDT30, 1);
561// DPPI00 channels
562impl_ppi_channel!(PPI00_CH0, DPPIC00, 0 => configurable);
563impl_ppi_channel!(PPI00_CH1, DPPIC00, 1 => configurable);
564impl_ppi_channel!(PPI00_CH2, DPPIC00, 2 => configurable);
565impl_ppi_channel!(PPI00_CH3, DPPIC00, 3 => configurable);
566impl_ppi_channel!(PPI00_CH4, DPPIC00, 4 => configurable);
567impl_ppi_channel!(PPI00_CH5, DPPIC00, 5 => configurable);
568impl_ppi_channel!(PPI00_CH6, DPPIC00, 6 => configurable);
569impl_ppi_channel!(PPI00_CH7, DPPIC00, 7 => configurable);
570
571// DPPI10 channels
572impl_ppi_channel!(PPI10_CH0, DPPIC10, 0 => static);
573
574// DPPI20 channels
575impl_ppi_channel!(PPI20_CH0, DPPIC20, 0 => configurable);
576impl_ppi_channel!(PPI20_CH1, DPPIC20, 1 => configurable);
577impl_ppi_channel!(PPI20_CH2, DPPIC20, 2 => configurable);
578impl_ppi_channel!(PPI20_CH3, DPPIC20, 3 => configurable);
579impl_ppi_channel!(PPI20_CH4, DPPIC20, 4 => configurable);
580impl_ppi_channel!(PPI20_CH5, DPPIC20, 5 => configurable);
581impl_ppi_channel!(PPI20_CH6, DPPIC20, 6 => configurable);
582impl_ppi_channel!(PPI20_CH7, DPPIC20, 7 => configurable);
583impl_ppi_channel!(PPI20_CH8, DPPIC20, 8 => configurable);
584impl_ppi_channel!(PPI20_CH9, DPPIC20, 9 => configurable);
585impl_ppi_channel!(PPI20_CH10, DPPIC20, 10 => configurable);
586impl_ppi_channel!(PPI20_CH11, DPPIC20, 11 => configurable);
587impl_ppi_channel!(PPI20_CH12, DPPIC20, 12 => configurable);
588impl_ppi_channel!(PPI20_CH13, DPPIC20, 13 => configurable);
589impl_ppi_channel!(PPI20_CH14, DPPIC20, 14 => configurable);
590impl_ppi_channel!(PPI20_CH15, DPPIC20, 15 => configurable);
591
592// DPPI30 channels
593impl_ppi_channel!(PPI30_CH0, DPPIC30, 0 => configurable);
594impl_ppi_channel!(PPI30_CH1, DPPIC30, 1 => configurable);
595impl_ppi_channel!(PPI30_CH2, DPPIC30, 2 => configurable);
596impl_ppi_channel!(PPI30_CH3, DPPIC30, 3 => configurable);
597
598// DPPI00 groups
599impl_ppi_group!(PPI00_GROUP0, DPPIC00, 0);
600impl_ppi_group!(PPI00_GROUP1, DPPIC00, 1);
601
602// DPPI10 groups
603impl_ppi_group!(PPI10_GROUP0, DPPIC10, 0);
604
605// DPPI20 groups
606impl_ppi_group!(PPI20_GROUP0, DPPIC20, 0);
607impl_ppi_group!(PPI20_GROUP1, DPPIC20, 1);
608impl_ppi_group!(PPI20_GROUP2, DPPIC20, 2);
609impl_ppi_group!(PPI20_GROUP3, DPPIC20, 3);
610impl_ppi_group!(PPI20_GROUP4, DPPIC20, 4);
611impl_ppi_group!(PPI20_GROUP5, DPPIC20, 5);
612
613// DPPI30 groups
614impl_ppi_group!(PPI30_GROUP0, DPPIC30, 0);
615impl_ppi_group!(PPI30_GROUP1, DPPIC30, 1);
616
617impl_timer!(TIMER00, TIMER00, TIMER00);
618impl_timer!(TIMER10, TIMER10, TIMER10);
619impl_timer!(TIMER20, TIMER20, TIMER20);
620impl_timer!(TIMER21, TIMER21, TIMER21);
621impl_timer!(TIMER22, TIMER22, TIMER22);
622impl_timer!(TIMER23, TIMER23, TIMER23);
623impl_timer!(TIMER24, TIMER24, TIMER24);
624
625impl_twim!(SERIAL20, TWIM20, SERIAL20);
626impl_twim!(SERIAL21, TWIM21, SERIAL21);
627impl_twim!(SERIAL22, TWIM22, SERIAL22);
628impl_twim!(SERIAL30, TWIM30, SERIAL30);
629
630impl_twis!(SERIAL20, TWIS20, SERIAL20);
631impl_twis!(SERIAL21, TWIS21, SERIAL21);
632impl_twis!(SERIAL22, TWIS22, SERIAL22);
633impl_twis!(SERIAL30, TWIS30, SERIAL30);
634
635impl_pwm!(PWM20, PWM20, PWM20);
636impl_pwm!(PWM21, PWM21, PWM21);
637impl_pwm!(PWM22, PWM22, PWM22);
638
639#[cfg(feature = "_s")]
640impl_spim!(
641 SERIAL00,
642 SPIM00,
643 SERIAL00,
644 match pac::OSCILLATORS_S.pll().currentfreq().read().currentfreq() {
645 pac::oscillators::vals::Currentfreq::CK128M => 128_000_000,
646 pac::oscillators::vals::Currentfreq::CK64M => 64_000_000,
647 _ => unreachable!(),
648 }
649);
650#[cfg(feature = "_ns")]
651impl_spim!(
652 SERIAL00,
653 SPIM00,
654 SERIAL00,
655 match pac::OSCILLATORS_NS.pll().currentfreq().read().currentfreq() {
656 pac::oscillators::vals::Currentfreq::CK128M => 128_000_000,
657 pac::oscillators::vals::Currentfreq::CK64M => 64_000_000,
658 _ => unreachable!(),
659 }
660);
661impl_spim!(SERIAL20, SPIM20, SERIAL20, 16_000_000);
662impl_spim!(SERIAL21, SPIM21, SERIAL21, 16_000_000);
663impl_spim!(SERIAL22, SPIM22, SERIAL22, 16_000_000);
664impl_spim!(SERIAL30, SPIM30, SERIAL30, 16_000_000);
665
666impl_spis!(SERIAL20, SPIS20, SERIAL20);
667impl_spis!(SERIAL21, SPIS21, SERIAL21);
668impl_spis!(SERIAL22, SPIS22, SERIAL22);
669impl_spis!(SERIAL30, SPIS30, SERIAL30);
670
671impl_uarte!(SERIAL00, UARTE00, SERIAL00);
672impl_uarte!(SERIAL20, UARTE20, SERIAL20);
673impl_uarte!(SERIAL21, UARTE21, SERIAL21);
674impl_uarte!(SERIAL22, UARTE22, SERIAL22);
675impl_uarte!(SERIAL30, UARTE30, SERIAL30);
676
677// NB: SAADC uses "pin" abstraction, not "AIN"
678impl_saadc_input!(P1_04, 1, 4);
679impl_saadc_input!(P1_05, 1, 5);
680impl_saadc_input!(P1_06, 1, 6);
681impl_saadc_input!(P1_07, 1, 7);
682impl_saadc_input!(P1_11, 1, 11);
683impl_saadc_input!(P1_12, 1, 12);
684impl_saadc_input!(P1_13, 1, 13);
685impl_saadc_input!(P1_14, 1, 14);
686
687#[cfg(feature = "_s")]
688impl_cracen!(CRACEN, CRACEN, CRACEN);
689
690embassy_hal_internal::interrupt_mod!(
691 SWI00,
692 SWI01,
693 SWI02,
694 SWI03,
695 SPU00,
696 MPC00,
697 AAR00_CCM00,
698 ECB00,
699 CRACEN,
700 SERIAL00,
701 RRAMC,
702 VPR00,
703 CTRLAP,
704 TIMER00,
705 SPU10,
706 TIMER10,
707 EGU10,
708 RADIO_0,
709 RADIO_1,
710 SPU20,
711 SERIAL20,
712 SERIAL21,
713 SERIAL22,
714 EGU20,
715 TIMER20,
716 TIMER21,
717 TIMER22,
718 TIMER23,
719 TIMER24,
720 PDM20,
721 PDM21,
722 PWM20,
723 PWM21,
724 PWM22,
725 SAADC,
726 NFCT,
727 TEMP,
728 GPIOTE20_0,
729 GPIOTE20_1,
730 TAMPC,
731 I2S20,
732 QDEC20,
733 QDEC21,
734 GRTC_0,
735 GRTC_1,
736 GRTC_2,
737 GRTC_3,
738 SPU30,
739 SERIAL30,
740 COMP_LPCOMP,
741 WDT30,
742 WDT31,
743 GPIOTE30_0,
744 GPIOTE30_1,
745 CLOCK_POWER,
746);
diff --git a/embassy-nrf/src/lib.rs b/embassy-nrf/src/lib.rs
index e8762b00d..4cb291626 100644
--- a/embassy-nrf/src/lib.rs
+++ b/embassy-nrf/src/lib.rs
@@ -25,6 +25,10 @@
25 feature = "nrf5340-net", 25 feature = "nrf5340-net",
26 feature = "nrf54l15-app-s", 26 feature = "nrf54l15-app-s",
27 feature = "nrf54l15-app-ns", 27 feature = "nrf54l15-app-ns",
28 feature = "nrf54l10-app-s",
29 feature = "nrf54l10-app-ns",
30 feature = "nrf54l05-app-s",
31 feature = "nrf54l05-app-ns",
28 feature = "nrf9160-s", 32 feature = "nrf9160-s",
29 feature = "nrf9160-ns", 33 feature = "nrf9160-ns",
30 feature = "nrf9120-s", 34 feature = "nrf9120-s",
@@ -49,6 +53,10 @@ compile_error!(
49 nrf5340-net, 53 nrf5340-net,
50 nrf54l15-app-s, 54 nrf54l15-app-s,
51 nrf54l15-app-ns, 55 nrf54l15-app-ns,
56 nrf54l10-app-s,
57 nrf54l10-app-ns,
58 nrf54l05-app-s,
59 nrf54l05-app-ns,
52 nrf9160-s, 60 nrf9160-s,
53 nrf9160-ns, 61 nrf9160-ns,
54 nrf9120-s, 62 nrf9120-s,
@@ -99,9 +107,9 @@ pub mod ipc;
99pub mod nfct; 107pub mod nfct;
100#[cfg(not(feature = "_nrf54l"))] 108#[cfg(not(feature = "_nrf54l"))]
101pub mod nvmc; 109pub mod nvmc;
102#[cfg(feature = "nrf54l15-app-s")] 110#[cfg(all(feature = "_nrf54l", feature = "_s"))]
103pub mod rramc; 111pub mod rramc;
104#[cfg(feature = "nrf54l15-app-s")] 112#[cfg(all(feature = "_nrf54l", feature = "_s"))]
105pub use rramc as nvmc; 113pub use rramc as nvmc;
106#[cfg(not(feature = "_nrf54l"))] // TODO 114#[cfg(not(feature = "_nrf54l"))] // TODO
107#[cfg(any( 115#[cfg(any(
@@ -192,6 +200,8 @@ pub mod wdt;
192#[cfg_attr(feature = "_nrf5340-app", path = "chips/nrf5340_app.rs")] 200#[cfg_attr(feature = "_nrf5340-app", path = "chips/nrf5340_app.rs")]
193#[cfg_attr(feature = "_nrf5340-net", path = "chips/nrf5340_net.rs")] 201#[cfg_attr(feature = "_nrf5340-net", path = "chips/nrf5340_net.rs")]
194#[cfg_attr(feature = "_nrf54l15-app", path = "chips/nrf54l15_app.rs")] 202#[cfg_attr(feature = "_nrf54l15-app", path = "chips/nrf54l15_app.rs")]
203#[cfg_attr(feature = "_nrf54l10-app", path = "chips/nrf54l10_app.rs")]
204#[cfg_attr(feature = "_nrf54l05-app", path = "chips/nrf54l05_app.rs")]
195#[cfg_attr(feature = "_nrf9160", path = "chips/nrf9160.rs")] 205#[cfg_attr(feature = "_nrf9160", path = "chips/nrf9160.rs")]
196#[cfg_attr(feature = "_nrf9120", path = "chips/nrf9120.rs")] 206#[cfg_attr(feature = "_nrf9120", path = "chips/nrf9120.rs")]
197mod chip; 207mod chip;
diff --git a/examples/rp235x/src/bin/pio_i2s.rs b/examples/rp235x/src/bin/pio_i2s.rs
index cfcb0221d..7ed952a40 100644
--- a/examples/rp235x/src/bin/pio_i2s.rs
+++ b/examples/rp235x/src/bin/pio_i2s.rs
@@ -5,7 +5,7 @@
5//! bclk : GPIO 18 5//! bclk : GPIO 18
6//! lrc : GPIO 19 6//! lrc : GPIO 19
7//! din : GPIO 20 7//! din : GPIO 20
8//! Then hold down the boot select button to trigger a rising triangle waveform. 8//! Then short GPIO 0 to GND to trigger a rising triangle waveform.
9 9
10#![no_std] 10#![no_std]
11#![no_main] 11#![no_main]
@@ -70,7 +70,7 @@ async fn main(_spawner: Spawner) {
70 // but don't await the returned future, yet 70 // but don't await the returned future, yet
71 let dma_future = i2s.write(front_buffer); 71 let dma_future = i2s.write(front_buffer);
72 72
73 // fade in audio when bootsel is pressed 73 // fade in audio when GPIO 0 pin is shorted to GND
74 let fade_target = if fade_input.is_low() { i32::MAX } else { 0 }; 74 let fade_target = if fade_input.is_low() { i32::MAX } else { 0 };
75 75
76 // fill back buffer with fresh audio samples before awaiting the dma future 76 // fill back buffer with fresh audio samples before awaiting the dma future
generated by cgit (git 2.34.1) at 2026-04-05 22:09:28 +0000