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authorxoviat <[email protected]>2021-03-22 13:06:19 -0500
committerGitHub <[email protected]>2021-03-22 13:06:19 -0500
commit10a77fce146285b15c84ffae257a36da979f69bb (patch)
tree49d3a0a31cea66cca35a58e7d8b4de4612b17d49
parent712204edb81b40fda8833cd4401d91c41bfb28d7 (diff)
parentb79e9c29274fb7ede9122178a757101ac4e7283e (diff)
Merge pull request #106 from xoviat/fix-exti-new
stm32: fix exti impl. to require dp.SYSCFG.constrain()
-rw-r--r--embassy-stm32/src/exti.rs40
-rw-r--r--embassy-stm32f4-examples/src/bin/exti.rs3
2 files changed, 33 insertions, 10 deletions
diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs
index a00079450..8d70defe6 100644
--- a/embassy-stm32/src/exti.rs
+++ b/embassy-stm32/src/exti.rs
@@ -5,6 +5,30 @@ use cortex_m;
5 5
6use crate::hal::gpio; 6use crate::hal::gpio;
7 7
8#[cfg(any(
9 feature = "stm32f401",
10 feature = "stm32f405",
11 feature = "stm32f407",
12 feature = "stm32f410",
13 feature = "stm32f411",
14 feature = "stm32f412",
15 feature = "stm32f413",
16 feature = "stm32f415",
17 feature = "stm32f417",
18 feature = "stm32f423",
19 feature = "stm32f427",
20 feature = "stm32f429",
21 feature = "stm32f437",
22 feature = "stm32f439",
23 feature = "stm32f446",
24 feature = "stm32f469",
25 feature = "stm32f479",
26))]
27use crate::hal::syscfg::SysCfg;
28
29#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
30use crate::hal::syscfg::SYSCFG as SysCfg;
31
8use embassy::traits::gpio::{ 32use embassy::traits::gpio::{
9 WaitForAnyEdge, WaitForFallingEdge, WaitForHigh, WaitForLow, WaitForRisingEdge, 33 WaitForAnyEdge, WaitForFallingEdge, WaitForHigh, WaitForLow, WaitForRisingEdge,
10}; 34};
@@ -20,9 +44,9 @@ pub struct ExtiPin<T: Instance> {
20} 44}
21 45
22impl<T: Instance> ExtiPin<T> { 46impl<T: Instance> ExtiPin<T> {
23 pub fn new(mut pin: T, interrupt: T::Interrupt) -> Self { 47 pub fn new(mut pin: T, interrupt: T::Interrupt, syscfg: &mut SysCfg) -> Self {
24 cortex_m::interrupt::free(|_| { 48 cortex_m::interrupt::free(|_| {
25 pin.make_source(); 49 pin.make_source(syscfg);
26 }); 50 });
27 51
28 Self { pin, interrupt } 52 Self { pin, interrupt }
@@ -189,7 +213,7 @@ pub trait WithInterrupt: private::Sealed {
189} 213}
190 214
191pub trait Instance: WithInterrupt { 215pub trait Instance: WithInterrupt {
192 fn make_source(&mut self); 216 fn make_source(&mut self, syscfg: &mut SysCfg);
193 fn clear_pending_bit(&mut self); 217 fn clear_pending_bit(&mut self);
194 fn trigger_edge(&mut self, edge: EdgeOption); 218 fn trigger_edge(&mut self, edge: EdgeOption);
195} 219}
@@ -224,11 +248,9 @@ macro_rules! exti {
224 feature = "stm32f479", 248 feature = "stm32f479",
225 ))] 249 ))]
226 impl<T> Instance for gpio::$set::$pin<gpio::Input<T>> { 250 impl<T> Instance for gpio::$set::$pin<gpio::Input<T>> {
227 fn make_source(&mut self) { 251 fn make_source(&mut self, syscfg: &mut SysCfg) {
228 use crate::hal::{gpio::Edge, gpio::ExtiPin, syscfg::SysCfg}; 252 use crate::hal::gpio::ExtiPin;
229 use crate::pac::EXTI; 253 self.make_interrupt_source(syscfg);
230 let mut syscfg: SysCfg = unsafe { mem::transmute(()) };
231 self.make_interrupt_source(&mut syscfg);
232 } 254 }
233 255
234 fn clear_pending_bit(&mut self) { 256 fn clear_pending_bit(&mut self) {
@@ -253,7 +275,7 @@ macro_rules! exti {
253 275
254 #[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] 276 #[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
255 impl<T> Instance for gpio::$set::$pin<T> { 277 impl<T> Instance for gpio::$set::$pin<T> {
256 fn make_source(&mut self) {} 278 fn make_source(&mut self, syscfg: &mut SysCfg) {}
257 279
258 fn clear_pending_bit(&mut self) { 280 fn clear_pending_bit(&mut self) {
259 use crate::hal::{ 281 use crate::hal::{
diff --git a/embassy-stm32f4-examples/src/bin/exti.rs b/embassy-stm32f4-examples/src/bin/exti.rs
index 2201189eb..9b2535b1c 100644
--- a/embassy-stm32f4-examples/src/bin/exti.rs
+++ b/embassy-stm32f4-examples/src/bin/exti.rs
@@ -24,8 +24,9 @@ async fn run(dp: stm32::Peripherals, _cp: cortex_m::Peripherals) {
24 let gpioa = dp.GPIOA.split(); 24 let gpioa = dp.GPIOA.split();
25 25
26 let button = gpioa.pa0.into_pull_up_input(); 26 let button = gpioa.pa0.into_pull_up_input();
27 let mut syscfg = dp.SYSCFG.constrain();
27 28
28 let pin = ExtiPin::new(button, interrupt::take!(EXTI0)); 29 let pin = ExtiPin::new(button, interrupt::take!(EXTI0), &mut syscfg);
29 pin_mut!(pin); 30 pin_mut!(pin);
30 31
31 info!("Starting loop"); 32 info!("Starting loop");