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authorxoviat <[email protected]>2023-08-27 09:12:04 -0500
committerxoviat <[email protected]>2023-08-27 09:12:04 -0500
commit10ea06802761a7aa6feb0241ebdbbe9bbaf37a7f (patch)
tree4d2eaa97312466803d14b2ccdcfd61879ba0a9c9
parent4caa8497fcac5099d9e885683542aca6b4f0911e (diff)
stm32/bd: allow dead code
-rw-r--r--embassy-stm32/src/rcc/bd.rs8
1 files changed, 8 insertions, 0 deletions
diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs
index e09737690..fd1b8d451 100644
--- a/embassy-stm32/src/rcc/bd.rs
+++ b/embassy-stm32/src/rcc/bd.rs
@@ -1,5 +1,6 @@
1#[derive(Copy, Clone, Debug, PartialEq)] 1#[derive(Copy, Clone, Debug, PartialEq)]
2#[repr(u8)] 2#[repr(u8)]
3#[allow(dead_code)]
3pub enum RtcClockSource { 4pub enum RtcClockSource {
4 /// 00: No clock 5 /// 00: No clock
5 NoClock = 0b00, 6 NoClock = 0b00,
@@ -11,12 +12,14 @@ pub enum RtcClockSource {
11 HSE = 0b11, 12 HSE = 0b11,
12} 13}
13 14
15#[allow(dead_code)]
14pub struct BackupDomain {} 16pub struct BackupDomain {}
15 17
16impl BackupDomain { 18impl BackupDomain {
17 #[cfg(any( 19 #[cfg(any(
18 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb 20 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
19 ))] 21 ))]
22 #[allow(dead_code)]
20 fn unlock_registers() { 23 fn unlock_registers() {
21 #[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))] 24 #[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))]
22 let cr = crate::pac::PWR.cr(); 25 let cr = crate::pac::PWR.cr();
@@ -34,6 +37,7 @@ impl BackupDomain {
34 } 37 }
35 38
36 #[cfg(any(rtc_v3, rtc_v3u5))] 39 #[cfg(any(rtc_v3, rtc_v3u5))]
40 #[allow(dead_code)]
37 fn unlock_registers() { 41 fn unlock_registers() {
38 // Unlock the backup domain 42 // Unlock the backup domain
39 #[cfg(not(any(rtc_v3u5, rcc_wl5, rcc_wle)))] 43 #[cfg(not(any(rtc_v3u5, rcc_wl5, rcc_wle)))]
@@ -57,6 +61,7 @@ impl BackupDomain {
57 #[cfg(any( 61 #[cfg(any(
58 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb 62 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
59 ))] 63 ))]
64 #[allow(dead_code)]
60 pub fn set_rtc_clock_source(clock_source: RtcClockSource) { 65 pub fn set_rtc_clock_source(clock_source: RtcClockSource) {
61 #[cfg(not(rtc_v2wb))] 66 #[cfg(not(rtc_v2wb))]
62 use stm32_metapac::rcc::vals::Rtcsel; 67 use stm32_metapac::rcc::vals::Rtcsel;
@@ -78,6 +83,7 @@ impl BackupDomain {
78 } 83 }
79 84
80 #[cfg(any(rtc_v3, rtc_v3u5))] 85 #[cfg(any(rtc_v3, rtc_v3u5))]
86 #[allow(dead_code)]
81 pub fn set_rtc_clock_source(clock_source: RtcClockSource) { 87 pub fn set_rtc_clock_source(clock_source: RtcClockSource) {
82 let clock_source = clock_source as u8; 88 let clock_source = clock_source as u8;
83 #[cfg(not(any(rcc_wl5, rcc_wle)))] 89 #[cfg(not(any(rcc_wl5, rcc_wle)))]
@@ -94,6 +100,7 @@ impl BackupDomain {
94 #[cfg(any( 100 #[cfg(any(
95 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb 101 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
96 ))] 102 ))]
103 #[allow(dead_code)]
97 pub fn enable_rtc() { 104 pub fn enable_rtc() {
98 #[cfg(not(any(rtc_v2l0, rtc_v2l1)))] 105 #[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
99 let reg = crate::pac::RCC.bdcr().read(); 106 let reg = crate::pac::RCC.bdcr().read();
@@ -137,6 +144,7 @@ impl BackupDomain {
137 } 144 }
138 145
139 #[cfg(any(rtc_v3, rtc_v3u5))] 146 #[cfg(any(rtc_v3, rtc_v3u5))]
147 #[allow(dead_code)]
140 pub fn enable_rtc() { 148 pub fn enable_rtc() {
141 let bdcr = crate::pac::RCC.bdcr(); 149 let bdcr = crate::pac::RCC.bdcr();
142 150