diff options
| author | pennae <[email protected]> | 2023-05-01 15:22:39 +0200 |
|---|---|---|
| committer | pennae <[email protected]> | 2023-05-01 15:22:39 +0200 |
| commit | 19588a9e6fb4474a2b3bdb64a97db9798027c700 (patch) | |
| tree | 4cd3733ea809d931d086823fd3a09621ded8628d | |
| parent | 1d2f6667df1bb0299c4e9b4e1660ee729ce2b463 (diff) | |
rp/uart: rename state to buffered_state
we'll add a dma state soon as well.
| -rw-r--r-- | embassy-rp/src/uart/buffered.rs | 24 | ||||
| -rw-r--r-- | embassy-rp/src/uart/mod.rs | 4 |
2 files changed, 14 insertions, 14 deletions
diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs index b87345ee9..f9fae4c50 100644 --- a/embassy-rp/src/uart/buffered.rs +++ b/embassy-rp/src/uart/buffered.rs | |||
| @@ -47,7 +47,7 @@ pub(crate) fn init_buffers<'d, T: Instance + 'd>( | |||
| 47 | tx_buffer: &'d mut [u8], | 47 | tx_buffer: &'d mut [u8], |
| 48 | rx_buffer: &'d mut [u8], | 48 | rx_buffer: &'d mut [u8], |
| 49 | ) { | 49 | ) { |
| 50 | let state = T::state(); | 50 | let state = T::buffered_state(); |
| 51 | let len = tx_buffer.len(); | 51 | let len = tx_buffer.len(); |
| 52 | unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) }; | 52 | unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) }; |
| 53 | let len = rx_buffer.len(); | 53 | let len = rx_buffer.len(); |
| @@ -189,7 +189,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> { | |||
| 189 | return Poll::Ready(Ok(0)); | 189 | return Poll::Ready(Ok(0)); |
| 190 | } | 190 | } |
| 191 | 191 | ||
| 192 | let state = T::state(); | 192 | let state = T::buffered_state(); |
| 193 | let mut rx_reader = unsafe { state.rx_buf.reader() }; | 193 | let mut rx_reader = unsafe { state.rx_buf.reader() }; |
| 194 | let n = rx_reader.pop(|data| { | 194 | let n = rx_reader.pop(|data| { |
| 195 | let n = data.len().min(buf.len()); | 195 | let n = data.len().min(buf.len()); |
| @@ -221,7 +221,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> { | |||
| 221 | } | 221 | } |
| 222 | 222 | ||
| 223 | loop { | 223 | loop { |
| 224 | let state = T::state(); | 224 | let state = T::buffered_state(); |
| 225 | let mut rx_reader = unsafe { state.rx_buf.reader() }; | 225 | let mut rx_reader = unsafe { state.rx_buf.reader() }; |
| 226 | let n = rx_reader.pop(|data| { | 226 | let n = rx_reader.pop(|data| { |
| 227 | let n = data.len().min(buf.len()); | 227 | let n = data.len().min(buf.len()); |
| @@ -247,7 +247,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> { | |||
| 247 | 247 | ||
| 248 | fn fill_buf<'a>() -> impl Future<Output = Result<&'a [u8], Error>> { | 248 | fn fill_buf<'a>() -> impl Future<Output = Result<&'a [u8], Error>> { |
| 249 | poll_fn(move |cx| { | 249 | poll_fn(move |cx| { |
| 250 | let state = T::state(); | 250 | let state = T::buffered_state(); |
| 251 | let mut rx_reader = unsafe { state.rx_buf.reader() }; | 251 | let mut rx_reader = unsafe { state.rx_buf.reader() }; |
| 252 | let (p, n) = rx_reader.pop_buf(); | 252 | let (p, n) = rx_reader.pop_buf(); |
| 253 | if n == 0 { | 253 | if n == 0 { |
| @@ -261,7 +261,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> { | |||
| 261 | } | 261 | } |
| 262 | 262 | ||
| 263 | fn consume(amt: usize) { | 263 | fn consume(amt: usize) { |
| 264 | let state = T::state(); | 264 | let state = T::buffered_state(); |
| 265 | let mut rx_reader = unsafe { state.rx_buf.reader() }; | 265 | let mut rx_reader = unsafe { state.rx_buf.reader() }; |
| 266 | rx_reader.pop_done(amt); | 266 | rx_reader.pop_done(amt); |
| 267 | 267 | ||
| @@ -315,7 +315,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> { | |||
| 315 | return Poll::Ready(Ok(0)); | 315 | return Poll::Ready(Ok(0)); |
| 316 | } | 316 | } |
| 317 | 317 | ||
| 318 | let state = T::state(); | 318 | let state = T::buffered_state(); |
| 319 | let mut tx_writer = unsafe { state.tx_buf.writer() }; | 319 | let mut tx_writer = unsafe { state.tx_buf.writer() }; |
| 320 | let n = tx_writer.push(|data| { | 320 | let n = tx_writer.push(|data| { |
| 321 | let n = data.len().min(buf.len()); | 321 | let n = data.len().min(buf.len()); |
| @@ -338,7 +338,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> { | |||
| 338 | 338 | ||
| 339 | fn flush() -> impl Future<Output = Result<(), Error>> { | 339 | fn flush() -> impl Future<Output = Result<(), Error>> { |
| 340 | poll_fn(move |cx| { | 340 | poll_fn(move |cx| { |
| 341 | let state = T::state(); | 341 | let state = T::buffered_state(); |
| 342 | if !state.tx_buf.is_empty() { | 342 | if !state.tx_buf.is_empty() { |
| 343 | state.tx_waker.register(cx.waker()); | 343 | state.tx_waker.register(cx.waker()); |
| 344 | return Poll::Pending; | 344 | return Poll::Pending; |
| @@ -354,7 +354,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> { | |||
| 354 | } | 354 | } |
| 355 | 355 | ||
| 356 | loop { | 356 | loop { |
| 357 | let state = T::state(); | 357 | let state = T::buffered_state(); |
| 358 | let mut tx_writer = unsafe { state.tx_buf.writer() }; | 358 | let mut tx_writer = unsafe { state.tx_buf.writer() }; |
| 359 | let n = tx_writer.push(|data| { | 359 | let n = tx_writer.push(|data| { |
| 360 | let n = data.len().min(buf.len()); | 360 | let n = data.len().min(buf.len()); |
| @@ -375,7 +375,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> { | |||
| 375 | 375 | ||
| 376 | pub fn blocking_flush(&mut self) -> Result<(), Error> { | 376 | pub fn blocking_flush(&mut self) -> Result<(), Error> { |
| 377 | loop { | 377 | loop { |
| 378 | let state = T::state(); | 378 | let state = T::buffered_state(); |
| 379 | if state.tx_buf.is_empty() { | 379 | if state.tx_buf.is_empty() { |
| 380 | return Ok(()); | 380 | return Ok(()); |
| 381 | } | 381 | } |
| @@ -422,7 +422,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> { | |||
| 422 | 422 | ||
| 423 | impl<'d, T: Instance> Drop for BufferedUartRx<'d, T> { | 423 | impl<'d, T: Instance> Drop for BufferedUartRx<'d, T> { |
| 424 | fn drop(&mut self) { | 424 | fn drop(&mut self) { |
| 425 | let state = T::state(); | 425 | let state = T::buffered_state(); |
| 426 | unsafe { | 426 | unsafe { |
| 427 | state.rx_buf.deinit(); | 427 | state.rx_buf.deinit(); |
| 428 | 428 | ||
| @@ -437,7 +437,7 @@ impl<'d, T: Instance> Drop for BufferedUartRx<'d, T> { | |||
| 437 | 437 | ||
| 438 | impl<'d, T: Instance> Drop for BufferedUartTx<'d, T> { | 438 | impl<'d, T: Instance> Drop for BufferedUartTx<'d, T> { |
| 439 | fn drop(&mut self) { | 439 | fn drop(&mut self) { |
| 440 | let state = T::state(); | 440 | let state = T::buffered_state(); |
| 441 | unsafe { | 441 | unsafe { |
| 442 | state.tx_buf.deinit(); | 442 | state.tx_buf.deinit(); |
| 443 | 443 | ||
| @@ -452,7 +452,7 @@ impl<'d, T: Instance> Drop for BufferedUartTx<'d, T> { | |||
| 452 | 452 | ||
| 453 | pub(crate) unsafe fn on_interrupt<T: Instance>(_: *mut ()) { | 453 | pub(crate) unsafe fn on_interrupt<T: Instance>(_: *mut ()) { |
| 454 | let r = T::regs(); | 454 | let r = T::regs(); |
| 455 | let s = T::state(); | 455 | let s = T::buffered_state(); |
| 456 | 456 | ||
| 457 | unsafe { | 457 | unsafe { |
| 458 | // Clear TX and error interrupt flags | 458 | // Clear TX and error interrupt flags |
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index dd4a1cce2..0b323978d 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs | |||
| @@ -763,7 +763,7 @@ mod sealed { | |||
| 763 | fn regs() -> pac::uart::Uart; | 763 | fn regs() -> pac::uart::Uart; |
| 764 | 764 | ||
| 765 | #[cfg(feature = "nightly")] | 765 | #[cfg(feature = "nightly")] |
| 766 | fn state() -> &'static buffered::State; | 766 | fn buffered_state() -> &'static buffered::State; |
| 767 | } | 767 | } |
| 768 | pub trait TxPin<T: Instance> {} | 768 | pub trait TxPin<T: Instance> {} |
| 769 | pub trait RxPin<T: Instance> {} | 769 | pub trait RxPin<T: Instance> {} |
| @@ -801,7 +801,7 @@ macro_rules! impl_instance { | |||
| 801 | } | 801 | } |
| 802 | 802 | ||
| 803 | #[cfg(feature = "nightly")] | 803 | #[cfg(feature = "nightly")] |
| 804 | fn state() -> &'static buffered::State { | 804 | fn buffered_state() -> &'static buffered::State { |
| 805 | static STATE: buffered::State = buffered::State::new(); | 805 | static STATE: buffered::State = buffered::State::new(); |
| 806 | &STATE | 806 | &STATE |
| 807 | } | 807 | } |
