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authorAlexandros Liarokapis <[email protected]>2024-05-27 20:42:29 +0300
committerAlexandros Liarokapis <[email protected]>2024-05-27 20:47:24 +0300
commit1d05015a1c6b79d9cf7f93d16718508f3f80fc7e (patch)
treefd74044efa180c4dc50f0ff5dfb2275f933a765a
parent76fbec74da30c5cd04b441aa49414a286170a491 (diff)
broaden tsize read support to other spi versions
-rw-r--r--embassy-stm32/src/spi/mod.rs24
1 files changed, 7 insertions, 17 deletions
diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs
index 0b12bc9b6..a3578dfde 100644
--- a/embassy-stm32/src/spi/mod.rs
+++ b/embassy-stm32/src/spi/mod.rs
@@ -508,7 +508,7 @@ impl<'d> Spi<'d, Async> {
508 peri: impl Peripheral<P = T> + 'd, 508 peri: impl Peripheral<P = T> + 'd,
509 sck: impl Peripheral<P = impl SckPin<T>> + 'd, 509 sck: impl Peripheral<P = impl SckPin<T>> + 'd,
510 miso: impl Peripheral<P = impl MisoPin<T>> + 'd, 510 miso: impl Peripheral<P = impl MisoPin<T>> + 'd,
511 #[cfg(not(spi_v3))] tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd, 511 #[cfg(any(spi_v1, spi_f1))] tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
512 rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd, 512 rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
513 config: Config, 513 config: Config,
514 ) -> Self { 514 ) -> Self {
@@ -517,9 +517,9 @@ impl<'d> Spi<'d, Async> {
517 new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), 517 new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()),
518 None, 518 None,
519 new_pin!(miso, AFType::Input, Speed::VeryHigh), 519 new_pin!(miso, AFType::Input, Speed::VeryHigh),
520 #[cfg(not(spi_v3))] 520 #[cfg(any(spi_v1, spi_f1))]
521 new_dma!(tx_dma), 521 new_dma!(tx_dma),
522 #[cfg(spi_v3)] 522 #[cfg(any(spi_v2, spi_v3, spi_v4, spi_v5))]
523 None, 523 None,
524 new_dma!(rx_dma), 524 new_dma!(rx_dma),
525 config, 525 config,
@@ -626,19 +626,8 @@ impl<'d> Spi<'d, Async> {
626 } 626 }
627 627
628 /// SPI read, using DMA. 628 /// SPI read, using DMA.
629 #[cfg(any(spi_v2, spi_v3, spi_v4, spi_v5))]
629 pub async fn read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error> { 630 pub async fn read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error> {
630 #[cfg(not(spi_v3))]
631 {
632 self.transmission_read(data).await
633 }
634 #[cfg(spi_v3)]
635 {
636 self.tsize_read(data).await
637 }
638 }
639
640 #[cfg(spi_v3)]
641 async fn tsize_read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error> {
642 if data.is_empty() { 631 if data.is_empty() {
643 return Ok(()); 632 return Ok(());
644 } 633 }
@@ -733,8 +722,9 @@ impl<'d> Spi<'d, Async> {
733 Ok(()) 722 Ok(())
734 } 723 }
735 724
736 #[cfg(not(spi_v3))] 725 /// SPI read, using DMA.
737 async fn transmission_read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error> { 726 #[cfg(any(spi_v1, spi_f1))]
727 pub async fn read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error> {
738 if data.is_empty() { 728 if data.is_empty() {
739 return Ok(()); 729 return Ok(());
740 } 730 }