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authorThales Fragoso <[email protected]>2021-05-14 23:34:16 -0300
committerThales Fragoso <[email protected]>2021-05-14 23:47:58 -0300
commit1e5f25aa413c8af0a4cb123e9387f57ab1910561 (patch)
tree849baee1705ba7c6d92f8cbca165d924b949a3a8
parenta5d473be0e209531b6e7b90d9de0cf73f15d38c1 (diff)
Move parameters to a config struct
-rw-r--r--embassy-stm32/src/sdmmc_v2.rs47
1 files changed, 27 insertions, 20 deletions
diff --git a/embassy-stm32/src/sdmmc_v2.rs b/embassy-stm32/src/sdmmc_v2.rs
index 215a2a6a2..6a8539ca3 100644
--- a/embassy-stm32/src/sdmmc_v2.rs
+++ b/embassy-stm32/src/sdmmc_v2.rs
@@ -135,23 +135,28 @@ fn clk_div(ker_ck: Hertz, sdmmc_ck: u32) -> Result<(u16, Hertz), Error> {
135 } 135 }
136} 136}
137 137
138#[non_exhaustive]
139pub struct Config {
140 /// AHB clock
141 pub hclk: Hertz,
142 /// SDMMC kernel clock
143 pub kernel_clk: Hertz,
144 /// The timeout to be set for data transfers, in card bus clock periods
145 pub data_transfer_timeout: u32,
146}
147
138/// Sdmmc device 148/// Sdmmc device
139pub struct Sdmmc<'d, T: Instance, P: Pins<T>> { 149pub struct Sdmmc<'d, T: Instance, P: Pins<T>> {
140 sdmmc: PhantomData<&'d mut T>, 150 sdmmc: PhantomData<&'d mut T>,
141 pins: P, 151 pins: P,
142 irq: T::Interrupt, 152 irq: T::Interrupt,
143 /// SDMMC kernel clock 153 config: Config,
144 ker_ck: Hertz,
145 /// AHB clock
146 hclk: Hertz,
147 /// Current clock to card 154 /// Current clock to card
148 clock: Hertz, 155 clock: Hertz,
149 /// Current signalling scheme to card 156 /// Current signalling scheme to card
150 signalling: Signalling, 157 signalling: Signalling,
151 /// Card 158 /// Card
152 card: Option<Card>, 159 card: Option<Card>,
153 /// The timeout to be set for data transfers, in card bus clock periods
154 data_transfer_timeout: u32,
155} 160}
156 161
157impl<'d, T: Instance, P: Pins<T>> Sdmmc<'d, T, P> { 162impl<'d, T: Instance, P: Pins<T>> Sdmmc<'d, T, P> {
@@ -163,15 +168,13 @@ impl<'d, T: Instance, P: Pins<T>> Sdmmc<'d, T, P> {
163 _peripheral: impl Unborrow<Target = T> + 'd, 168 _peripheral: impl Unborrow<Target = T> + 'd,
164 pins: impl Unborrow<Target = P> + 'd, 169 pins: impl Unborrow<Target = P> + 'd,
165 irq: impl Unborrow<Target = T::Interrupt>, 170 irq: impl Unborrow<Target = T::Interrupt>,
166 hclk: Hertz, 171 config: Config,
167 kernel_clk: Hertz,
168 data_transfer_timeout: u32,
169 ) -> Self { 172 ) -> Self {
170 unborrow!(irq, pins); 173 unborrow!(irq, pins);
171 pins.configure(); 174 pins.configure();
172 175
173 let inner = T::inner(); 176 let inner = T::inner();
174 let clock = inner.new_inner(kernel_clk); 177 let clock = inner.new_inner(config.kernel_clk);
175 178
176 irq.set_handler(Self::on_interrupt); 179 irq.set_handler(Self::on_interrupt);
177 irq.unpend(); 180 irq.unpend();
@@ -181,12 +184,10 @@ impl<'d, T: Instance, P: Pins<T>> Sdmmc<'d, T, P> {
181 sdmmc: PhantomData, 184 sdmmc: PhantomData,
182 pins, 185 pins,
183 irq, 186 irq,
184 ker_ck: kernel_clk, 187 config,
185 hclk,
186 clock, 188 clock,
187 signalling: Default::default(), 189 signalling: Default::default(),
188 card: None, 190 card: None,
189 data_transfer_timeout,
190 } 191 }
191 } 192 }
192 193
@@ -201,11 +202,11 @@ impl<'d, T: Instance, P: Pins<T>> Sdmmc<'d, T, P> {
201 P::BUSWIDTH, 202 P::BUSWIDTH,
202 &mut self.card, 203 &mut self.card,
203 &mut self.signalling, 204 &mut self.signalling,
204 self.hclk, 205 self.config.hclk,
205 self.ker_ck, 206 self.config.kernel_clk,
206 &mut self.clock, 207 &mut self.clock,
207 T::state(), 208 T::state(),
208 self.data_transfer_timeout, 209 self.config.data_transfer_timeout,
209 ) 210 )
210 .await 211 .await
211 } 212 }
@@ -228,7 +229,7 @@ impl<'d, T: Instance, P: Pins<T>> Sdmmc<'d, T, P> {
228 buf, 229 buf,
229 card_capacity, 230 card_capacity,
230 state, 231 state,
231 self.data_transfer_timeout, 232 self.config.data_transfer_timeout,
232 ) 233 )
233 .await 234 .await
234 } 235 }
@@ -241,7 +242,13 @@ impl<'d, T: Instance, P: Pins<T>> Sdmmc<'d, T, P> {
241 // NOTE(unsafe) DataBlock uses align 4 242 // NOTE(unsafe) DataBlock uses align 4
242 let buf = unsafe { &*((&buffer.0) as *const [u8; 512] as *const [u32; 128]) }; 243 let buf = unsafe { &*((&buffer.0) as *const [u8; 512] as *const [u32; 128]) };
243 inner 244 inner
244 .write_block(block_idx, buf, card, state, self.data_transfer_timeout) 245 .write_block(
246 block_idx,
247 buf,
248 card,
249 state,
250 self.config.data_transfer_timeout,
251 )
245 .await 252 .await
246 } 253 }
247 254
@@ -1507,7 +1514,7 @@ mod sdmmc_rs {
1507 buf, 1514 buf,
1508 card_capacity, 1515 card_capacity,
1509 state, 1516 state,
1510 self.data_transfer_timeout, 1517 self.config.data_transfer_timeout,
1511 ) 1518 )
1512 .await?; 1519 .await?;
1513 address += 1; 1520 address += 1;
@@ -1533,7 +1540,7 @@ mod sdmmc_rs {
1533 // NOTE(unsafe) DataBlock uses align 4 1540 // NOTE(unsafe) DataBlock uses align 4
1534 let buf = unsafe { &*(block as *const [u8; 512] as *const [u32; 128]) }; 1541 let buf = unsafe { &*(block as *const [u8; 512] as *const [u32; 128]) };
1535 inner 1542 inner
1536 .write_block(address, buf, card, state, self.data_transfer_timeout) 1543 .write_block(address, buf, card, state, self.config.data_transfer_timeout)
1537 .await?; 1544 .await?;
1538 address += 1; 1545 address += 1;
1539 } 1546 }