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authorBrian Schwind <[email protected]>2025-09-29 21:11:09 +0900
committerBrian Schwind <[email protected]>2025-09-29 21:19:30 +0900
commit1fe05cfedbcfb35dba3bee3ed6b7f4f293e9bb78 (patch)
tree13953b45361ad6b68d36fe6b88ee29b56f97bfee
parent5fc197529e4260196f99e8d6341a37d7e623c9f6 (diff)
Make the Qei struct own the channel 1 and 2 pins
-rw-r--r--embassy-stm32/src/timer/qei.rs25
-rw-r--r--tests/stm32/src/bin/afio.rs4
2 files changed, 20 insertions, 9 deletions
diff --git a/embassy-stm32/src/timer/qei.rs b/embassy-stm32/src/timer/qei.rs
index 82b5968b0..d63a2b45d 100644
--- a/embassy-stm32/src/timer/qei.rs
+++ b/embassy-stm32/src/timer/qei.rs
@@ -55,20 +55,27 @@ impl SealedQeiChannel for Ch2 {}
55/// Quadrature decoder driver. 55/// Quadrature decoder driver.
56pub struct Qei<'d, T: GeneralInstance4Channel> { 56pub struct Qei<'d, T: GeneralInstance4Channel> {
57 inner: Timer<'d, T>, 57 inner: Timer<'d, T>,
58 _ch1: Peri<'d, AnyPin>,
59 _ch2: Peri<'d, AnyPin>,
58} 60}
59 61
60impl<'d, T: GeneralInstance4Channel> Qei<'d, T> { 62impl<'d, T: GeneralInstance4Channel> Qei<'d, T> {
61 /// Create a new quadrature decoder driver. 63 /// Create a new quadrature decoder driver.
62 #[allow(unused)] 64 #[allow(unused)]
63 pub fn new<#[cfg(afio)] A>( 65 pub fn new<CH1: QeiChannel, CH2: QeiChannel, #[cfg(afio)] A>(
64 tim: Peri<'d, T>, 66 tim: Peri<'d, T>,
65 ch1: if_afio!(QeiPin<'d, T, Ch1, A>), 67 ch1: Peri<'d, if_afio!(impl TimerPin<T, CH1, A>)>,
66 ch2: if_afio!(QeiPin<'d, T, Ch2, A>), 68 ch2: Peri<'d, if_afio!(impl TimerPin<T, CH2, A>)>,
67 ) -> Self { 69 ) -> Self {
68 Self::new_inner(tim) 70 // Configure the pins to be used for the QEI peripheral.
69 } 71 critical_section::with(|_| {
72 ch1.set_low();
73 set_as_af!(ch1, AfType::input(Pull::None));
74
75 ch2.set_low();
76 set_as_af!(ch2, AfType::input(Pull::None));
77 });
70 78
71 fn new_inner(tim: Peri<'d, T>) -> Self {
72 let inner = Timer::new(tim); 79 let inner = Timer::new(tim);
73 let r = inner.regs_gp16(); 80 let r = inner.regs_gp16();
74 81
@@ -94,7 +101,11 @@ impl<'d, T: GeneralInstance4Channel> Qei<'d, T> {
94 r.arr().modify(|w| w.set_arr(u16::MAX)); 101 r.arr().modify(|w| w.set_arr(u16::MAX));
95 r.cr1().modify(|w| w.set_cen(true)); 102 r.cr1().modify(|w| w.set_cen(true));
96 103
97 Self { inner } 104 Self {
105 inner,
106 _ch1: ch1.into(),
107 _ch2: ch2.into(),
108 }
98 } 109 }
99 110
100 /// Get direction. 111 /// Get direction.
diff --git a/tests/stm32/src/bin/afio.rs b/tests/stm32/src/bin/afio.rs
index cc44dc59c..356c39443 100644
--- a/tests/stm32/src/bin/afio.rs
+++ b/tests/stm32/src/bin/afio.rs
@@ -260,8 +260,8 @@ async fn main(_spawner: Spawner) {
260 reset_afio_registers(); 260 reset_afio_registers();
261 Qei::new::<AfioRemap<1>>( 261 Qei::new::<AfioRemap<1>>(
262 p.TIM1.reborrow(), 262 p.TIM1.reborrow(),
263 QeiPin::new(p.PA8.reborrow()), 263 p.PA8.reborrow(),
264 QeiPin::new(p.PA9.reborrow()), 264 p.PA9.reborrow(),
265 ); 265 );
266 defmt::assert_eq!(AFIO.mapr().read().tim1_remap(), 1); 266 defmt::assert_eq!(AFIO.mapr().read().tim1_remap(), 1);
267 } 267 }