Merge pull request #1953 from embassy-rs/stm32l-tests

tests/stm32: add L0, L1, L4, L4+, L5

4 files changed, 102 insertions, 2 deletions

diff --git a/ci.sh b/ci.sh
index 37d3e7783..db5f4d800 100755
--- a/ci.sh
+++ b/ci.sh
@@ -173,6 +173,11 @@ cargo batch  \
     --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55rg --out-dir out/tests/stm32wb55rg \
     --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h563zi --out-dir out/tests/stm32h563zi \
     --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u585ai --out-dir out/tests/stm32u585ai \
+    --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l073rz --out-dir out/tests/stm32l073rz \
+    --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l152re --out-dir out/tests/stm32l152re \
+    --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l4a6zg --out-dir out/tests/stm32l4a6zg \
+    --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l4r5zi --out-dir out/tests/stm32l4r5zi \
+    --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze --out-dir out/tests/stm32l552ze \
     --- build --release --manifest-path tests/rp/Cargo.toml --target thumbv6m-none-eabi --out-dir out/tests/rpi-pico \
     --- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv7em-none-eabi --out-dir out/tests/nrf52840-dk \
     --- build --release --manifest-path tests/riscv32/Cargo.toml --target riscv32imac-unknown-none-elf \
diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml
index f78cb5098..bfe5bc823 100644
--- a/tests/stm32/Cargo.toml
+++ b/tests/stm32/Cargo.toml
@@ -15,6 +15,11 @@ stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "not-gpdma", "dac-adc-pin"] # Nu
 stm32wb55rg = ["embassy-stm32/stm32wb55rg", "not-gpdma", "ble", "mac" ]     # Nucleo
 stm32h563zi = ["embassy-stm32/stm32h563zi"]     # Nucleo
 stm32u585ai = ["embassy-stm32/stm32u585ai"]     # IoT board
+stm32l073rz = ["embassy-stm32/stm32l073rz", "not-gpdma"]     # Nucleo
+stm32l152re = ["embassy-stm32/stm32l152re", "not-gpdma"]     # Nucleo
+stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "not-gpdma"]     # Nucleo
+stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "not-gpdma"]     # Nucleo
+stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma"]     # Nucleo
 
 sdmmc = []
 stop = ["embassy-stm32/low-power"]
diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs
index 2e71954d7..9aabf8541 100644
--- a/tests/stm32/build.rs
+++ b/tests/stm32/build.rs
@@ -12,7 +12,8 @@ fn main() -> Result<(), Box<dyn Error>> {
     if cfg!(any(
         feature = "stm32f103c8",
         feature = "stm32c031c6",
-        feature = "stm32wb55rg"
+        feature = "stm32wb55rg",
+        feature = "stm32l073rz",
     )) {
         println!("cargo:rustc-link-arg-bins=-Tlink.x");
         println!("cargo:rerun-if-changed=link.x");
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index 055eade6b..9c0b8c39e 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -24,6 +24,16 @@ teleprobe_meta::target!(b"iot-stm32u585ai");
 teleprobe_meta::target!(b"nucleo-stm32h563zi");
 #[cfg(feature = "stm32c031c6")]
 teleprobe_meta::target!(b"nucleo-stm32c031c6");
+#[cfg(feature = "stm32l073rz")]
+teleprobe_meta::target!(b"nucleo-stm32l073rz");
+#[cfg(feature = "stm32l152re")]
+teleprobe_meta::target!(b"nucleo-stm32l152re");
+#[cfg(feature = "stm32l4a6zg")]
+teleprobe_meta::target!(b"nucleo-stm32l4a6zg");
+#[cfg(feature = "stm32l4r5zi")]
+teleprobe_meta::target!(b"nucleo-stm32l4r5zi");
+#[cfg(feature = "stm32l552ze")]
+teleprobe_meta::target!(b"nucleo-stm32l552ze");
 
 macro_rules! define_peris {
     ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => {
@@ -109,6 +119,36 @@ define_peris!(
     SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
     @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
 );
+#[cfg(feature = "stm32l4a6zg")]
+define_peris!(
+    UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
+);
+#[cfg(feature = "stm32l4r5zi")]
+define_peris!(
+    UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
+);
+#[cfg(feature = "stm32l073rz")]
+define_peris!(
+    UART = USART4, UART_TX = PA0, UART_RX = PA1, UART_TX_DMA = DMA1_CH3, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART4_5 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART4>;},
+);
+#[cfg(feature = "stm32l152re")]
+define_peris!(
+    UART = USART3, UART_TX = PB10, UART_RX = PB11, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
+);
+#[cfg(feature = "stm32l552ze")]
+define_peris!(
+    UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
+);
 
 pub fn config() -> Config {
     #[allow(unused_mut)]
@@ -144,9 +184,58 @@ pub fn config() -> Config {
         config.rcc.adc_clock_source = AdcClockSource::PLL2_P;
     }
 
+    #[cfg(any(feature = "stm32l4a6zg", feature = "stm32l4r5zi"))]
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::PLL(
+            // 72Mhz clock (16 / 1 * 18 / 4)
+            PLLSource::HSI16,
+            PLLClkDiv::Div4,
+            PLLSrcDiv::Div1,
+            PLLMul::Mul18,
+            Some(PLLClkDiv::Div6), // 48Mhz (16 / 1 * 18 / 6)
+        );
+    }
+
+    #[cfg(any(feature = "stm32l552ze"))]
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::PLL(
+            // 110Mhz clock (16 / 4 * 55 / 2)
+            PLLSource::HSI16,
+            PLLClkDiv::Div2,
+            PLLSrcDiv::Div4,
+            PLLMul::Mul55,
+            None,
+        );
+    }
+
     #[cfg(feature = "stm32u585ai")]
     {
-        config.rcc.mux = embassy_stm32::rcc::ClockSrc::MSI(embassy_stm32::rcc::MSIRange::Range48mhz);
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::MSI(MSIRange::Range48mhz);
+    }
+
+    #[cfg(feature = "stm32l073rz")]
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::PLL(
+            // 32Mhz clock (16 * 4 / 2)
+            PLLSource::HSI16,
+            PLLMul::Mul4,
+            PLLDiv::Div2,
+        );
+    }
+
+    #[cfg(any(feature = "stm32l152re"))]
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::PLL(
+            // 32Mhz clock (16 * 4 / 2)
+            PLLSource::HSI,
+            PLLMul::Mul4,
+            PLLDiv::Div2,
+        );
     }
 
     config