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authorUlf Lilleengen <[email protected]>2021-06-08 11:04:44 +0200
committerUlf Lilleengen <[email protected]>2021-06-08 17:20:29 +0200
commit212bda09406923b22cf5b5ed70cd8dbf7f9a7f3f (patch)
treebd2e188361b6137740b0709049def35d27b9f3e8
parenta57482fddde69777ffc3c964d2d2d92d15d45340 (diff)
Enable clock for SPI v1 and v3
-rw-r--r--embassy-stm32/src/spi/v1.rs17
-rw-r--r--embassy-stm32/src/spi/v3.rs17
2 files changed, 20 insertions, 14 deletions
diff --git a/embassy-stm32/src/spi/v1.rs b/embassy-stm32/src/spi/v1.rs
index e3057a3b5..a4e4c0ba1 100644
--- a/embassy-stm32/src/spi/v1.rs
+++ b/embassy-stm32/src/spi/v1.rs
@@ -2,6 +2,7 @@
2 2
3use crate::gpio::{sealed::Pin, AnyPin}; 3use crate::gpio::{sealed::Pin, AnyPin};
4use crate::pac::spi; 4use crate::pac::spi;
5use crate::rcc::RccPeripheral;
5use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize}; 6use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize};
6use crate::time::Hertz; 7use crate::time::Hertz;
7use core::marker::PhantomData; 8use core::marker::PhantomData;
@@ -19,7 +20,7 @@ impl WordSize {
19 } 20 }
20} 21}
21 22
22pub struct Spi<'d, T: Instance> { 23pub struct Spi<'d, T: Instance + RccPeripheral> {
23 sck: AnyPin, 24 sck: AnyPin,
24 mosi: AnyPin, 25 mosi: AnyPin,
25 miso: AnyPin, 26 miso: AnyPin,
@@ -27,7 +28,7 @@ pub struct Spi<'d, T: Instance> {
27 phantom: PhantomData<&'d mut T>, 28 phantom: PhantomData<&'d mut T>,
28} 29}
29 30
30impl<'d, T: Instance> Spi<'d, T> { 31impl<'d, T: Instance + RccPeripheral> Spi<'d, T> {
31 pub fn new<F>( 32 pub fn new<F>(
32 pclk: Hertz, 33 pclk: Hertz,
33 _peri: impl Unborrow<Target = T> + 'd, 34 _peri: impl Unborrow<Target = T> + 'd,
@@ -61,6 +62,8 @@ impl<'d, T: Instance> Spi<'d, T> {
61 let br = Self::compute_baud_rate(pclk, freq.into()); 62 let br = Self::compute_baud_rate(pclk, freq.into());
62 63
63 unsafe { 64 unsafe {
65 T::enable();
66 T::reset();
64 T::regs().cr1().modify(|w| { 67 T::regs().cr1().modify(|w| {
65 w.set_cpha( 68 w.set_cpha(
66 match config.mode.phase == Phase::CaptureOnSecondTransition { 69 match config.mode.phase == Phase::CaptureOnSecondTransition {
@@ -128,7 +131,7 @@ impl<'d, T: Instance> Spi<'d, T> {
128 } 131 }
129} 132}
130 133
131impl<'d, T: Instance> Drop for Spi<'d, T> { 134impl<'d, T: Instance + RccPeripheral> Drop for Spi<'d, T> {
132 fn drop(&mut self) { 135 fn drop(&mut self) {
133 unsafe { 136 unsafe {
134 self.sck.set_as_analog(); 137 self.sck.set_as_analog();
@@ -138,7 +141,7 @@ impl<'d, T: Instance> Drop for Spi<'d, T> {
138 } 141 }
139} 142}
140 143
141impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> { 144impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> {
142 type Error = Error; 145 type Error = Error;
143 146
144 fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { 147 fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
@@ -174,7 +177,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> {
174 } 177 }
175} 178}
176 179
177impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> { 180impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
178 type Error = Error; 181 type Error = Error;
179 182
180 fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { 183 fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
@@ -215,7 +218,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
215 } 218 }
216} 219}
217 220
218impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> { 221impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> {
219 type Error = Error; 222 type Error = Error;
220 223
221 fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { 224 fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> {
@@ -251,7 +254,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> {
251 } 254 }
252} 255}
253 256
254impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u16> for Spi<'d, T> { 257impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Transfer<u16> for Spi<'d, T> {
255 type Error = Error; 258 type Error = Error;
256 259
257 fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { 260 fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> {
diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs
index da4686b9c..3b768751d 100644
--- a/embassy-stm32/src/spi/v3.rs
+++ b/embassy-stm32/src/spi/v3.rs
@@ -4,6 +4,7 @@ use crate::gpio::{AnyPin, Pin};
4use crate::pac::gpio::vals::{Afr, Moder}; 4use crate::pac::gpio::vals::{Afr, Moder};
5use crate::pac::gpio::Gpio; 5use crate::pac::gpio::Gpio;
6use crate::pac::spi; 6use crate::pac::spi;
7use crate::rcc::RccPeripheral;
7use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize}; 8use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize};
8use crate::time::Hertz; 9use crate::time::Hertz;
9use core::marker::PhantomData; 10use core::marker::PhantomData;
@@ -28,14 +29,14 @@ impl WordSize {
28 } 29 }
29} 30}
30 31
31pub struct Spi<'d, T: Instance> { 32pub struct Spi<'d, T: Instance + RccPeripheral> {
32 sck: AnyPin, 33 sck: AnyPin,
33 mosi: AnyPin, 34 mosi: AnyPin,
34 miso: AnyPin, 35 miso: AnyPin,
35 phantom: PhantomData<&'d mut T>, 36 phantom: PhantomData<&'d mut T>,
36} 37}
37 38
38impl<'d, T: Instance> Spi<'d, T> { 39impl<'d, T: Instance + RccPeripheral> Spi<'d, T> {
39 pub fn new<F>( 40 pub fn new<F>(
40 pclk: Hertz, 41 pclk: Hertz,
41 _peri: impl Unborrow<Target = T> + 'd, 42 _peri: impl Unborrow<Target = T> + 'd,
@@ -64,6 +65,8 @@ impl<'d, T: Instance> Spi<'d, T> {
64 65
65 let br = Self::compute_baud_rate(pclk, freq.into()); 66 let br = Self::compute_baud_rate(pclk, freq.into());
66 unsafe { 67 unsafe {
68 T::enable();
69 T::reset();
67 T::regs().ifcr().write(|w| w.0 = 0xffff_ffff); 70 T::regs().ifcr().write(|w| w.0 = 0xffff_ffff);
68 T::regs().cfg2().modify(|w| { 71 T::regs().cfg2().modify(|w| {
69 //w.set_ssoe(true); 72 //w.set_ssoe(true);
@@ -161,7 +164,7 @@ impl<'d, T: Instance> Spi<'d, T> {
161 } 164 }
162} 165}
163 166
164impl<'d, T: Instance> Drop for Spi<'d, T> { 167impl<'d, T: Instance + RccPeripheral> Drop for Spi<'d, T> {
165 fn drop(&mut self) { 168 fn drop(&mut self) {
166 unsafe { 169 unsafe {
167 Self::unconfigure_pin(self.sck.block(), self.sck.pin() as _); 170 Self::unconfigure_pin(self.sck.block(), self.sck.pin() as _);
@@ -171,7 +174,7 @@ impl<'d, T: Instance> Drop for Spi<'d, T> {
171 } 174 }
172} 175}
173 176
174impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> { 177impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> {
175 type Error = Error; 178 type Error = Error;
176 179
177 fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { 180 fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
@@ -208,7 +211,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> {
208 } 211 }
209} 212}
210 213
211impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> { 214impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
212 type Error = Error; 215 type Error = Error;
213 216
214 fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { 217 fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
@@ -265,7 +268,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
265 } 268 }
266} 269}
267 270
268impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> { 271impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> {
269 type Error = Error; 272 type Error = Error;
270 273
271 fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { 274 fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> {
@@ -302,7 +305,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> {
302 } 305 }
303} 306}
304 307
305impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u16> for Spi<'d, T> { 308impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Transfer<u16> for Spi<'d, T> {
306 type Error = Error; 309 type Error = Error;
307 310
308 fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { 311 fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> {