Pass rx pin to right init arg

1 files changed, 23 insertions, 7 deletions

diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs
index f7a4c5a60..f9e30a78b 100644
--- a/embassy-rp/src/uart/mod.rs
+++ b/embassy-rp/src/uart/mod.rs
@@ -5,8 +5,8 @@ use embassy_hal_common::{into_ref, PeripheralRef};
 use crate::dma::{AnyChannel, Channel};
 use crate::gpio::sealed::Pin;
 use crate::gpio::AnyPin;
-use crate::{pac, peripherals, Peripheral};
 use crate::pac::io::vals::{Inover, Outover};
+use crate::{pac, peripherals, Peripheral};
 
 #[cfg(feature = "nightly")]
 mod buffered;
@@ -180,7 +180,7 @@ impl<'d, T: Instance> UartTx<'d, T, Async> {
 }
 
 impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> {
-    /// Create a new DMA-enabled UART which can only send data
+    /// Create a new DMA-enabled UART which can only recieve data
     pub fn new(
         _uart: impl Peripheral<P = T> + 'd,
         rx: impl Peripheral<P = impl RxPin<T>> + 'd,
@@ -188,7 +188,7 @@ impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> {
         config: Config,
     ) -> Self {
         into_ref!(rx, rx_dma);
-        Uart::<T, M>::init(Some(rx.map_into()), None, None, None, config);
+        Uart::<T, M>::init(None, Some(rx.map_into()), None, None, config);
         Self::new_inner(Some(rx_dma.map_into()))
     }
 
@@ -396,28 +396,44 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
             if let Some(pin) = &tx {
                 pin.io().ctrl().write(|w| {
                     w.set_funcsel(2);
-                    w.set_outover(if config.invert_tx { Outover::INVERT } else { Outover::NORMAL });
+                    w.set_outover(if config.invert_tx {
+                        Outover::INVERT
+                    } else {
+                        Outover::NORMAL
+                    });
                 });
                 pin.pad_ctrl().write(|w| w.set_ie(true));
             }
             if let Some(pin) = &rx {
                 pin.io().ctrl().write(|w| {
                     w.set_funcsel(2);
-                    w.set_inover(if config.invert_rx { Inover::INVERT } else { Inover::NORMAL });
+                    w.set_inover(if config.invert_rx {
+                        Inover::INVERT
+                    } else {
+                        Inover::NORMAL
+                    });
                 });
                 pin.pad_ctrl().write(|w| w.set_ie(true));
             }
             if let Some(pin) = &cts {
                 pin.io().ctrl().write(|w| {
                     w.set_funcsel(2);
-                    w.set_inover(if config.invert_cts { Inover::INVERT } else { Inover::NORMAL });
+                    w.set_inover(if config.invert_cts {
+                        Inover::INVERT
+                    } else {
+                        Inover::NORMAL
+                    });
                 });
                 pin.pad_ctrl().write(|w| w.set_ie(true));
             }
             if let Some(pin) = &rts {
                 pin.io().ctrl().write(|w| {
                     w.set_funcsel(2);
-                    w.set_outover(if config.invert_rts { Outover::INVERT } else { Outover::NORMAL });
+                    w.set_outover(if config.invert_rts {
+                        Outover::INVERT
+                    } else {
+                        Outover::NORMAL
+                    });
                 });
                 pin.pad_ctrl().write(|w| w.set_ie(true));
             }