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authorBadr Bouslikhin <[email protected]>2023-12-02 14:47:36 +0100
committerBadr Bouslikhin <[email protected]>2023-12-02 14:47:36 +0100
commit22c39fd6970ceb335949e6cef15331c993105a14 (patch)
treef2e4b193d9429e90adb37052e7c701848aebb728
parent87c0f1525dee9c2762872426076ffa82dc45900b (diff)
stm32/rcc: refactor h7 rm0455,rm0468 and rm0468 power management
-rw-r--r--embassy-stm32/src/rcc/h.rs87
1 files changed, 29 insertions, 58 deletions
diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs
index 55543472c..644647d91 100644
--- a/embassy-stm32/src/rcc/h.rs
+++ b/embassy-stm32/src/rcc/h.rs
@@ -120,6 +120,7 @@ impl From<TimerPrescaler> for Timpre {
120/// Power supply configuration 120/// Power supply configuration
121/// See RM0433 Rev 4 7.4 121/// See RM0433 Rev 4 7.4
122#[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] 122#[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))]
123#[derive(PartialEq)]
123pub enum SupplyConfig { 124pub enum SupplyConfig {
124 /// Default power supply configuration. 125 /// Default power supply configuration.
125 /// V CORE Power Domains are supplied from the LDO according to VOS. 126 /// V CORE Power Domains are supplied from the LDO according to VOS.
@@ -143,31 +144,43 @@ pub enum SupplyConfig {
143 /// LDO power mode (Main, LP, Off) will follow system low-power modes. 144 /// LDO power mode (Main, LP, Off) will follow system low-power modes.
144 /// SMPS step-down converter enabled according to SDLEVEL, and supplies the LDO. 145 /// SMPS step-down converter enabled according to SDLEVEL, and supplies the LDO.
145 /// SMPS step-down converter power mode (MR, LP, Off) will follow system low-power modes. 146 /// SMPS step-down converter power mode (MR, LP, Off) will follow system low-power modes.
146 SMPSLDO, 147 SMPSLDO(SMPSSupplyVoltage),
147 148
148 /// Power supply configuration from SMPS supplying external circuits and potentially the LDO. 149 /// Power supply configuration from SMPS supplying external circuits and potentially the LDO.
149 /// V CORE Power Domains are supplied from voltage regulator according to VOS 150 /// V CORE Power Domains are supplied from voltage regulator according to VOS
150 /// LDO power mode (Main, LP, Off) will follow system low-power modes. 151 /// LDO power mode (Main, LP, Off) will follow system low-power modes.
151 /// SMPS step-down converter enabled according to SDLEVEL used to supply external circuits and may supply the LDO. 152 /// SMPS step-down converter enabled according to SDLEVEL used to supply external circuits and may supply the LDO.
152 /// SMPS step-down converter forced ON in MR mode. 153 /// SMPS step-down converter forced ON in MR mode.
153 SMPSExternalLDO, 154 SMPSExternalLDO(SMPSSupplyVoltage),
154 155
155 /// Power supply configuration from SMPS supplying external circuits and bypassing the LDO. 156 /// Power supply configuration from SMPS supplying external circuits and bypassing the LDO.
156 /// V CORE supplied from external source 157 /// V CORE supplied from external source
157 /// SMPS step-down converter enabled according to SDLEVEL used to supply external circuits and may supply the external source for V CORE . 158 /// SMPS step-down converter enabled according to SDLEVEL used to supply external circuits and may supply the external source for V CORE .
158 /// SMPS step-down converter forced ON in MR mode. 159 /// SMPS step-down converter forced ON in MR mode.
159 SMPSExternalLDOBypass, 160 SMPSExternalLDOBypass(SMPSSupplyVoltage),
160} 161}
161 162
162/// SMPS step-down converter voltage output level. 163/// SMPS step-down converter voltage output level.
163/// This is only used in certain power supply configurations: 164/// This is only used in certain power supply configurations:
164/// SMPSLDO, SMPSExternalLDO, SMPSExternalLDOBypass. 165/// SMPSLDO, SMPSExternalLDO, SMPSExternalLDOBypass.
165#[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] 166#[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))]
167#[derive(PartialEq)]
166pub enum SMPSSupplyVoltage { 168pub enum SMPSSupplyVoltage {
167 V1_8, 169 V1_8,
168 V2_5, 170 V2_5,
169} 171}
170 172
173#[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))]
174impl SMPSSupplyVoltage {
175 /// Convert SMPSSupplyVoltage to u8 representation.
176 fn to_u8(&self) -> u8 {
177 match self {
178 SMPSSupplyVoltage::V1_8 => 0b01,
179 SMPSSupplyVoltage::V2_5 => 0b10,
180 }
181 }
182}
183
171/// Configuration of the core clocks 184/// Configuration of the core clocks
172#[non_exhaustive] 185#[non_exhaustive]
173pub struct Config { 186pub struct Config {
@@ -198,7 +211,6 @@ pub struct Config {
198 211
199 #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] 212 #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))]
200 pub supply_config: SupplyConfig, 213 pub supply_config: SupplyConfig,
201 pub smps_supply_voltage: Option<SMPSSupplyVoltage>,
202} 214}
203 215
204impl Default for Config { 216impl Default for Config {
@@ -235,7 +247,6 @@ impl Default for Config {
235 247
236 #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] 248 #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))]
237 supply_config: SupplyConfig::Default, 249 supply_config: SupplyConfig::Default,
238 smps_supply_voltage: None,
239 } 250 }
240 } 251 }
241} 252}
@@ -280,61 +291,21 @@ pub(crate) unsafe fn init(config: Config) {
280 w.set_bypass(false); 291 w.set_bypass(false);
281 }); 292 });
282 } 293 }
283 SupplyConfig::SMPSLDO => { 294 SupplyConfig::SMPSLDO(ref smps_supply_voltage)
295 | SupplyConfig::SMPSExternalLDO(ref smps_supply_voltage)
296 | SupplyConfig::SMPSExternalLDOBypass(ref smps_supply_voltage) => {
284 PWR.cr3().modify(|w| { 297 PWR.cr3().modify(|w| {
285 match config.smps_supply_voltage { 298 w.set_sdlevel(smps_supply_voltage.to_u8());
286 Some(SMPSSupplyVoltage::V1_8) => { 299 w.set_sdexthp(matches!(
287 PWR.cr3().modify(|w| w.set_sdlevel(0b01)); 300 config.supply_config,
288 } 301 SupplyConfig::SMPSExternalLDO(_) | SupplyConfig::SMPSExternalLDOBypass(_)
289 Some(SMPSSupplyVoltage::V2_5) => { 302 ));
290 PWR.cr3().modify(|w| w.set_sdlevel(0b10));
291 }
292 None => {
293 panic!("Supply configuration SMPSLDO requires a supply voltage to be set.");
294 }
295 }
296 w.set_sdexthp(false);
297 w.set_sden(true); 303 w.set_sden(true);
298 w.set_ldoen(true); 304 w.set_ldoen(matches!(
299 w.set_bypass(false); 305 config.supply_config,
300 }); 306 SupplyConfig::SMPSLDO(_) | SupplyConfig::SMPSExternalLDO(_)
301 } 307 ));
302 SupplyConfig::SMPSExternalLDO => { 308 w.set_bypass(matches!(config.supply_config, SupplyConfig::SMPSExternalLDOBypass(_)));
303 PWR.cr3().modify(|w| {
304 match config.smps_supply_voltage {
305 Some(SMPSSupplyVoltage::V1_8) => {
306 PWR.cr3().modify(|w| w.set_sdlevel(0b01));
307 }
308 Some(SMPSSupplyVoltage::V2_5) => {
309 PWR.cr3().modify(|w| w.set_sdlevel(0b10));
310 }
311 None => {
312 panic!("Supply configuration SMPSExternalLDO requires a supply voltage to be set.");
313 }
314 }
315 w.set_sdexthp(true);
316 w.set_sden(true);
317 w.set_ldoen(true);
318 w.set_bypass(false);
319 });
320 }
321 SupplyConfig::SMPSExternalLDOBypass => {
322 PWR.cr3().modify(|w| {
323 match config.smps_supply_voltage {
324 Some(SMPSSupplyVoltage::V1_8) => {
325 PWR.cr3().modify(|w| w.set_sdlevel(0b01));
326 }
327 Some(SMPSSupplyVoltage::V2_5) => {
328 PWR.cr3().modify(|w| w.set_sdlevel(0b10));
329 }
330 None => {
331 panic!("Supply configuration SMPSExternalLDOBypass requires a supply voltage to be set.");
332 }
333 }
334 w.set_sdexthp(true);
335 w.set_sden(true);
336 w.set_ldoen(false);
337 w.set_bypass(true);
338 }); 309 });
339 } 310 }
340 } 311 }