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authorGuy Marino <[email protected]>2025-02-26 14:14:16 -0800
committerGuy Marino <[email protected]>2025-02-26 14:14:16 -0800
commit27709df94ad0662a262aa2465b41554ce0d88d87 (patch)
tree5e9681149b52e78d67bd963e2fbfe7abc8cf646c
parent00ef474b94d99a1fd933e79bd66628cd3a16e3c4 (diff)
Implement `core::error::Error` for STM32 Serial Devices
-rw-r--r--embassy-stm32/src/i2c/mod.rs18
-rw-r--r--embassy-stm32/src/spi/mod.rs15
-rw-r--r--embassy-stm32/src/usart/mod.rs16
3 files changed, 49 insertions, 0 deletions
diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
index 1fc91f1ef..3a9954663 100644
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@@ -44,6 +44,24 @@ pub enum Error {
44 ZeroLengthTransfer, 44 ZeroLengthTransfer,
45} 45}
46 46
47impl core::fmt::Display for Error {
48 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
49 let message = match self {
50 Self::Bus => "Bus Error",
51 Self::Arbitration => "Arbitration Lost",
52 Self::Nack => "ACK Not Received",
53 Self::Timeout => "Request Timed Out",
54 Self::Crc => "CRC Mismatch",
55 Self::Overrun => "Buffer Overrun",
56 Self::ZeroLengthTransfer => "Zero-Length Transfers are not allowed",
57 };
58
59 write!(f, "{}", message)
60 }
61}
62
63impl core::error::Error for Error {}
64
47/// I2C config 65/// I2C config
48#[non_exhaustive] 66#[non_exhaustive]
49#[derive(Copy, Clone)] 67#[derive(Copy, Clone)]
diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs
index 45893d24b..44dda6a9e 100644
--- a/embassy-stm32/src/spi/mod.rs
+++ b/embassy-stm32/src/spi/mod.rs
@@ -31,6 +31,21 @@ pub enum Error {
31 Overrun, 31 Overrun,
32} 32}
33 33
34impl core::fmt::Display for Error {
35 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
36 let message = match self {
37 Self::Framing => "Invalid Framing",
38 Self::Crc => "Hardware CRC Check Failed",
39 Self::ModeFault => "Mode Fault",
40 Self::Overrun => "Buffer Overrun",
41 };
42
43 write!(f, "{}", message)
44 }
45}
46
47impl core::error::Error for Error {}
48
34/// SPI bit order 49/// SPI bit order
35#[derive(Copy, Clone)] 50#[derive(Copy, Clone)]
36pub enum BitOrder { 51pub enum BitOrder {
diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs
index 48cc4f6d6..de7b3c8df 100644
--- a/embassy-stm32/src/usart/mod.rs
+++ b/embassy-stm32/src/usart/mod.rs
@@ -293,6 +293,22 @@ pub enum Error {
293 BufferTooLong, 293 BufferTooLong,
294} 294}
295 295
296impl core::fmt::Display for Error {
297 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
298 let message = match self {
299 Self::Framing => "Framing Error",
300 Self::Noise => "Noise Error",
301 Self::Overrun => "RX Buffer Overrun",
302 Self::Parity => "Parity Check Error",
303 Self::BufferTooLong => "Buffer too large for DMA",
304 };
305
306 write!(f, "{}", message)
307 }
308}
309
310impl core::error::Error for Error {}
311
296enum ReadCompletionEvent { 312enum ReadCompletionEvent {
297 // DMA Read transfer completed first 313 // DMA Read transfer completed first
298 DmaCompleted, 314 DmaCompleted,