diff options
| author | Anton Lazarev <[email protected]> | 2025-03-24 10:49:47 -0700 |
|---|---|---|
| committer | Anton Lazarev <[email protected]> | 2025-03-31 12:47:41 -0700 |
| commit | 280d21a6b415a1c856d08d338afd829b41e9b0b8 (patch) | |
| tree | d29940d64fabdc1b9ac387bd9d65857168839460 | |
| parent | a44abaf7e4562fa5393087fd845bf0d02141325b (diff) | |
update sdio-host to 0.6
| -rw-r--r-- | embassy-stm32/Cargo.toml | 2 | ||||
| -rw-r--r-- | embassy-stm32/src/sdmmc/mod.rs | 20 |
2 files changed, 11 insertions, 11 deletions
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 8204a0fea..8468436d8 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml | |||
| @@ -70,7 +70,7 @@ cortex-m-rt = ">=0.6.15,<0.8" | |||
| 70 | cortex-m = "0.7.6" | 70 | cortex-m = "0.7.6" |
| 71 | futures-util = { version = "0.3.30", default-features = false } | 71 | futures-util = { version = "0.3.30", default-features = false } |
| 72 | rand_core = "0.6.3" | 72 | rand_core = "0.6.3" |
| 73 | sdio-host = "0.5.0" | 73 | sdio-host = "0.6.0" |
| 74 | critical-section = "1.1" | 74 | critical-section = "1.1" |
| 75 | #stm32-metapac = { version = "16" } | 75 | #stm32-metapac = { version = "16" } |
| 76 | stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-4a964af03b298de30ff9f84fcfa890bcab4ce609" } | 76 | stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-4a964af03b298de30ff9f84fcfa890bcab4ce609" } |
diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs index 8f3c45f50..3cfae7ee1 100644 --- a/embassy-stm32/src/sdmmc/mod.rs +++ b/embassy-stm32/src/sdmmc/mod.rs | |||
| @@ -10,7 +10,7 @@ use core::task::Poll; | |||
| 10 | use embassy_hal_internal::drop::OnDrop; | 10 | use embassy_hal_internal::drop::OnDrop; |
| 11 | use embassy_hal_internal::{Peri, PeripheralType}; | 11 | use embassy_hal_internal::{Peri, PeripheralType}; |
| 12 | use embassy_sync::waitqueue::AtomicWaker; | 12 | use embassy_sync::waitqueue::AtomicWaker; |
| 13 | use sdio_host::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID, CSD, OCR, SCR}; | 13 | use sdio_host::sd::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID, CSD, OCR, SCR, SD}; |
| 14 | 14 | ||
| 15 | #[cfg(sdmmc_v1)] | 15 | #[cfg(sdmmc_v1)] |
| 16 | use crate::dma::ChannelAndRequest; | 16 | use crate::dma::ChannelAndRequest; |
| @@ -162,13 +162,13 @@ pub struct Card { | |||
| 162 | /// The type of this card | 162 | /// The type of this card |
| 163 | pub card_type: CardCapacity, | 163 | pub card_type: CardCapacity, |
| 164 | /// Operation Conditions Register | 164 | /// Operation Conditions Register |
| 165 | pub ocr: OCR, | 165 | pub ocr: OCR<SD>, |
| 166 | /// Relative Card Address | 166 | /// Relative Card Address |
| 167 | pub rca: u32, | 167 | pub rca: u32, |
| 168 | /// Card ID | 168 | /// Card ID |
| 169 | pub cid: CID, | 169 | pub cid: CID<SD>, |
| 170 | /// Card Specific Data | 170 | /// Card Specific Data |
| 171 | pub csd: CSD, | 171 | pub csd: CSD<SD>, |
| 172 | /// SD CARD Configuration Register | 172 | /// SD CARD Configuration Register |
| 173 | pub scr: SCR, | 173 | pub scr: SCR, |
| 174 | /// SD Status | 174 | /// SD Status |
| @@ -765,7 +765,7 @@ impl<'d, T: Instance> Sdmmc<'d, T> { | |||
| 765 | } | 765 | } |
| 766 | 766 | ||
| 767 | /// Query the card status (CMD13, returns R1) | 767 | /// Query the card status (CMD13, returns R1) |
| 768 | fn read_status(&self, card: &Card) -> Result<CardStatus, Error> { | 768 | fn read_status(&self, card: &Card) -> Result<CardStatus<SD>, Error> { |
| 769 | let regs = T::regs(); | 769 | let regs = T::regs(); |
| 770 | let rca = card.rca; | 770 | let rca = card.rca; |
| 771 | 771 | ||
| @@ -1089,7 +1089,7 @@ impl<'d, T: Instance> Sdmmc<'d, T> { | |||
| 1089 | Err(Error::Crc) => (), | 1089 | Err(Error::Crc) => (), |
| 1090 | Err(err) => return Err(err), | 1090 | Err(err) => return Err(err), |
| 1091 | } | 1091 | } |
| 1092 | let ocr: OCR = regs.respr(0).read().cardstatus().into(); | 1092 | let ocr: OCR<SD> = regs.respr(0).read().cardstatus().into(); |
| 1093 | if !ocr.is_busy() { | 1093 | if !ocr.is_busy() { |
| 1094 | // Power up done | 1094 | // Power up done |
| 1095 | break ocr; | 1095 | break ocr; |
| @@ -1098,9 +1098,9 @@ impl<'d, T: Instance> Sdmmc<'d, T> { | |||
| 1098 | 1098 | ||
| 1099 | if ocr.high_capacity() { | 1099 | if ocr.high_capacity() { |
| 1100 | // Card is SDHC or SDXC or SDUC | 1100 | // Card is SDHC or SDXC or SDUC |
| 1101 | card.card_type = CardCapacity::SDHC; | 1101 | card.card_type = CardCapacity::HighCapacity; |
| 1102 | } else { | 1102 | } else { |
| 1103 | card.card_type = CardCapacity::SDSC; | 1103 | card.card_type = CardCapacity::StandardCapacity; |
| 1104 | } | 1104 | } |
| 1105 | card.ocr = ocr; | 1105 | card.ocr = ocr; |
| 1106 | 1106 | ||
| @@ -1193,7 +1193,7 @@ impl<'d, T: Instance> Sdmmc<'d, T> { | |||
| 1193 | // Always read 1 block of 512 bytes | 1193 | // Always read 1 block of 512 bytes |
| 1194 | // SDSC cards are byte addressed hence the blockaddress is in multiples of 512 bytes | 1194 | // SDSC cards are byte addressed hence the blockaddress is in multiples of 512 bytes |
| 1195 | let address = match card_capacity { | 1195 | let address = match card_capacity { |
| 1196 | CardCapacity::SDSC => block_idx * 512, | 1196 | CardCapacity::StandardCapacity => block_idx * 512, |
| 1197 | _ => block_idx, | 1197 | _ => block_idx, |
| 1198 | }; | 1198 | }; |
| 1199 | Self::cmd(Cmd::set_block_length(512), false)?; // CMD16 | 1199 | Self::cmd(Cmd::set_block_length(512), false)?; // CMD16 |
| @@ -1252,7 +1252,7 @@ impl<'d, T: Instance> Sdmmc<'d, T> { | |||
| 1252 | // Always read 1 block of 512 bytes | 1252 | // Always read 1 block of 512 bytes |
| 1253 | // SDSC cards are byte addressed hence the blockaddress is in multiples of 512 bytes | 1253 | // SDSC cards are byte addressed hence the blockaddress is in multiples of 512 bytes |
| 1254 | let address = match card.card_type { | 1254 | let address = match card.card_type { |
| 1255 | CardCapacity::SDSC => block_idx * 512, | 1255 | CardCapacity::StandardCapacity => block_idx * 512, |
| 1256 | _ => block_idx, | 1256 | _ => block_idx, |
| 1257 | }; | 1257 | }; |
| 1258 | Self::cmd(Cmd::set_block_length(512), false)?; // CMD16 | 1258 | Self::cmd(Cmd::set_block_length(512), false)?; // CMD16 |
