[nRF] Add delay in uart anomaly fix

2 files changed, 9 insertions, 0 deletions

diff --git a/embassy-nrf/CHANGELOG.md b/embassy-nrf/CHANGELOG.md
index 94a5f4e4a..361e5ce57 100644
--- a/embassy-nrf/CHANGELOG.md
+++ b/embassy-nrf/CHANGELOG.md
@@ -20,6 +20,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - changed: updated to nrf-pac with nrf52/nrf53/nrf91 register layout more similar to nrf54
 - added: support for nrf54l peripherals: uart, gpiote, twim, twis, spim, spis, dppi, pwm, saadc
 - bugfix: Do not write to UICR from non-secure code on nrf53
+- bugfix: Add delay to uart init anomaly fix
 
 ## 0.8.0 - 2025-09-30
 
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index bf3b73f58..049830aed 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -976,6 +976,14 @@ pub(crate) fn apply_workaround_for_enable_anomaly(r: pac::uarte::Uarte) {
                 break;
             } else {
                 // Need to sleep for 1us here
+
+                // Get the worst case clock speed
+                #[cfg(feature = "_nrf9160")]
+                const CLOCK_SPEED: u32 = 64_000_000;
+                #[cfg(feature = "_nrf5340")]
+                const CLOCK_SPEED: u32 = 128_000_000;
+
+                cortex_m::asm::delay(CLOCK_SPEED / 1_000_000);
             }
         }