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authorTimo Kröger <[email protected]>2024-03-12 08:47:08 +0100
committerTimo Kröger <[email protected]>2024-03-12 08:49:27 +0100
commit30cdc6c9c53837e91f92d24e9861b525f54bc65b (patch)
tree6b4cb30f6e39efa1c445fdd09248cde3ef9a3fa1
parenteeb033caf06cbb3a1bc2d6804524097c61c6c793 (diff)
[UCPD] Disable dead-battery resistor for all families
Using the code from PR #2683, thank you @ExplodingWaffle Removes the dead-battery as selectable option because its unclear if it can be re-enabled. Also there is no use case for it because the same resistor can be configured with the sink option.
-rw-r--r--embassy-stm32/src/lib.rs41
-rw-r--r--embassy-stm32/src/ucpd.rs58
2 files changed, 47 insertions, 52 deletions
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs
index 361dc6f53..b38b5c29d 100644
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@@ -283,9 +283,8 @@ pub fn init(config: Config) -> Peripherals {
283 } 283 }
284 284
285 unsafe { 285 unsafe {
286 // TODO: refactor into mod ucpd
287 #[cfg(ucpd)] 286 #[cfg(ucpd)]
288 ucpd_init( 287 ucpd::init(
289 cs, 288 cs,
290 #[cfg(peri_ucpd1)] 289 #[cfg(peri_ucpd1)]
291 config.enable_ucpd1_dead_battery, 290 config.enable_ucpd1_dead_battery,
@@ -334,41 +333,3 @@ pub fn init(config: Config) -> Peripherals {
334 p 333 p
335 }) 334 })
336} 335}
337
338#[cfg(ucpd)]
339/// Safety: must only be called when all UCPDs are disabled (e.g. at startup)
340unsafe fn ucpd_init(
341 _cs: critical_section::CriticalSection,
342 #[cfg(peri_ucpd1)] ucpd1_db_enable: bool,
343 #[cfg(peri_ucpd2)] ucpd2_db_enable: bool,
344) {
345 #[cfg(stm32g0x1)]
346 {
347 // according to RM0444 (STM32G0x1) section 8.1.1:
348 // when UCPD is disabled setting the strobe will disable dead battery
349 // (which is enabled after reset) but if UCPD is enabled, setting the
350 // strobe will apply the CC pin configuration from the control register
351 // (which is why we need to be careful about when we call this)
352 crate::pac::SYSCFG.cfgr1().modify(|w| {
353 w.set_ucpd1_strobe(ucpd1_db_enable);
354 w.set_ucpd2_strobe(ucpd2_db_enable);
355 });
356 }
357
358 #[cfg(any(stm32g4, stm32l5))]
359 {
360 crate::pac::PWR.cr3().modify(|w| {
361 #[cfg(stm32g4)]
362 w.set_ucpd1_dbdis(!ucpd1_db_enable);
363 #[cfg(stm32l5)]
364 w.set_ucpd_dbdis(!ucpd1_db_enable);
365 })
366 }
367
368 #[cfg(any(stm32h5, stm32u5))]
369 {
370 crate::pac::PWR.ucpdr().modify(|w| {
371 w.set_ucpd_dbdis(!ucpd1_db_enable);
372 })
373 }
374}
diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs
index 4b8124554..51cfe4a24 100644
--- a/embassy-stm32/src/ucpd.rs
+++ b/embassy-stm32/src/ucpd.rs
@@ -28,6 +28,42 @@ use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode};
28pub use crate::pac::ucpd::vals::{Phyccsel as CcSel, TypecVstateCc as CcVState}; 28pub use crate::pac::ucpd::vals::{Phyccsel as CcSel, TypecVstateCc as CcVState};
29use crate::rcc::RccPeripheral; 29use crate::rcc::RccPeripheral;
30 30
31pub(crate) fn init(
32 _cs: critical_section::CriticalSection,
33 #[cfg(peri_ucpd1)] ucpd1_db_enable: bool,
34 #[cfg(peri_ucpd2)] ucpd2_db_enable: bool,
35) {
36 #[cfg(stm32g0x1)]
37 {
38 // according to RM0444 (STM32G0x1) section 8.1.1:
39 // when UCPD is disabled setting the strobe will disable dead battery
40 // (which is enabled after reset) but if UCPD is enabled, setting the
41 // strobe will apply the CC pin configuration from the control register
42 // (which is why we need to be careful about when we call this)
43 crate::pac::SYSCFG.cfgr1().modify(|w| {
44 w.set_ucpd1_strobe(ucpd1_db_enable);
45 w.set_ucpd2_strobe(ucpd2_db_enable);
46 });
47 }
48
49 #[cfg(any(stm32g4, stm32l5))]
50 {
51 crate::pac::PWR.cr3().modify(|w| {
52 #[cfg(stm32g4)]
53 w.set_ucpd1_dbdis(!ucpd1_db_enable);
54 #[cfg(stm32l5)]
55 w.set_ucpd_dbdis(!ucpd1_db_enable);
56 })
57 }
58
59 #[cfg(any(stm32h5, stm32u5))]
60 {
61 crate::pac::PWR.ucpdr().modify(|w| {
62 w.set_ucpd_dbdis(!ucpd1_db_enable);
63 })
64 }
65}
66
31/// Pull-up or Pull-down resistor state of both CC lines. 67/// Pull-up or Pull-down resistor state of both CC lines.
32#[derive(Debug, Clone, Copy, PartialEq)] 68#[derive(Debug, Clone, Copy, PartialEq)]
33#[cfg_attr(feature = "defmt", derive(defmt::Format))] 69#[cfg_attr(feature = "defmt", derive(defmt::Format))]
@@ -35,9 +71,6 @@ pub enum CcPull {
35 /// Analog PHY for CC pin disabled. 71 /// Analog PHY for CC pin disabled.
36 Disabled, 72 Disabled,
37 73
38 /// Rd=5.1k pull-down resistor enabled when the corresponding DBCC pin is high.
39 SinkDeadBattery,
40
41 /// Rd=5.1k pull-down resistor. 74 /// Rd=5.1k pull-down resistor.
42 Sink, 75 Sink,
43 76
@@ -192,20 +225,21 @@ impl<'d, T: Instance> CcPhy<'d, T> {
192 CcPull::Source3_0A => 3, 225 CcPull::Source3_0A => 3,
193 _ => 0, 226 _ => 0,
194 }); 227 });
195 w.set_ccenable(if cc_pull != CcPull::SinkDeadBattery { 228 w.set_ccenable(if cc_pull == CcPull::Disabled {
196 Ccenable::BOTH
197 } else {
198 Ccenable::DISABLED 229 Ccenable::DISABLED
230 } else {
231 Ccenable::BOTH
199 }); 232 });
200 }); 233 });
201 234
202 // Disable dead-battery pull-down resistors which are enabled by default on boot. 235 // Disable dead-battery pull-down resistors which are enabled by default on boot.
203 critical_section::with(|_| { 236 critical_section::with(|cs| {
204 // TODO: other families 237 init(
205 #[cfg(stm32g4)] 238 cs,
206 crate::pac::PWR 239 false,
207 .cr3() 240 #[cfg(peri_ucpd2)]
208 .modify(|w| w.set_ucpd1_dbdis(cc_pull != CcPull::SinkDeadBattery)); 241 false,
242 );
209 }); 243 });
210 } 244 }
211 245