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authorxoviat <[email protected]>2023-10-13 23:06:32 -0500
committerxoviat <[email protected]>2023-10-13 23:06:32 -0500
commit3264941c1bcad10efc96c017736391edf5d846ff (patch)
tree0ef01007c12b430862f184ff4ca7abbf257e7017
parent75baf186f3e5e3cf03e861d90a011f17f2f865f7 (diff)
rcc mux: update metapac
-rw-r--r--embassy-stm32/Cargo.toml4
-rw-r--r--embassy-stm32/build.rs23
-rw-r--r--embassy-stm32/src/rcc/h.rs28
-rw-r--r--embassy-stm32/src/rcc/mod.rs24
4 files changed, 41 insertions, 38 deletions
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index 8af55272a..dbf5a69d3 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -58,7 +58,7 @@ rand_core = "0.6.3"
58sdio-host = "0.5.0" 58sdio-host = "0.5.0"
59embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true } 59embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
60critical-section = "1.1" 60critical-section = "1.1"
61stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6bfa5a0dcec6a9bd42cea94ba11eeae1a17a7f2c" } 61stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-e4a769aa67aa82603448377daa579d67a789983a" }
62vcell = "0.1.3" 62vcell = "0.1.3"
63bxcan = "0.7.0" 63bxcan = "0.7.0"
64nb = "1.0.0" 64nb = "1.0.0"
@@ -76,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] }
76[build-dependencies] 76[build-dependencies]
77proc-macro2 = "1.0.36" 77proc-macro2 = "1.0.36"
78quote = "1.0.15" 78quote = "1.0.15"
79stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6bfa5a0dcec6a9bd42cea94ba11eeae1a17a7f2c", default-features = false, features = ["metadata"]} 79stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-e4a769aa67aa82603448377daa579d67a789983a", default-features = false, features = ["metadata"]}
80 80
81 81
82[features] 82[features]
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index 8e680fb60..7ba3a6bd7 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -5,7 +5,7 @@ use std::{env, fs};
5 5
6use proc_macro2::{Ident, TokenStream}; 6use proc_macro2::{Ident, TokenStream};
7use quote::{format_ident, quote}; 7use quote::{format_ident, quote};
8use stm32_metapac::metadata::ir::{BlockItemInner, Enum}; 8use stm32_metapac::metadata::ir::{BlockItemInner, Enum, FieldSet};
9use stm32_metapac::metadata::{MemoryRegionKind, PeripheralRccRegister, METADATA}; 9use stm32_metapac::metadata::{MemoryRegionKind, PeripheralRccRegister, METADATA};
10 10
11fn main() { 11fn main() {
@@ -400,29 +400,24 @@ fn main() {
400 .ir; 400 .ir;
401 401
402 let rcc_blocks = rcc_registers.blocks.iter().find(|b| b.name == "Rcc").unwrap().items; 402 let rcc_blocks = rcc_registers.blocks.iter().find(|b| b.name == "Rcc").unwrap().items;
403 let rcc_fieldsets: HashMap<&str, &FieldSet> = rcc_registers.fieldsets.iter().map(|f| (f.name, f)).collect();
404 let rcc_enums: HashMap<&str, &Enum> = rcc_registers.enums.iter().map(|e| (e.name, e)).collect();
403 405
404 let rcc_block_item_map: HashMap<&str, &str> = rcc_blocks 406 rcc_blocks
405 .iter() 407 .iter()
406 .filter_map(|b| match &b.inner { 408 .filter_map(|b| match &b.inner {
407 BlockItemInner::Register(register) => register.fieldset.map(|f| (f, b.name)), 409 BlockItemInner::Register(register) => register.fieldset.map(|f| (b.name, f)),
408 _ => None, 410 _ => None,
409 }) 411 })
410 .collect(); 412 .filter_map(|(b, f)| {
411 413 rcc_fieldsets.get(f).map(|f| {
412 let rcc_enum_map: HashMap<&str, &Enum> = rcc_registers.enums.iter().map(|e| (e.name, e)).collect();
413
414 rcc_registers
415 .fieldsets
416 .iter()
417 .filter_map(|f| {
418 rcc_block_item_map.get(f.name).map(|b| {
419 ( 414 (
420 *b, 415 b,
421 f.fields 416 f.fields
422 .iter() 417 .iter()
423 .filter_map(|f| { 418 .filter_map(|f| {
424 let enumm = f.enumm?; 419 let enumm = f.enumm?;
425 let enumm = rcc_enum_map.get(enumm)?; 420 let enumm = rcc_enums.get(enumm)?;
426 421
427 Some((f.name, *enumm)) 422 Some((f.name, *enumm))
428 }) 423 })
diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs
index d37dd45d4..379d31794 100644
--- a/embassy-stm32/src/rcc/h.rs
+++ b/embassy-stm32/src/rcc/h.rs
@@ -457,8 +457,8 @@ pub(crate) unsafe fn init(config: Config) {
457 AdcClockSource::SYSCLK => Some(sys), 457 AdcClockSource::SYSCLK => Some(sys),
458 AdcClockSource::PLL2_R => pll2.r, 458 AdcClockSource::PLL2_R => pll2.r,
459 AdcClockSource::HSE => hse, 459 AdcClockSource::HSE => hse,
460 AdcClockSource::HSI_KER => hsi, 460 AdcClockSource::HSI => hsi,
461 AdcClockSource::CSI_KER => csi, 461 AdcClockSource::CSI => csi,
462 _ => unreachable!(), 462 _ => unreachable!(),
463 }; 463 };
464 464
@@ -547,15 +547,25 @@ pub(crate) unsafe fn init(config: Config) {
547 rtc, 547 rtc,
548 548
549 #[cfg(stm32h5)] 549 #[cfg(stm32h5)]
550 mux_rcc_pclk1: Some(apb1), 550 mux_apb1: Some(apb1),
551 #[cfg(stm32h5)]
552 mux_apb2: Some(apb2),
553 #[cfg(stm32h5)]
554 mux_apb3: Some(apb3),
555 #[cfg(stm32h5)]
556 mux_apb4: None,
557
558 #[cfg(stm32h5)]
559 mux_rcc_hclk4: None,
560
551 #[cfg(stm32h5)] 561 #[cfg(stm32h5)]
552 mux_pll2_q: None, 562 mux_pll2_q: None,
553 #[cfg(stm32h5)] 563 #[cfg(stm32h5)]
554 mux_pll3_q: None, 564 mux_pll3_q: None,
555 #[cfg(stm32h5)] 565 #[cfg(stm32h5)]
556 mux_hsi_ker: None, 566 mux_hsi: None,
557 #[cfg(stm32h5)] 567 #[cfg(stm32h5)]
558 mux_csi_ker: None, 568 mux_csi: None,
559 #[cfg(stm32h5)] 569 #[cfg(stm32h5)]
560 mux_lse: None, 570 mux_lse: None,
561 #[cfg(stm32h5)] 571 #[cfg(stm32h5)]
@@ -574,20 +584,14 @@ pub(crate) unsafe fn init(config: Config) {
574 #[cfg(all(not(rcc_h5), stm32h5))] 584 #[cfg(all(not(rcc_h5), stm32h5))]
575 mux_pll3_r: None, 585 mux_pll3_r: None,
576 #[cfg(stm32h5)] 586 #[cfg(stm32h5)]
577 mux_rcc_pclk3: Some(apb3),
578 #[cfg(stm32h5)]
579 mux_pll3_1: None, 587 mux_pll3_1: None,
580 #[cfg(stm32h5)] 588 #[cfg(stm32h5)]
581 mux_hsi48_ker: None, 589 mux_hsi48_ker: None,
582 #[cfg(stm32h5)] 590 #[cfg(stm32h5)]
583 mux_lsi_ker: None, 591 mux_lsi: None,
584 #[cfg(stm32h5)] 592 #[cfg(stm32h5)]
585 mux_pll2_r: pll2.r, 593 mux_pll2_r: pll2.r,
586 #[cfg(stm32h5)] 594 #[cfg(stm32h5)]
587 mux_rcc_pclk2: Some(apb2),
588 #[cfg(stm32h5)]
589 mux_rcc_pclk4: None,
590 #[cfg(stm32h5)]
591 mux_hse: hse, 595 mux_hse: hse,
592 596
593 #[cfg(stm32h5)] 597 #[cfg(stm32h5)]
diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs
index edbae30de..f7210e186 100644
--- a/embassy-stm32/src/rcc/mod.rs
+++ b/embassy-stm32/src/rcc/mod.rs
@@ -136,15 +136,25 @@ pub struct Clocks {
136 pub rtc: Option<Hertz>, 136 pub rtc: Option<Hertz>,
137 137
138 #[cfg(stm32h5)] 138 #[cfg(stm32h5)]
139 pub mux_rcc_pclk1: Option<Hertz>, 139 pub mux_apb1: Option<Hertz>,
140 #[cfg(stm32h5)]
141 pub mux_apb2: Option<Hertz>,
142 #[cfg(stm32h5)]
143 pub mux_apb3: Option<Hertz>,
144 #[cfg(stm32h5)]
145 pub mux_apb4: Option<Hertz>,
146
147 #[cfg(stm32h5)]
148 pub mux_rcc_hclk4: Option<Hertz>,
149
140 #[cfg(stm32h5)] 150 #[cfg(stm32h5)]
141 pub mux_pll2_q: Option<Hertz>, 151 pub mux_pll2_q: Option<Hertz>,
142 #[cfg(stm32h5)] 152 #[cfg(stm32h5)]
143 pub mux_pll3_q: Option<Hertz>, 153 pub mux_pll3_q: Option<Hertz>,
144 #[cfg(stm32h5)] 154 #[cfg(stm32h5)]
145 pub mux_hsi_ker: Option<Hertz>, 155 pub mux_hsi: Option<Hertz>,
146 #[cfg(stm32h5)] 156 #[cfg(stm32h5)]
147 pub mux_csi_ker: Option<Hertz>, 157 pub mux_csi: Option<Hertz>,
148 #[cfg(stm32h5)] 158 #[cfg(stm32h5)]
149 pub mux_lse: Option<Hertz>, 159 pub mux_lse: Option<Hertz>,
150 160
@@ -162,20 +172,14 @@ pub struct Clocks {
162 #[cfg(stm32h5)] 172 #[cfg(stm32h5)]
163 pub mux_pll3_r: Option<Hertz>, 173 pub mux_pll3_r: Option<Hertz>,
164 #[cfg(stm32h5)] 174 #[cfg(stm32h5)]
165 pub mux_rcc_pclk3: Option<Hertz>,
166 #[cfg(stm32h5)]
167 pub mux_pll3_1: Option<Hertz>, 175 pub mux_pll3_1: Option<Hertz>,
168 #[cfg(stm32h5)] 176 #[cfg(stm32h5)]
169 pub mux_hsi48_ker: Option<Hertz>, 177 pub mux_hsi48_ker: Option<Hertz>,
170 #[cfg(stm32h5)] 178 #[cfg(stm32h5)]
171 pub mux_lsi_ker: Option<Hertz>, 179 pub mux_lsi: Option<Hertz>,
172 #[cfg(stm32h5)] 180 #[cfg(stm32h5)]
173 pub mux_pll2_r: Option<Hertz>, 181 pub mux_pll2_r: Option<Hertz>,
174 #[cfg(stm32h5)] 182 #[cfg(stm32h5)]
175 pub mux_rcc_pclk2: Option<Hertz>,
176 #[cfg(stm32h5)]
177 pub mux_rcc_pclk4: Option<Hertz>,
178 #[cfg(stm32h5)]
179 pub mux_hse: Option<Hertz>, 183 pub mux_hse: Option<Hertz>,
180 184
181 #[cfg(stm32h5)] 185 #[cfg(stm32h5)]