Merge pull request #5031 from lsartory/main

Add CRC, HASH and I2C peripherals to STM32N6

7 files changed, 133 insertions, 7 deletions

diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index e10409112..7989fc5d7 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -200,11 +200,11 @@ aligned = "0.4.1"
 heapless = "0.9.1"
 
 #stm32-metapac = { version = "18" }
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f61ed017ef12ec84ff04c49e3147694bda3b29cb" }
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-497fb3042b49b765d8974aac87b8ab4fa3566d74" }
 
 [build-dependencies]
 #stm32-metapac = { version = "18", default-features = false, features = ["metadata"]}
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f61ed017ef12ec84ff04c49e3147694bda3b29cb", default-features = false, features = ["metadata"] }
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-497fb3042b49b765d8974aac87b8ab4fa3566d74", default-features = false, features = ["metadata"] }
 
 proc-macro2 = "1.0.36"
 quote = "1.0.15"
diff --git a/embassy-stm32/src/dma/gpdma/mod.rs b/embassy-stm32/src/dma/gpdma/mod.rs
index 51c107cb4..afb18ec1a 100644
--- a/embassy-stm32/src/dma/gpdma/mod.rs
+++ b/embassy-stm32/src/dma/gpdma/mod.rs
@@ -137,7 +137,6 @@ pub(crate) unsafe fn init(cs: critical_section::CriticalSection, irq_priority: c
 
 impl AnyChannel {
     /// Safety: Must be called with a matching set of parameters for a valid dma channel
-    #[cfg(not(stm32n6))]
     pub(crate) unsafe fn on_irq(&self) {
         let info = self.info();
         #[cfg(feature = "_dual-core")]
diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs
index 90feab167..05d9c2e51 100644
--- a/embassy-stm32/src/dma/mod.rs
+++ b/embassy-stm32/src/dma/mod.rs
@@ -48,11 +48,9 @@ pub type Request = u8;
 pub type Request = ();
 
 pub(crate) trait SealedChannel: StoppablePeripheral {
-    #[cfg(not(stm32n6))]
     fn id(&self) -> u8;
 }
 
-#[cfg(not(stm32n6))]
 pub(crate) trait ChannelInterrupt {
     #[cfg_attr(not(feature = "rt"), allow(unused))]
     unsafe fn on_irq();
@@ -62,7 +60,6 @@ pub(crate) trait ChannelInterrupt {
 #[allow(private_bounds)]
 pub trait Channel: SealedChannel + PeripheralType + Into<AnyChannel> + 'static {}
 
-#[cfg(not(stm32n6))]
 macro_rules! dma_channel_impl {
     ($channel_peri:ident, $index:expr, $stop_mode:ident) => {
         impl crate::rcc::StoppablePeripheral for crate::peripherals::$channel_peri {
@@ -125,7 +122,6 @@ impl StoppablePeripheral for AnyChannel {
 }
 
 impl SealedChannel for AnyChannel {
-    #[cfg(not(stm32n6))]
     fn id(&self) -> u8 {
         self.id
     }
diff --git a/embassy-stm32/src/rcc/n6.rs b/embassy-stm32/src/rcc/n6.rs
index 866851bbd..178ec57d4 100644
--- a/embassy-stm32/src/rcc/n6.rs
+++ b/embassy-stm32/src/rcc/n6.rs
@@ -1003,6 +1003,24 @@ pub(crate) unsafe fn init(config: Config) {
         p.SCB.cpacr.modify(|w| w | (3 << 20) | (3 << 22));
     }
 
+    // TODO: ugly workaround for DMA accesses until RIF is properly implemented
+    debug!("deactivating RIF");
+    const RISAF3_BASE_NS: *mut u32 = stm32_metapac::RNG.wrapping_byte_offset(0x8000) as _; // AHB3PERIPH_BASE_NS + 0x8000UL
+    const RISAF3_REG0_CFGR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x40);
+    const RISAF3_REG0_ENDR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x48);
+    const RISAF3_REG0_CIDCFGR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x4C);
+    const RISAF3_REG1_CFGR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x80);
+    const RISAF3_REG1_ENDR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x88);
+    const RISAF3_REG1_CIDCFGR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x8C);
+    unsafe {
+        *RISAF3_REG0_CIDCFGR = 0x000F000F; /* RW for everyone */
+        *RISAF3_REG0_ENDR = 0xFFFFFFFF; /* all-encompassing */
+        *RISAF3_REG0_CFGR = 0x00000101; /* enabled, secure, unprivileged for everyone */
+        *RISAF3_REG1_CIDCFGR = 0x00FF00FF; /* RW for everyone */
+        *RISAF3_REG1_ENDR = 0xFFFFFFFF; /* all-encompassing */
+        *RISAF3_REG1_CFGR = 0x00000001; /* enabled, non-secure, unprivileged*/
+    }
+
     debug!("setting power supply config");
 
     power_supply_config(config.supply_config);
@@ -1039,7 +1057,9 @@ pub(crate) unsafe fn init(config: Config) {
         i2s_ckin: None,
         ic8: None,
         ic9: None,
+        ic10: None,
         ic14: None,
+        ic15: None,
         ic17: None,
         ic20: None,
     );
diff --git a/examples/stm32n6/Cargo.toml b/examples/stm32n6/Cargo.toml
index 5ed28eed1..5ad5b97ce 100644
--- a/examples/stm32n6/Cargo.toml
+++ b/examples/stm32n6/Cargo.toml
@@ -32,6 +32,8 @@ micromath = "2.0.0"
 stm32-fmc = "0.3.0"
 embedded-storage = "0.3.1"
 static_cell = "2"
+hmac = "0.12.1"
+sha2 = { version = "0.10.9", default-features = false }
 
 
 # cargo build/run
diff --git a/examples/stm32n6/src/bin/crc.rs b/examples/stm32n6/src/bin/crc.rs
new file mode 100644
index 000000000..d1b545d5b
--- /dev/null
+++ b/examples/stm32n6/src/bin/crc.rs
@@ -0,0 +1,31 @@
+#![no_std]
+#![no_main]
+
+use defmt::*;
+use embassy_executor::Spawner;
+use embassy_stm32::crc::{Config, Crc, InputReverseConfig, PolySize};
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_stm32::init(Default::default());
+    info!("Hello World!");
+
+    // Setup for: https://crccalc.com/?crc=Life, it never dieWomen are my favorite guy&method=crc32&datatype=ascii&outtype=0
+    let mut crc = Crc::new(
+        p.CRC,
+        unwrap!(Config::new(
+            InputReverseConfig::Byte,
+            true,
+            PolySize::Width32,
+            0xFFFFFFFF,
+            0x04C11DB7
+        )),
+    );
+
+    let output = crc.feed_bytes(b"Life, it never die\nWomen are my favorite guy") ^ 0xFFFFFFFF;
+
+    defmt::assert_eq!(output, 0x33F0E26B);
+
+    cortex_m::asm::bkpt();
+}
diff --git a/examples/stm32n6/src/bin/hash.rs b/examples/stm32n6/src/bin/hash.rs
new file mode 100644
index 000000000..9f248318f
--- /dev/null
+++ b/examples/stm32n6/src/bin/hash.rs
@@ -0,0 +1,78 @@
+#![no_std]
+#![no_main]
+
+use defmt::info;
+use embassy_executor::Spawner;
+use embassy_stm32::hash::*;
+use embassy_stm32::{Config, bind_interrupts, hash, peripherals};
+use embassy_time::Instant;
+use hmac::{Hmac, Mac};
+use sha2::{Digest, Sha256};
+use {defmt_rtt as _, panic_probe as _};
+
+type HmacSha256 = Hmac<Sha256>;
+
+bind_interrupts!(struct Irqs {
+    HASH => hash::InterruptHandler<peripherals::HASH>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) -> ! {
+    let config = Config::default();
+    let p = embassy_stm32::init(config);
+
+    let test_1: &[u8] = b"as;dfhaslfhas;oifvnasd;nifvnhasd;nifvhndlkfghsd;nvfnahssdfgsdafgsasdfasdfasdfasdfasdfghjklmnbvcalskdjghalskdjgfbaslkdjfgbalskdjgbalskdjbdfhsdfhsfghsfghfgh";
+    let test_2: &[u8] = b"fdhalksdjfhlasdjkfhalskdjfhgal;skdjfgalskdhfjgalskdjfglafgadfgdfgdafgaadsfgfgdfgadrgsyfthxfgjfhklhjkfgukhulkvhlvhukgfhfsrghzdhxyfufynufyuszeradrtydyytserr";
+
+    let mut hw_hasher = Hash::new_blocking(p.HASH, Irqs);
+
+    let hw_start_time = Instant::now();
+
+    // Compute a digest in hardware.
+    let mut context = hw_hasher.start(Algorithm::SHA256, DataType::Width8, None);
+    hw_hasher.update_blocking(&mut context, test_1);
+    hw_hasher.update_blocking(&mut context, test_2);
+    let mut hw_digest: [u8; 32] = [0; 32];
+    hw_hasher.finish_blocking(context, &mut hw_digest);
+
+    let hw_end_time = Instant::now();
+    let hw_execution_time = hw_end_time - hw_start_time;
+
+    let sw_start_time = Instant::now();
+
+    // Compute a digest in software.
+    let mut sw_hasher = Sha256::new();
+    sw_hasher.update(test_1);
+    sw_hasher.update(test_2);
+    let sw_digest = sw_hasher.finalize();
+
+    let sw_end_time = Instant::now();
+    let sw_execution_time = sw_end_time - sw_start_time;
+
+    info!("Hardware Digest: {:?}", hw_digest);
+    info!("Software Digest: {:?}", sw_digest[..]);
+    info!("Hardware Execution Time: {:?}", hw_execution_time);
+    info!("Software Execution Time: {:?}", sw_execution_time);
+    assert_eq!(hw_digest, sw_digest[..]);
+
+    let hmac_key: [u8; 64] = [0x55; 64];
+
+    // Compute HMAC in hardware.
+    let mut sha256hmac_context = hw_hasher.start(Algorithm::SHA256, DataType::Width8, Some(&hmac_key));
+    hw_hasher.update_blocking(&mut sha256hmac_context, test_1);
+    hw_hasher.update_blocking(&mut sha256hmac_context, test_2);
+    let mut hw_hmac: [u8; 32] = [0; 32];
+    hw_hasher.finish_blocking(sha256hmac_context, &mut hw_hmac);
+
+    // Compute HMAC in software.
+    let mut sw_mac = HmacSha256::new_from_slice(&hmac_key).unwrap();
+    sw_mac.update(test_1);
+    sw_mac.update(test_2);
+    let sw_hmac = sw_mac.finalize().into_bytes();
+
+    info!("Hardware HMAC: {:?}", hw_hmac);
+    info!("Software HMAC: {:?}", sw_hmac[..]);
+    assert_eq!(hw_hmac, sw_hmac[..]);
+
+    loop {}
+}