aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAlessandro Pezzato <[email protected]>2023-07-19 10:50:40 +0200
committerAlessandro Pezzato <[email protected]>2023-07-19 10:50:40 +0200
commit36ff688fab8bb0a17f001cdf62f24884e3ac1f33 (patch)
treea323ee76bf9ca5894c04afa5d8d4c822bb62446d
parent3df2c71e6c27eedacef1ddd822537c8762fe0578 (diff)
stm32/uart: optimize swap_rx_tx
-rw-r--r--embassy-stm32/src/usart/mod.rs28
1 files changed, 15 insertions, 13 deletions
diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs
index 1ba182e21..ea8e525ea 100644
--- a/embassy-stm32/src/usart/mod.rs
+++ b/embassy-stm32/src/usart/mod.rs
@@ -694,19 +694,21 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
694 694
695 let r = T::regs(); 695 let r = T::regs();
696 696
697 #[allow(unused_variables)] 697 // Some chips do not have swap_rx_tx bit
698 let swap_rx_tx = false; 698 cfg_if::cfg_if! {
699 699 if #[cfg(any(usart_v3, usart_v4))] {
700 #[cfg(any(usart_v3, usart_v4))] 700 if config.swap_rx_tx {
701 let swap_rx_tx = config.swap_rx_tx; 701 let (rx, tx) = (tx, rx);
702 702 rx.set_as_af(rx.af_num(), AFType::Input);
703 if swap_rx_tx { 703 tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
704 let (rx, tx) = (tx, rx); 704 } else {
705 rx.set_as_af(rx.af_num(), AFType::Input); 705 rx.set_as_af(rx.af_num(), AFType::Input);
706 tx.set_as_af(tx.af_num(), AFType::OutputPushPull); 706 tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
707 } else { 707 }
708 rx.set_as_af(rx.af_num(), AFType::Input); 708 } else {
709 tx.set_as_af(tx.af_num(), AFType::OutputPushPull); 709 rx.set_as_af(rx.af_num(), AFType::Input);
710 tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
711 }
710 } 712 }
711 713
712 configure(r, &config, T::frequency(), T::KIND, true, true); 714 configure(r, &config, T::frequency(), T::KIND, true, true);