partial alternate function configuration on STM32f1

9 files changed, 72 insertions, 28 deletions

diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs
index 9e10a8b02..b73b88391 100644
--- a/embassy-stm32/src/can/bxcan.rs
+++ b/embassy-stm32/src/can/bxcan.rs
@@ -5,7 +5,7 @@ use embassy::util::Unborrow;
 use embassy_hal_common::unborrow;
 
 use crate::gpio::{
-    sealed::OutputType::{OpenDrain, PushPull},
+    sealed::AFType::{OutputOpenDrain, OutputPushPull},
     Pin,
 };
 use crate::{peripherals, rcc::RccPeripheral};
@@ -26,8 +26,8 @@ impl<'d, T: Instance + bxcan::Instance> Can<'d, T> {
         unborrow!(peri, rx, tx);
 
         unsafe {
-            rx.set_as_af(rx.af_num(), OpenDrain);
-            tx.set_as_af(tx.af_num(), PushPull);
+            rx.set_as_af(rx.af_num(), OutputOpenDrain);
+            tx.set_as_af(tx.af_num(), OutputPushPull);
         }
 
         T::enable();
diff --git a/embassy-stm32/src/eth/v2/mod.rs b/embassy-stm32/src/eth/v2/mod.rs
index 8eb7c3393..001ac3154 100644
--- a/embassy-stm32/src/eth/v2/mod.rs
+++ b/embassy-stm32/src/eth/v2/mod.rs
@@ -10,7 +10,7 @@ use embassy_net::{Device, DeviceCapabilities, LinkState, PacketBuf, MTU};
 
 use crate::gpio::sealed::Pin as __GpioPin;
 use crate::gpio::Pin as GpioPin;
-use crate::gpio::{sealed::OutputType::PushPull, AnyPin};
+use crate::gpio::{sealed::AFType::OutputPushPull, AnyPin};
 use crate::pac::gpio::vals::Ospeedr;
 use crate::pac::{ETH, RCC, SYSCFG};
 use crate::peripherals;
@@ -416,7 +416,7 @@ macro_rules! impl_pin {
             fn configure(&mut self) {
                 // NOTE(unsafe) Exclusive access to the registers
                 critical_section::with(|_| unsafe {
-                    self.set_as_af($af, PushPull);
+                    self.set_as_af($af, OutputPushPull);
                     self.block()
                         .ospeedr()
                         .modify(|w| w.set_ospeedr(self.pin() as usize, Ospeedr::VERYHIGHSPEED));
diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs
index c7b644e94..3a8117e9d 100644
--- a/embassy-stm32/src/gpio.rs
+++ b/embassy-stm32/src/gpio.rs
@@ -350,12 +350,15 @@ impl<'d, T: Pin> InputPin for OutputOpenDrain<'d, T> {
 pub(crate) mod sealed {
     use super::*;
 
-    /// Output type settings
+    /// Alternate function type settings
     #[derive(Debug)]
     #[cfg_attr(feature = "defmt", derive(defmt::Format))]
-    pub enum OutputType {
-        PushPull,
-        OpenDrain,
+    pub enum AFType {
+        // InputFloating,
+        // InputPullUp,
+        // InputPullDown,
+        OutputPushPull,
+        OutputOpenDrain,
     }
 
     pub trait Pin {
@@ -394,21 +397,35 @@ pub(crate) mod sealed {
         }
 
         #[cfg(gpio_v1)]
-        unsafe fn set_as_af(&self, _af_num: u8, _af_type: OutputType) {
-            panic!("F1 alternate GPIO functions not supported yet!");
+        unsafe fn set_as_af(&self, _af_num: u8, af_type: AFType) {
+            // F1 uses the AFIO register for remapping.
+            // For now, this is not implemented, so af_num is ignored
+            // _af_num should be zero here, since it is not set by stm32-data
+            let r = pin.block();
+            let n = pin.pin() as usize;
+            let crlh = if n < 8 { 0 } else { 1 };
+            match af_type {
+                // TODO: Do we need to configure input AF pins differently?
+                AfType::OutputPushPull => {
+                    r.cr(crlh).modify(|w| w.set_cnf(n % 8, vals::Cnf::PUSHPULL));
+                }
+                AfType::OutputOpenDrain => r
+                    .cr(crlh)
+                    .modify(|w| w.set_cnf(n % 8, vals::Cnf::OPENDRAIN)),
+            }
         }
         #[cfg(gpio_v2)]
-        unsafe fn set_as_af(&self, af_num: u8, af_type: OutputType) {
+        unsafe fn set_as_af(&self, af_num: u8, af_type: AFType) {
             let pin = self._pin() as usize;
             let block = self.block();
             block
                 .afr(pin / 8)
                 .modify(|w| w.set_afr(pin % 8, vals::Afr(af_num)));
             match af_type {
-                OutputType::PushPull => {
+                AfType::OutputPushPull => {
                     block.otyper().modify(|w| w.set_ot(pin, vals::Ot::PUSHPULL))
                 }
-                OutputType::OpenDrain => block
+                AfType::OutputOpenDrain => block
                     .otyper()
                     .modify(|w| w.set_ot(pin, vals::Ot::OPENDRAIN)),
             }
diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
index 4af5051db..e922fe429 100644
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@@ -96,7 +96,6 @@ crate::pac::interrupts!(
     };
 );
 
-#[cfg(not(rcc_f1))]
 macro_rules! impl_pin {
     ($inst:ident, $pin:ident, $signal:ident, $af:expr) => {
         impl $signal<peripherals::$inst> for peripherals::$pin {}
@@ -109,6 +108,7 @@ macro_rules! impl_pin {
     };
 }
 
+#[cfg(not(rcc_f1))]
 crate::pac::peripheral_pins!(
     ($inst:ident, i2c, I2C, $pin:ident, SDA, $af:expr) => {
         impl_pin!($inst, $pin, SdaPin, $af);
@@ -119,6 +119,17 @@ crate::pac::peripheral_pins!(
     };
 );
 
+#[cfg(rcc_f1)]
+crate::pac::peripheral_pins!(
+    ($inst:ident, i2c, I2C, $pin:ident, SDA) => {
+        impl_pin!($inst, $pin, SdaPin, 0);
+    };
+
+    ($inst:ident, i2c, I2C, $pin:ident, SCL) => {
+        impl_pin!($inst, $pin, SclPin, 0);
+    };
+);
+
 macro_rules! impl_dma {
     ($inst:ident, {dmamux: $dmamux:ident}, $signal:ident, $request:expr) => {
         impl<T> sealed::$signal<peripherals::$inst> for T
diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
index c5d5dee0c..6fa269fc2 100644
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@@ -9,7 +9,7 @@ use embedded_hal::blocking::i2c::WriteRead;
 
 use crate::pac::i2c;
 
-use crate::gpio::sealed::OutputType::OpenDrain;
+use crate::gpio::sealed::AFType::OutputOpenDrain;
 
 pub struct I2c<'d, T: Instance> {
     phantom: PhantomData<&'d mut T>,
@@ -30,8 +30,8 @@ impl<'d, T: Instance> I2c<'d, T> {
         T::enable();
 
         unsafe {
-            scl.set_as_af(scl.af_num(), OpenDrain);
-            sda.set_as_af(sda.af_num(), OpenDrain);
+            scl.set_as_af(scl.af_num(), OutputOpenDrain);
+            sda.set_as_af(sda.af_num(), OutputOpenDrain);
         }
 
         unsafe {
diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs
index 808854f00..492fc41c6 100644
--- a/embassy-stm32/src/spi/mod.rs
+++ b/embassy-stm32/src/spi/mod.rs
@@ -105,6 +105,7 @@ macro_rules! impl_pin {
     };
 }
 
+#[cfg(not(rcc_f1))]
 crate::pac::peripheral_pins!(
     ($inst:ident, spi, SPI, $pin:ident, SCK, $af:expr) => {
         impl_pin!($inst, $pin, SckPin, $af);
@@ -119,6 +120,21 @@ crate::pac::peripheral_pins!(
     };
 );
 
+#[cfg(rcc_f1)]
+crate::pac::peripheral_pins!(
+    ($inst:ident, spi, SPI, $pin:ident, SCK) => {
+        impl_pin!($inst, $pin, SckPin, 0);
+    };
+
+    ($inst:ident, spi, SPI, $pin:ident, MOSI) => {
+        impl_pin!($inst, $pin, MosiPin, 0);
+    };
+
+    ($inst:ident, spi, SPI, $pin:ident, MISO) => {
+        impl_pin!($inst, $pin, MisoPin, 0);
+    };
+);
+
 macro_rules! impl_dma {
     ($inst:ident, {dmamux: $dmamux:ident}, $signal:ident, $request:expr) => {
         impl<T> sealed::$signal<peripherals::$inst> for T
diff --git a/embassy-stm32/src/spi/v1.rs b/embassy-stm32/src/spi/v1.rs
index 982f1cc4b..560d99a2f 100644
--- a/embassy-stm32/src/spi/v1.rs
+++ b/embassy-stm32/src/spi/v1.rs
@@ -3,7 +3,7 @@
 use crate::dma::NoDma;
 use crate::gpio::{
     sealed::{
-        OutputType::{OpenDrain, PushPull},
+        AFType::{OutputOpenDrain, OutputPushPull},
         Pin,
     },
     AnyPin,
@@ -59,9 +59,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         unborrow!(sck, mosi, miso, txdma, rxdma);
 
         unsafe {
-            sck.set_as_af(sck.af_num(), PushPull);
-            mosi.set_as_af(mosi.af_num(), PushPull);
-            miso.set_as_af(miso.af_num(), OpenDrain);
+            sck.set_as_af(sck.af_num(), OutputPushPull);
+            mosi.set_as_af(mosi.af_num(), OutputPushPull);
+            miso.set_as_af(miso.af_num(), OutputOpenDrain);
         }
 
         let sck = sck.degrade();
diff --git a/embassy-stm32/src/usart/v1.rs b/embassy-stm32/src/usart/v1.rs
index d1dd68305..8cd392d18 100644
--- a/embassy-stm32/src/usart/v1.rs
+++ b/embassy-stm32/src/usart/v1.rs
@@ -1,4 +1,4 @@
-use crate::gpio::sealed::OutputType::{OpenDrain, PushPull};
+use crate::gpio::sealed::AFType::{OutputOpenDrain, OutputPushPull};
 use core::future::Future;
 use core::marker::PhantomData;
 use embassy::util::Unborrow;
@@ -37,8 +37,8 @@ impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
         let r = inner.regs();
 
         unsafe {
-            rx.set_as_af(rx.af_num(), OpenDrain);
-            tx.set_as_af(tx.af_num(), PushPull);
+            rx.set_as_af(rx.af_num(), OutputOpenDrain);
+            tx.set_as_af(tx.af_num(), OutputPushPull);
 
             r.brr().write_value(regs::Brr(div));
             r.cr1().write(|w| {
diff --git a/embassy-stm32/src/usart/v2.rs b/embassy-stm32/src/usart/v2.rs
index 5e6696351..e6e5f69db 100644
--- a/embassy-stm32/src/usart/v2.rs
+++ b/embassy-stm32/src/usart/v2.rs
@@ -13,7 +13,7 @@ use futures::TryFutureExt;
 
 use super::*;
 use crate::dma::NoDma;
-use crate::gpio::sealed::OutputType::{OpenDrain, PushPull};
+use crate::gpio::sealed::AFType::{OutputOpenDrain, OutputPushPull};
 use crate::pac::usart::{regs, vals};
 
 pub struct Uart<'d, T: Instance, TxDma = NoDma, RxDma = NoDma> {
@@ -43,8 +43,8 @@ impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
         let r = inner.regs();
 
         unsafe {
-            rx.set_as_af(rx.af_num(), OpenDrain);
-            tx.set_as_af(tx.af_num(), PushPull);
+            rx.set_as_af(rx.af_num(), OutputOpenDrain);
+            tx.set_as_af(tx.af_num(), OutputPushPull);
 
             r.cr2().write(|_w| {});
             r.cr3().write(|_w| {});