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authorOueslatiGhaith <[email protected]>2023-04-27 16:08:57 +0100
committerOueslatiGhaith <[email protected]>2023-04-27 16:08:57 +0100
commit3ba73b5ff45084e8d9a662220981f7d503aba251 (patch)
treef471155d6bfbf274a1fa3e7fe293e73b4e95f678
parent8c733c29cc2f48385acc537e7057af7d29174f8c (diff)
fixed mistake with casting channel to a usize
-rw-r--r--embassy-stm32/src/ipcc.rs28
1 files changed, 14 insertions, 14 deletions
diff --git a/embassy-stm32/src/ipcc.rs b/embassy-stm32/src/ipcc.rs
index e5ec58ada..43105c1d1 100644
--- a/embassy-stm32/src/ipcc.rs
+++ b/embassy-stm32/src/ipcc.rs
@@ -59,94 +59,94 @@ impl<'d> Ipcc<'d> {
59 let regs = IPCC::regs(); 59 let regs = IPCC::regs();
60 60
61 // If bit is set to 1 then interrupt is disabled 61 // If bit is set to 1 then interrupt is disabled
62 unsafe { regs.cpu(0).mr().modify(|w| w.set_chom(channel.into(), !enabled)) } 62 unsafe { regs.cpu(0).mr().modify(|w| w.set_chom(channel as usize, !enabled)) }
63 } 63 }
64 64
65 pub fn c1_get_rx_channel(&self, channel: IpccChannel) -> bool { 65 pub fn c1_get_rx_channel(&self, channel: IpccChannel) -> bool {
66 let regs = IPCC::regs(); 66 let regs = IPCC::regs();
67 67
68 // If bit is set to 1 then interrupt is disabled 68 // If bit is set to 1 then interrupt is disabled
69 unsafe { !regs.cpu(0).mr().read().chom(channel.into()) } 69 unsafe { !regs.cpu(0).mr().read().chom(channel as usize) }
70 } 70 }
71 71
72 pub fn c2_set_rx_channel(&mut self, channel: IpccChannel, enabled: bool) { 72 pub fn c2_set_rx_channel(&mut self, channel: IpccChannel, enabled: bool) {
73 let regs = IPCC::regs(); 73 let regs = IPCC::regs();
74 74
75 // If bit is set to 1 then interrupt is disabled 75 // If bit is set to 1 then interrupt is disabled
76 unsafe { regs.cpu(1).mr().modify(|w| w.set_chom(channel.into(), !enabled)) } 76 unsafe { regs.cpu(1).mr().modify(|w| w.set_chom(channel as usize, !enabled)) }
77 } 77 }
78 78
79 pub fn c2_get_rx_channel(&self, channel: IpccChannel) -> bool { 79 pub fn c2_get_rx_channel(&self, channel: IpccChannel) -> bool {
80 let regs = IPCC::regs(); 80 let regs = IPCC::regs();
81 81
82 // If bit is set to 1 then interrupt is disabled 82 // If bit is set to 1 then interrupt is disabled
83 unsafe { !regs.cpu(1).mr().read().chom(channel.into()) } 83 unsafe { !regs.cpu(1).mr().read().chom(channel as usize) }
84 } 84 }
85 85
86 pub fn c1_set_tx_channel(&mut self, channel: IpccChannel, enabled: bool) { 86 pub fn c1_set_tx_channel(&mut self, channel: IpccChannel, enabled: bool) {
87 let regs = IPCC::regs(); 87 let regs = IPCC::regs();
88 88
89 // If bit is set to 1 then interrupt is disabled 89 // If bit is set to 1 then interrupt is disabled
90 unsafe { regs.cpu(0).mr().modify(|w| w.set_chfm(channel.into(), !enabled)) } 90 unsafe { regs.cpu(0).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) }
91 } 91 }
92 92
93 pub fn c1_get_tx_channel(&self, channel: IpccChannel) -> bool { 93 pub fn c1_get_tx_channel(&self, channel: IpccChannel) -> bool {
94 let regs = IPCC::regs(); 94 let regs = IPCC::regs();
95 95
96 // If bit is set to 1 then interrupt is disabled 96 // If bit is set to 1 then interrupt is disabled
97 unsafe { !regs.cpu(0).mr().read().chfm(channel.into()) } 97 unsafe { !regs.cpu(0).mr().read().chfm(channel as usize) }
98 } 98 }
99 99
100 pub fn c2_set_tx_channel(&mut self, channel: IpccChannel, enabled: bool) { 100 pub fn c2_set_tx_channel(&mut self, channel: IpccChannel, enabled: bool) {
101 let regs = IPCC::regs(); 101 let regs = IPCC::regs();
102 102
103 // If bit is set to 1 then interrupt is disabled 103 // If bit is set to 1 then interrupt is disabled
104 unsafe { regs.cpu(1).mr().modify(|w| w.set_chfm(channel.into(), !enabled)) } 104 unsafe { regs.cpu(1).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) }
105 } 105 }
106 106
107 pub fn c2_get_tx_channel(&self, channel: IpccChannel) -> bool { 107 pub fn c2_get_tx_channel(&self, channel: IpccChannel) -> bool {
108 let regs = IPCC::regs(); 108 let regs = IPCC::regs();
109 109
110 // If bit is set to 1 then interrupt is disabled 110 // If bit is set to 1 then interrupt is disabled
111 unsafe { !regs.cpu(1).mr().read().chfm(channel.into()) } 111 unsafe { !regs.cpu(1).mr().read().chfm(channel as usize) }
112 } 112 }
113 113
114 /// clears IPCC receive channel status for CPU1 114 /// clears IPCC receive channel status for CPU1
115 pub fn c1_clear_flag_channel(&mut self, channel: IpccChannel) { 115 pub fn c1_clear_flag_channel(&mut self, channel: IpccChannel) {
116 let regs = IPCC::regs(); 116 let regs = IPCC::regs();
117 117
118 unsafe { regs.cpu(0).scr().write(|w| w.set_chc(channel.into(), true)) } 118 unsafe { regs.cpu(0).scr().write(|w| w.set_chc(channel as usize, true)) }
119 } 119 }
120 120
121 /// clears IPCC receive channel status for CPU2 121 /// clears IPCC receive channel status for CPU2
122 pub fn c2_clear_flag_channel(&mut self, channel: IpccChannel) { 122 pub fn c2_clear_flag_channel(&mut self, channel: IpccChannel) {
123 let regs = IPCC::regs(); 123 let regs = IPCC::regs();
124 124
125 unsafe { regs.cpu(1).scr().write(|w| w.set_chc(channel.into(), true)) } 125 unsafe { regs.cpu(1).scr().write(|w| w.set_chc(channel as usize, true)) }
126 } 126 }
127 127
128 pub fn c1_set_flag_channel(&mut self, channel: IpccChannel) { 128 pub fn c1_set_flag_channel(&mut self, channel: IpccChannel) {
129 let regs = IPCC::regs(); 129 let regs = IPCC::regs();
130 130
131 unsafe { regs.cpu(0).scr().write(|w| w.set_chs(channel.into(), true)) } 131 unsafe { regs.cpu(0).scr().write(|w| w.set_chs(channel as usize, true)) }
132 } 132 }
133 133
134 pub fn c2_set_flag_channel(&mut self, channel: IpccChannel) { 134 pub fn c2_set_flag_channel(&mut self, channel: IpccChannel) {
135 let regs = IPCC::regs(); 135 let regs = IPCC::regs();
136 136
137 unsafe { regs.cpu(1).scr().write(|w| w.set_chs(channel.into(), true)) } 137 unsafe { regs.cpu(1).scr().write(|w| w.set_chs(channel as usize, true)) }
138 } 138 }
139 139
140 pub fn c1_is_active_flag(&self, channel: IpccChannel) -> bool { 140 pub fn c1_is_active_flag(&self, channel: IpccChannel) -> bool {
141 let regs = IPCC::regs(); 141 let regs = IPCC::regs();
142 142
143 unsafe { regs.cpu(0).sr().read().chf(channel.into()) } 143 unsafe { regs.cpu(0).sr().read().chf(channel as usize) }
144 } 144 }
145 145
146 pub fn c2_is_active_flag(&self, channel: IpccChannel) -> bool { 146 pub fn c2_is_active_flag(&self, channel: IpccChannel) -> bool {
147 let regs = IPCC::regs(); 147 let regs = IPCC::regs();
148 148
149 unsafe { regs.cpu(1).sr().read().chf(channel.into()) } 149 unsafe { regs.cpu(1).sr().read().chf(channel as usize) }
150 } 150 }
151 151
152 pub fn is_tx_pending(&self, channel: IpccChannel) -> bool { 152 pub fn is_tx_pending(&self, channel: IpccChannel) -> bool {