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authorBen Gamari <[email protected]>2021-07-31 12:32:14 -0400
committerDario Nieuwenhuis <[email protected]>2021-08-05 22:39:59 +0200
commit41aaff95f866a5958bd06c0ee6adc2267b34e3c6 (patch)
tree45447fcef4fadf62eb534745c39063df6c15a3e8
parente44acd0d561d3e7ad58437ddced76b6e6a1fa387 (diff)
stm32h7: Use unwrap!
-rw-r--r--embassy-stm32/src/rcc/h7/mod.rs4
1 files changed, 2 insertions, 2 deletions
diff --git a/embassy-stm32/src/rcc/h7/mod.rs b/embassy-stm32/src/rcc/h7/mod.rs
index 2d9602a34..d6a55c3b4 100644
--- a/embassy-stm32/src/rcc/h7/mod.rs
+++ b/embassy-stm32/src/rcc/h7/mod.rs
@@ -120,7 +120,7 @@ impl<'d> Rcc<'d> {
120 unsafe { pll_setup(srcclk.0, &self.config.pll3, 2) }; 120 unsafe { pll_setup(srcclk.0, &self.config.pll3, 2) };
121 121
122 let sys_ck = if sys_use_pll1_p { 122 let sys_ck = if sys_use_pll1_p {
123 Hertz(pll1_p_ck.unwrap()) // Must have been set by sys_ck_setup 123 Hertz(unwrap!(pll1_p_ck)) // Must have been set by sys_ck_setup
124 } else { 124 } else {
125 sys_ck 125 sys_ck
126 }; 126 };
@@ -390,7 +390,7 @@ impl<'d> Rcc<'d> {
390 // set. The traceclk mux is synchronous with the system 390 // set. The traceclk mux is synchronous with the system
391 // clock mux, but has pll1_r_ck as an input. In order to 391 // clock mux, but has pll1_r_ck as an input. In order to
392 // keep traceclk running, we force a pll1_r_ck. 392 // keep traceclk running, we force a pll1_r_ck.
393 (true, None) => Some(Hertz(self.config.pll1.p_ck.unwrap().0 / 2)), 393 (true, None) => Some(Hertz(unwrap!(self.config.pll1.p_ck).0 / 2)),
394 394
395 // Either pll1 not selected as system clock, free choice 395 // Either pll1 not selected as system clock, free choice
396 // of pll1_r_ck. Or pll1 is selected, assume user has set 396 // of pll1_r_ck. Or pll1 is selected, assume user has set