diff options
| author | Annie Ehler <[email protected]> | 2025-06-12 04:11:49 +0000 |
|---|---|---|
| committer | Annie Ehler <[email protected]> | 2025-06-12 04:11:49 +0000 |
| commit | 4301016f155fd26a3934fb9e7bd2920107a32910 (patch) | |
| tree | 814bdfd29a8eb08cdbdfb7a66ad0ffd04a283ccc | |
| parent | f2266242043c0933e6d39e922400b21d726c9be3 (diff) | |
Move the methods to the cfg gated impls to handle register renaming.
| -rw-r--r-- | embassy-stm32/src/lptim/timer/mod.rs | 75 |
1 files changed, 50 insertions, 25 deletions
diff --git a/embassy-stm32/src/lptim/timer/mod.rs b/embassy-stm32/src/lptim/timer/mod.rs index f6abd4a74..648da5940 100644 --- a/embassy-stm32/src/lptim/timer/mod.rs +++ b/embassy-stm32/src/lptim/timer/mod.rs | |||
| @@ -82,31 +82,6 @@ impl<'d, T: Instance> Timer<'d, T> { | |||
| 82 | pub fn get_max_compare_value(&self) -> u16 { | 82 | pub fn get_max_compare_value(&self) -> u16 { |
| 83 | T::regs().arr().read().arr() | 83 | T::regs().arr().read().arr() |
| 84 | } | 84 | } |
| 85 | |||
| 86 | /// Enable the timer interrupt. | ||
| 87 | pub fn enable_interrupt(&self) { | ||
| 88 | T::regs().dier().modify(|w| w.set_arrmie(true)); | ||
| 89 | } | ||
| 90 | |||
| 91 | /// Disable the timer interrupt. | ||
| 92 | pub fn disable_interrupt(&self) { | ||
| 93 | T::regs().dier().modify(|w| w.set_arrmie(false)); | ||
| 94 | } | ||
| 95 | |||
| 96 | /// Check if the timer interrupt is enabled. | ||
| 97 | pub fn is_interrupt_enabled(&self) -> bool { | ||
| 98 | T::regs().dier().read().arrmie() | ||
| 99 | } | ||
| 100 | |||
| 101 | /// Check if the timer interrupt is pending. | ||
| 102 | pub fn is_interrupt_pending(&self) -> bool { | ||
| 103 | T::regs().isr().read().arrm() | ||
| 104 | } | ||
| 105 | |||
| 106 | /// Clear the timer interrupt. | ||
| 107 | pub fn clear_interrupt(&self) { | ||
| 108 | T::regs().icr().write(|w| w.set_arrmcf(true)); | ||
| 109 | } | ||
| 110 | } | 85 | } |
| 111 | 86 | ||
| 112 | #[cfg(any(lptim_v2a, lptim_v2b))] | 87 | #[cfg(any(lptim_v2a, lptim_v2b))] |
| @@ -140,6 +115,31 @@ impl<'d, T: Instance> Timer<'d, T> { | |||
| 140 | .ccmr(0) | 115 | .ccmr(0) |
| 141 | .modify(|w| w.set_ccsel(channel.index(), direction.into())); | 116 | .modify(|w| w.set_ccsel(channel.index(), direction.into())); |
| 142 | } | 117 | } |
| 118 | |||
| 119 | /// Enable the timer interrupt. | ||
| 120 | pub fn enable_interrupt(&self) { | ||
| 121 | T::regs().dier().modify(|w| w.set_arrmie(true)); | ||
| 122 | } | ||
| 123 | |||
| 124 | /// Disable the timer interrupt. | ||
| 125 | pub fn disable_interrupt(&self) { | ||
| 126 | T::regs().dier().modify(|w| w.set_arrmie(false)); | ||
| 127 | } | ||
| 128 | |||
| 129 | /// Check if the timer interrupt is enabled. | ||
| 130 | pub fn is_interrupt_enabled(&self) -> bool { | ||
| 131 | T::regs().dier().read().arrmie() | ||
| 132 | } | ||
| 133 | |||
| 134 | /// Check if the timer interrupt is pending. | ||
| 135 | pub fn is_interrupt_pending(&self) -> bool { | ||
| 136 | T::regs().isr().read().arrm() | ||
| 137 | } | ||
| 138 | |||
| 139 | /// Clear the timer interrupt. | ||
| 140 | pub fn clear_interrupt(&self) { | ||
| 141 | T::regs().icr().write(|w| w.set_arrmcf(true)); | ||
| 142 | } | ||
| 143 | } | 143 | } |
| 144 | 144 | ||
| 145 | #[cfg(not(any(lptim_v2a, lptim_v2b)))] | 145 | #[cfg(not(any(lptim_v2a, lptim_v2b)))] |
| @@ -153,4 +153,29 @@ impl<'d, T: Instance> Timer<'d, T> { | |||
| 153 | pub fn get_compare_value(&self) -> u16 { | 153 | pub fn get_compare_value(&self) -> u16 { |
| 154 | T::regs().cmp().read().cmp() | 154 | T::regs().cmp().read().cmp() |
| 155 | } | 155 | } |
| 156 | |||
| 157 | /// Enable the timer interrupt. | ||
| 158 | pub fn enable_interrupt(&self) { | ||
| 159 | T::regs().ier().modify(|w| w.set_arrmie(true)); | ||
| 160 | } | ||
| 161 | |||
| 162 | /// Disable the timer interrupt. | ||
| 163 | pub fn disable_interrupt(&self) { | ||
| 164 | T::regs().ier().modify(|w| w.set_arrmie(false)); | ||
| 165 | } | ||
| 166 | |||
| 167 | /// Check if the timer interrupt is enabled. | ||
| 168 | pub fn is_interrupt_enabled(&self) -> bool { | ||
| 169 | T::regs().ier().read().arrmie() | ||
| 170 | } | ||
| 171 | |||
| 172 | /// Check if the timer interrupt is pending. | ||
| 173 | pub fn is_interrupt_pending(&self) -> bool { | ||
| 174 | T::regs().isr().read().arrm() | ||
| 175 | } | ||
| 176 | |||
| 177 | /// Clear the timer interrupt. | ||
| 178 | pub fn clear_interrupt(&self) { | ||
| 179 | T::regs().icr().write(|w| w.set_arrmcf(true)); | ||
| 180 | } | ||
| 156 | } | 181 | } |
