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authorRasmus Melchior Jacobsen <[email protected]>2023-04-27 11:59:51 +0200
committerDario Nieuwenhuis <[email protected]>2023-05-01 22:42:36 +0200
commit45843034ec7c53f3f619bf1dcc6c145c428b0601 (patch)
treeeaa05b656c99b7339a815df65048d84db7265e20
parent775740590839904a6b16a8afaac9e7861226bf92 (diff)
Actually clear idle flag
-rw-r--r--embassy-stm32/src/usart/rx_ringbuffered.rs9
1 files changed, 8 insertions, 1 deletions
diff --git a/embassy-stm32/src/usart/rx_ringbuffered.rs b/embassy-stm32/src/usart/rx_ringbuffered.rs
index 8d3848269..33b750497 100644
--- a/embassy-stm32/src/usart/rx_ringbuffered.rs
+++ b/embassy-stm32/src/usart/rx_ringbuffered.rs
@@ -6,7 +6,7 @@ use embassy_hal_common::drop::OnDrop;
6use embassy_hal_common::PeripheralRef; 6use embassy_hal_common::PeripheralRef;
7use futures::future::{select, Either}; 7use futures::future::{select, Either};
8 8
9use super::{rdr, sr, BasicInstance, Error, UartRx}; 9use super::{clear_interrupt_flags, rdr, sr, BasicInstance, Error, UartRx};
10use crate::dma::ringbuffer::OverrunError; 10use crate::dma::ringbuffer::OverrunError;
11use crate::dma::RingBuffer; 11use crate::dma::RingBuffer;
12 12
@@ -213,6 +213,13 @@ impl<'d, T: BasicInstance, RxDma: super::RxDma<T>> RingBufferedUartRx<'d, T, RxD
213 // SAFETY: read only and we only use Rx related flags 213 // SAFETY: read only and we only use Rx related flags
214 let sr = unsafe { sr(r).read() }; 214 let sr = unsafe { sr(r).read() };
215 215
216 // SAFETY: only clears Rx related flags
217 unsafe {
218 // This read also clears the error and idle interrupt flags on v1.
219 rdr(r).read_volatile();
220 clear_interrupt_flags(r, sr);
221 }
222
216 let has_errors = sr.pe() || sr.fe() || sr.ne() || sr.ore(); 223 let has_errors = sr.pe() || sr.fe() || sr.ne() || sr.ore();
217 if has_errors { 224 if has_errors {
218 if sr.pe() { 225 if sr.pe() {