update metapac

5 files changed, 15 insertions, 11 deletions

diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index 81b8e2f94..08ccd35ae 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -70,7 +70,7 @@ rand_core = "0.6.3"
 sdio-host = "0.5.0"
 critical-section = "1.1"
 #stm32-metapac = { version = "15" }
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7c8b53413499acc3273b706318777a60f932d77a" }
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-4a0bcec33362449fb733c066936d25cbabab396a" }
 vcell = "0.1.3"
 bxcan = "0.7.0"
 nb = "1.0.0"
@@ -94,7 +94,7 @@ critical-section = { version = "1.1", features = ["std"] }
 proc-macro2 = "1.0.36"
 quote = "1.0.15"
 #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]}
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7c8b53413499acc3273b706318777a60f932d77a", default-features = false, features = ["metadata"]}
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-4a0bcec33362449fb733c066936d25cbabab396a", default-features = false, features = ["metadata"]}
 
 
 [features]
diff --git a/embassy-stm32/src/can/fd/peripheral.rs b/embassy-stm32/src/can/fd/peripheral.rs
index c5606b883..9b8802ff9 100644
--- a/embassy-stm32/src/can/fd/peripheral.rs
+++ b/embassy-stm32/src/can/fd/peripheral.rs
@@ -303,7 +303,9 @@ impl Registers {
         // Framework specific settings are set here
 
         // set TxBuffer to Queue Mode
-        self.regs.txbc().write(|w| w.set_tfqm(true));
+        self.regs
+            .txbc()
+            .write(|w| w.set_tfqm(crate::pac::can::vals::Tfqm::QUEUE));
 
         // set standard filters list size to 28
         // set extended filters list size to 8
diff --git a/embassy-stm32/src/opamp.rs b/embassy-stm32/src/opamp.rs
index ae8b3cacc..cf531e266 100644
--- a/embassy-stm32/src/opamp.rs
+++ b/embassy-stm32/src/opamp.rs
@@ -90,6 +90,7 @@ impl<'d, T: Instance> OpAmp<'d, T> {
         in_pin.set_as_analog();
         out_pin.set_as_analog();
 
+        // PGA_GAIN value may have different meaning in different MCU serials, use with caution.
         let (vm_sel, pga_gain) = match gain {
             OpAmpGain::Mul1 => (0b11, 0b00),
             OpAmpGain::Mul2 => (0b10, 0b00),
@@ -127,6 +128,7 @@ impl<'d, T: Instance> OpAmp<'d, T> {
         into_ref!(pin);
         pin.set_as_analog();
 
+        // PGA_GAIN value may have different meaning in different MCU serials, use with caution.
         let (vm_sel, pga_gain) = match gain {
             OpAmpGain::Mul1 => (0b11, 0b00),
             OpAmpGain::Mul2 => (0b10, 0b00),
diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs
index c8f580101..8530c5229 100644
--- a/embassy-stm32/src/timer/mod.rs
+++ b/embassy-stm32/src/timer/mod.rs
@@ -379,7 +379,7 @@ pub(crate) mod sealed {
 
             let regs = Self::regs_gp32();
             regs.psc().write(|r| r.set_psc(psc));
-            regs.arr().write(|r| r.set_arr(arr));
+            regs.arr().write_value(arr);
 
             regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY));
             regs.egr().write(|r| r.set_ug(true));
@@ -391,7 +391,7 @@ pub(crate) mod sealed {
             let timer_f = Self::frequency();
 
             let regs = Self::regs_gp32();
-            let arr = regs.arr().read().arr();
+            let arr = regs.arr().read();
             let psc = regs.psc().read().psc();
 
             timer_f / arr / (psc + 1)
@@ -399,22 +399,22 @@ pub(crate) mod sealed {
 
         /// Set comapre value for a channel.
         fn set_compare_value(&self, channel: Channel, value: u32) {
-            Self::regs_gp32().ccr(channel.index()).modify(|w| w.set_ccr(value));
+            Self::regs_gp32().ccr(channel.index()).write_value(value);
         }
 
         /// Get capture value for a channel.
         fn get_capture_value(&self, channel: Channel) -> u32 {
-            Self::regs_gp32().ccr(channel.index()).read().ccr()
+            Self::regs_gp32().ccr(channel.index()).read()
         }
 
         /// Get max compare value. This depends on the timer frequency and the clock frequency from RCC.
         fn get_max_compare_value(&self) -> u32 {
-            Self::regs_gp32().arr().read().arr()
+            Self::regs_gp32().arr().read()
         }
 
         /// Get compare value for a channel.
         fn get_compare_value(&self, channel: Channel) -> u32 {
-            Self::regs_gp32().ccr(channel.index()).read().ccr()
+            Self::regs_gp32().ccr(channel.index()).read()
         }
     }
 
diff --git a/examples/stm32h7/src/bin/low_level_timer_api.rs b/examples/stm32h7/src/bin/low_level_timer_api.rs
index cc508c3cf..049d9967d 100644
--- a/examples/stm32h7/src/bin/low_level_timer_api.rs
+++ b/examples/stm32h7/src/bin/low_level_timer_api.rs
@@ -113,11 +113,11 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> {
     }
 
     pub fn get_max_duty(&self) -> u32 {
-        T::regs_gp32().arr().read().arr()
+        T::regs_gp32().arr().read()
     }
 
     pub fn set_duty(&mut self, channel: Channel, duty: u32) {
         defmt::assert!(duty < self.get_max_duty());
-        T::regs_gp32().ccr(channel.index()).modify(|w| w.set_ccr(duty))
+        T::regs_gp32().ccr(channel.index()).write_value(duty)
     }
 }