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authorJacob Rosenthal <[email protected]>2021-11-01 01:15:04 -0700
committerJacob Rosenthal <[email protected]>2021-11-01 01:20:04 -0700
commit48673e27cd5e1f879d758533bec020bc2e7cc0c2 (patch)
treeddb843a9e947d5f4ce7296be27c889fb73c478f4
parent14dc524b84b28cfa6f8a9649c38173d6a1977a9e (diff)
fix max sequence length
-rw-r--r--embassy-nrf/src/pwm.rs21
1 files changed, 12 insertions, 9 deletions
diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs
index 5f3a4df83..19b653ca7 100644
--- a/embassy-nrf/src/pwm.rs
+++ b/embassy-nrf/src/pwm.rs
@@ -9,9 +9,10 @@ use embassy_hal_common::unborrow;
9use crate::gpio::sealed::Pin as _; 9use crate::gpio::sealed::Pin as _;
10use crate::gpio::OptionalPin as GpioOptionalPin; 10use crate::gpio::OptionalPin as GpioOptionalPin;
11use crate::interrupt::Interrupt; 11use crate::interrupt::Interrupt;
12use crate::pac;
12use crate::util::slice_in_ram_or; 13use crate::util::slice_in_ram_or;
13use crate::{pac, EASY_DMA_SIZE};
14 14
15/// PWM Base clock is system clock (16MHz) divided by prescaler
15#[derive(Debug, Eq, PartialEq, Clone, Copy)] 16#[derive(Debug, Eq, PartialEq, Clone, Copy)]
16pub enum Prescaler { 17pub enum Prescaler {
17 Div1, 18 Div1,
@@ -24,7 +25,7 @@ pub enum Prescaler {
24 Div128, 25 Div128,
25} 26}
26 27
27/// How a sequence is read from RAM and is spread to the compare register 28/// How the sequence values are distributed across the channels
28#[derive(Debug, Eq, PartialEq, Clone, Copy)] 29#[derive(Debug, Eq, PartialEq, Clone, Copy)]
29pub enum SequenceLoad { 30pub enum SequenceLoad {
30 /// Provided sequence will be used across all channels 31 /// Provided sequence will be used across all channels
@@ -42,7 +43,9 @@ pub enum SequenceLoad {
42 43
43#[derive(Debug, Eq, PartialEq, Clone, Copy)] 44#[derive(Debug, Eq, PartialEq, Clone, Copy)]
44pub enum CounterMode { 45pub enum CounterMode {
46 /// Up counter (edge-aligned PWM duty cycle)
45 Up, 47 Up,
48 /// Up and down counter (center-aligned PWM duty cycle)
46 UpAndDown, 49 UpAndDown,
47} 50}
48 51
@@ -53,13 +56,13 @@ pub struct Pwm<'d, T: Instance> {
53 56
54#[derive(Debug, Eq, PartialEq, Clone, Copy)] 57#[derive(Debug, Eq, PartialEq, Clone, Copy)]
55pub enum LoopMode { 58pub enum LoopMode {
56 // Repeat n additional times after the first 59 /// Repeat n additional times after the first
57 Additional(u16), 60 Additional(u16),
58 /// Repeat until `stop` is called 61 /// Repeat until `stop` is called.
59 Infinite, 62 Infinite,
60} 63}
61 64
62// Configure an infinite looping sequence for `simple_playback` 65/// Configure an infinite looping sequence for `simple_playback`
63pub struct LoopingConfig<'a> { 66pub struct LoopingConfig<'a> {
64 /// Selects up mode or up-and-down mode for the counter 67 /// Selects up mode or up-and-down mode for the counter
65 pub counter_mode: CounterMode, 68 pub counter_mode: CounterMode,
@@ -83,8 +86,8 @@ pub struct LoopingConfig<'a> {
83#[cfg_attr(feature = "defmt", derive(defmt::Format))] 86#[cfg_attr(feature = "defmt", derive(defmt::Format))]
84#[non_exhaustive] 87#[non_exhaustive]
85pub enum Error { 88pub enum Error {
86 Seq0BufferTooLong, 89 /// Max Sequence size is 32767
87 Seq1BufferTooLong, 90 SequenceTooLong,
88 /// EasyDMA can only read from data memory, read only buffers in flash will fail. 91 /// EasyDMA can only read from data memory, read only buffers in flash will fail.
89 DMABufferNotInDataMemory, 92 DMABufferNotInDataMemory,
90} 93}
@@ -171,8 +174,8 @@ impl<'d, T: Instance> Pwm<'d, T> {
171 ) -> Result<Self, Error> { 174 ) -> Result<Self, Error> {
172 slice_in_ram_or(config.sequence, Error::DMABufferNotInDataMemory)?; 175 slice_in_ram_or(config.sequence, Error::DMABufferNotInDataMemory)?;
173 176
174 if config.sequence.len() > EASY_DMA_SIZE { 177 if config.sequence.len() > 32767 {
175 return Err(Error::Seq0BufferTooLong); 178 return Err(Error::SequenceTooLong);
176 } 179 }
177 180
178 unborrow!(ch0, ch1, ch2, ch3); 181 unborrow!(ch0, ch1, ch2, ch3);