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authorchemicstry <[email protected]>2022-03-16 19:41:34 +0200
committerchemicstry <[email protected]>2022-03-16 19:41:34 +0200
commit48fc48ea7d0d73c7071e0f353c52eda10ad5a1b4 (patch)
tree079fe4b23ae7a89432498bbc4c646aecabc55aca
parentbf4a38ac0659c80f4dd28a47f06d629f23eda45e (diff)
Fix BDMA
-rw-r--r--embassy-stm32/src/dma/bdma.rs25
-rw-r--r--embassy-stm32/src/dma/mod.rs2
2 files changed, 23 insertions, 4 deletions
diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs
index 79b114e6a..30d2a0b97 100644
--- a/embassy-stm32/src/dma/bdma.rs
+++ b/embassy-stm32/src/dma/bdma.rs
@@ -11,7 +11,7 @@ use crate::dma::Request;
11use crate::pac; 11use crate::pac;
12use crate::pac::bdma::vals; 12use crate::pac::bdma::vals;
13 13
14use super::{Word, WordSize}; 14use super::{TransferOptions, Word, WordSize};
15 15
16impl From<WordSize> for vals::Size { 16impl From<WordSize> for vals::Size {
17 fn from(raw: WordSize) -> Self { 17 fn from(raw: WordSize) -> Self {
@@ -55,7 +55,7 @@ foreach_dma_channel! {
55 ($channel_peri:ident, $dma_peri:ident, bdma, $channel_num:expr, $index:expr, $dmamux:tt) => { 55 ($channel_peri:ident, $dma_peri:ident, bdma, $channel_num:expr, $index:expr, $dmamux:tt) => {
56 impl crate::dma::sealed::Channel for crate::peripherals::$channel_peri { 56 impl crate::dma::sealed::Channel for crate::peripherals::$channel_peri {
57 57
58 unsafe fn start_write<W: Word>(&mut self, _request: Request, buf: *const[W], reg_addr: *mut W) { 58 unsafe fn start_write<W: Word>(&mut self, _request: Request, buf: *const[W], reg_addr: *mut W, options: TransferOptions) {
59 let (ptr, len) = super::slice_ptr_parts(buf); 59 let (ptr, len) = super::slice_ptr_parts(buf);
60 low_level_api::start_transfer( 60 low_level_api::start_transfer(
61 pac::$dma_peri, 61 pac::$dma_peri,
@@ -68,6 +68,7 @@ foreach_dma_channel! {
68 len, 68 len,
69 true, 69 true,
70 vals::Size::from(W::bits()), 70 vals::Size::from(W::bits()),
71 options,
71 #[cfg(dmamux)] 72 #[cfg(dmamux)]
72 <Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS, 73 <Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
73 #[cfg(dmamux)] 74 #[cfg(dmamux)]
@@ -76,7 +77,7 @@ foreach_dma_channel! {
76 } 77 }
77 78
78 79
79 unsafe fn start_write_repeated<W: Word>(&mut self, _request: Request, repeated: W, count: usize, reg_addr: *mut W) { 80 unsafe fn start_write_repeated<W: Word>(&mut self, _request: Request, repeated: W, count: usize, reg_addr: *mut W, options: TransferOptions) {
80 let buf = [repeated]; 81 let buf = [repeated];
81 low_level_api::start_transfer( 82 low_level_api::start_transfer(
82 pac::$dma_peri, 83 pac::$dma_peri,
@@ -89,6 +90,7 @@ foreach_dma_channel! {
89 count, 90 count,
90 false, 91 false,
91 vals::Size::from(W::bits()), 92 vals::Size::from(W::bits()),
93 options,
92 #[cfg(dmamux)] 94 #[cfg(dmamux)]
93 <Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS, 95 <Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
94 #[cfg(dmamux)] 96 #[cfg(dmamux)]
@@ -96,7 +98,7 @@ foreach_dma_channel! {
96 ) 98 )
97 } 99 }
98 100
99 unsafe fn start_read<W: Word>(&mut self, _request: Request, reg_addr: *const W, buf: *mut [W]) { 101 unsafe fn start_read<W: Word>(&mut self, _request: Request, reg_addr: *const W, buf: *mut [W], options: TransferOptions) {
100 let (ptr, len) = super::slice_ptr_parts_mut(buf); 102 let (ptr, len) = super::slice_ptr_parts_mut(buf);
101 low_level_api::start_transfer( 103 low_level_api::start_transfer(
102 pac::$dma_peri, 104 pac::$dma_peri,
@@ -109,6 +111,7 @@ foreach_dma_channel! {
109 len, 111 len,
110 true, 112 true,
111 vals::Size::from(W::bits()), 113 vals::Size::from(W::bits()),
114 options,
112 #[cfg(dmamux)] 115 #[cfg(dmamux)]
113 <Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS, 116 <Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
114 #[cfg(dmamux)] 117 #[cfg(dmamux)]
@@ -155,9 +158,23 @@ mod low_level_api {
155 mem_len: usize, 158 mem_len: usize,
156 incr_mem: bool, 159 incr_mem: bool,
157 data_size: vals::Size, 160 data_size: vals::Size,
161 options: TransferOptions,
158 #[cfg(dmamux)] dmamux_regs: pac::dmamux::Dmamux, 162 #[cfg(dmamux)] dmamux_regs: pac::dmamux::Dmamux,
159 #[cfg(dmamux)] dmamux_ch_num: u8, 163 #[cfg(dmamux)] dmamux_ch_num: u8,
160 ) { 164 ) {
165 assert!(
166 options.mburst == crate::dma::Burst::Single,
167 "Burst mode not supported"
168 );
169 assert!(
170 options.pburst == crate::dma::Burst::Single,
171 "Burst mode not supported"
172 );
173 assert!(
174 options.flow_ctrl == crate::dma::FlowControl::Dma,
175 "Peripheral flow control not supported"
176 );
177
161 let ch = dma.ch(channel_number as _); 178 let ch = dma.ch(channel_number as _);
162 179
163 reset_status(dma, channel_number); 180 reset_status(dma, channel_number);
diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs
index f5b05589b..8e9823772 100644
--- a/embassy-stm32/src/dma/mod.rs
+++ b/embassy-stm32/src/dma/mod.rs
@@ -129,6 +129,7 @@ impl Word for u32 {
129 } 129 }
130} 130}
131 131
132#[derive(Debug, PartialEq)]
132pub enum Burst { 133pub enum Burst {
133 /// Single transfer 134 /// Single transfer
134 Single, 135 Single,
@@ -140,6 +141,7 @@ pub enum Burst {
140 Incr16, 141 Incr16,
141} 142}
142 143
144#[derive(Debug, PartialEq)]
143pub enum FlowControl { 145pub enum FlowControl {
144 /// Flow control by DMA 146 /// Flow control by DMA
145 Dma, 147 Dma,