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authorDario Nieuwenhuis <[email protected]>2024-02-13 20:47:42 +0100
committerGitHub <[email protected]>2024-02-13 20:47:42 +0100
commit4c7ed5e0556e7edbf7020b4cac9f301ad6152905 (patch)
tree0137498a23b9ae116460c0e9c4b467e8d0e82ed3
parentee4afa42808109efa45a472fd29e4c772550a0fd (diff)
parentf0045b92173a46e45be1724d28e1a59045c9c3f6 (diff)
Merge pull request #2565 from caleb-garrett/hmac
STM32 HMAC
-rw-r--r--embassy-stm32/src/hash/mod.rs75
-rw-r--r--examples/stm32f7/Cargo.toml1
-rw-r--r--examples/stm32f7/src/bin/hash.rs24
-rw-r--r--tests/stm32/Cargo.toml1
-rw-r--r--tests/stm32/src/bin/hash.rs26
5 files changed, 110 insertions, 17 deletions
diff --git a/embassy-stm32/src/hash/mod.rs b/embassy-stm32/src/hash/mod.rs
index f0c2c839a..b47814f8b 100644
--- a/embassy-stm32/src/hash/mod.rs
+++ b/embassy-stm32/src/hash/mod.rs
@@ -100,8 +100,9 @@ pub enum DataType {
100 100
101/// Stores the state of the HASH peripheral for suspending/resuming 101/// Stores the state of the HASH peripheral for suspending/resuming
102/// digest calculation. 102/// digest calculation.
103pub struct Context { 103pub struct Context<'c> {
104 first_word_sent: bool, 104 first_word_sent: bool,
105 key_sent: bool,
105 buffer: [u8; HASH_BUFFER_LEN], 106 buffer: [u8; HASH_BUFFER_LEN],
106 buflen: usize, 107 buflen: usize,
107 algo: Algorithm, 108 algo: Algorithm,
@@ -110,8 +111,11 @@ pub struct Context {
110 str: u32, 111 str: u32,
111 cr: u32, 112 cr: u32,
112 csr: [u32; NUM_CONTEXT_REGS], 113 csr: [u32; NUM_CONTEXT_REGS],
114 key: HmacKey<'c>,
113} 115}
114 116
117type HmacKey<'k> = Option<&'k [u8]>;
118
115/// HASH driver. 119/// HASH driver.
116pub struct Hash<'d, T: Instance, D = NoDma> { 120pub struct Hash<'d, T: Instance, D = NoDma> {
117 _peripheral: PeripheralRef<'d, T>, 121 _peripheral: PeripheralRef<'d, T>,
@@ -140,10 +144,11 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
140 } 144 }
141 145
142 /// Starts computation of a new hash and returns the saved peripheral state. 146 /// Starts computation of a new hash and returns the saved peripheral state.
143 pub fn start(&mut self, algorithm: Algorithm, format: DataType) -> Context { 147 pub fn start<'c>(&mut self, algorithm: Algorithm, format: DataType, key: HmacKey<'c>) -> Context<'c> {
144 // Define a context for this new computation. 148 // Define a context for this new computation.
145 let mut ctx = Context { 149 let mut ctx = Context {
146 first_word_sent: false, 150 first_word_sent: false,
151 key_sent: false,
147 buffer: [0; HASH_BUFFER_LEN], 152 buffer: [0; HASH_BUFFER_LEN],
148 buflen: 0, 153 buflen: 0,
149 algo: algorithm, 154 algo: algorithm,
@@ -152,6 +157,7 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
152 str: 0, 157 str: 0,
153 cr: 0, 158 cr: 0,
154 csr: [0; NUM_CONTEXT_REGS], 159 csr: [0; NUM_CONTEXT_REGS],
160 key,
155 }; 161 };
156 162
157 // Set the data type in the peripheral. 163 // Set the data type in the peripheral.
@@ -181,6 +187,14 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
181 #[cfg(any(hash_v3, hash_v4))] 187 #[cfg(any(hash_v3, hash_v4))]
182 T::regs().cr().modify(|w| w.set_algo(ctx.algo as u8)); 188 T::regs().cr().modify(|w| w.set_algo(ctx.algo as u8));
183 189
190 // Configure HMAC mode if a key is provided.
191 if let Some(key) = ctx.key {
192 T::regs().cr().modify(|w| w.set_mode(true));
193 if key.len() > 64 {
194 T::regs().cr().modify(|w| w.set_lkey(true));
195 }
196 }
197
184 T::regs().cr().modify(|w| w.set_init(true)); 198 T::regs().cr().modify(|w| w.set_init(true));
185 199
186 // Store and return the state of the peripheral. 200 // Store and return the state of the peripheral.
@@ -191,18 +205,30 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
191 /// Restores the peripheral state using the given context, 205 /// Restores the peripheral state using the given context,
192 /// then updates the state with the provided data. 206 /// then updates the state with the provided data.
193 /// Peripheral state is saved upon return. 207 /// Peripheral state is saved upon return.
194 pub fn update_blocking(&mut self, ctx: &mut Context, input: &[u8]) { 208 pub fn update_blocking<'c>(&mut self, ctx: &mut Context<'c>, input: &[u8]) {
209 // Restore the peripheral state.
210 self.load_context(&ctx);
211
212 // Load the HMAC key if provided.
213 if !ctx.key_sent {
214 if let Some(key) = ctx.key {
215 self.accumulate_blocking(key);
216 T::regs().str().write(|w| w.set_dcal(true));
217 // Block waiting for digest.
218 while !T::regs().sr().read().dinis() {}
219 }
220 ctx.key_sent = true;
221 }
222
195 let mut data_waiting = input.len() + ctx.buflen; 223 let mut data_waiting = input.len() + ctx.buflen;
196 if data_waiting < DIGEST_BLOCK_SIZE || (data_waiting < ctx.buffer.len() && !ctx.first_word_sent) { 224 if data_waiting < DIGEST_BLOCK_SIZE || (data_waiting < ctx.buffer.len() && !ctx.first_word_sent) {
197 // There isn't enough data to digest a block, so append it to the buffer. 225 // There isn't enough data to digest a block, so append it to the buffer.
198 ctx.buffer[ctx.buflen..ctx.buflen + input.len()].copy_from_slice(input); 226 ctx.buffer[ctx.buflen..ctx.buflen + input.len()].copy_from_slice(input);
199 ctx.buflen += input.len(); 227 ctx.buflen += input.len();
228 self.store_context(ctx);
200 return; 229 return;
201 } 230 }
202 231
203 // Restore the peripheral state.
204 self.load_context(&ctx);
205
206 let mut ilen_remaining = input.len(); 232 let mut ilen_remaining = input.len();
207 let mut input_start = 0; 233 let mut input_start = 0;
208 234
@@ -261,21 +287,30 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
261 /// then updates the state with the provided data. 287 /// then updates the state with the provided data.
262 /// Peripheral state is saved upon return. 288 /// Peripheral state is saved upon return.
263 #[cfg(hash_v2)] 289 #[cfg(hash_v2)]
264 pub async fn update(&mut self, ctx: &mut Context, input: &[u8]) 290 pub async fn update<'c>(&mut self, ctx: &mut Context<'c>, input: &[u8])
265 where 291 where
266 D: crate::hash::Dma<T>, 292 D: crate::hash::Dma<T>,
267 { 293 {
294 // Restore the peripheral state.
295 self.load_context(&ctx);
296
297 // Load the HMAC key if provided.
298 if !ctx.key_sent {
299 if let Some(key) = ctx.key {
300 self.accumulate(key).await;
301 }
302 ctx.key_sent = true;
303 }
304
268 let data_waiting = input.len() + ctx.buflen; 305 let data_waiting = input.len() + ctx.buflen;
269 if data_waiting < DIGEST_BLOCK_SIZE { 306 if data_waiting < DIGEST_BLOCK_SIZE {
270 // There isn't enough data to digest a block, so append it to the buffer. 307 // There isn't enough data to digest a block, so append it to the buffer.
271 ctx.buffer[ctx.buflen..ctx.buflen + input.len()].copy_from_slice(input); 308 ctx.buffer[ctx.buflen..ctx.buflen + input.len()].copy_from_slice(input);
272 ctx.buflen += input.len(); 309 ctx.buflen += input.len();
310 self.store_context(ctx);
273 return; 311 return;
274 } 312 }
275 313
276 // Restore the peripheral state.
277 self.load_context(&ctx);
278
279 // Enable multiple DMA transfers. 314 // Enable multiple DMA transfers.
280 T::regs().cr().modify(|w| w.set_mdmat(true)); 315 T::regs().cr().modify(|w| w.set_mdmat(true));
281 316
@@ -319,7 +354,7 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
319 /// The digest buffer must be large enough to accomodate a digest for the selected algorithm. 354 /// The digest buffer must be large enough to accomodate a digest for the selected algorithm.
320 /// The largest returned digest size is 128 bytes for SHA-512. 355 /// The largest returned digest size is 128 bytes for SHA-512.
321 /// Panics if the supplied digest buffer is too short. 356 /// Panics if the supplied digest buffer is too short.
322 pub fn finish_blocking(&mut self, mut ctx: Context, digest: &mut [u8]) -> usize { 357 pub fn finish_blocking<'c>(&mut self, mut ctx: Context<'c>, digest: &mut [u8]) -> usize {
323 // Restore the peripheral state. 358 // Restore the peripheral state.
324 self.load_context(&ctx); 359 self.load_context(&ctx);
325 360
@@ -330,7 +365,14 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
330 //Start the digest calculation. 365 //Start the digest calculation.
331 T::regs().str().write(|w| w.set_dcal(true)); 366 T::regs().str().write(|w| w.set_dcal(true));
332 367
333 // Block waiting for digest. 368 // Load the HMAC key if provided.
369 if let Some(key) = ctx.key {
370 while !T::regs().sr().read().dinis() {}
371 self.accumulate_blocking(key);
372 T::regs().str().write(|w| w.set_dcal(true));
373 }
374
375 // Block until digest computation is complete.
334 while !T::regs().sr().read().dcis() {} 376 while !T::regs().sr().read().dcis() {}
335 377
336 // Return the digest. 378 // Return the digest.
@@ -370,7 +412,7 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
370 /// The largest returned digest size is 128 bytes for SHA-512. 412 /// The largest returned digest size is 128 bytes for SHA-512.
371 /// Panics if the supplied digest buffer is too short. 413 /// Panics if the supplied digest buffer is too short.
372 #[cfg(hash_v2)] 414 #[cfg(hash_v2)]
373 pub async fn finish(&mut self, mut ctx: Context, digest: &mut [u8]) -> usize 415 pub async fn finish<'c>(&mut self, mut ctx: Context<'c>, digest: &mut [u8]) -> usize
374 where 416 where
375 D: crate::hash::Dma<T>, 417 D: crate::hash::Dma<T>,
376 { 418 {
@@ -384,6 +426,11 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
384 self.accumulate(&ctx.buffer[0..ctx.buflen]).await; 426 self.accumulate(&ctx.buffer[0..ctx.buflen]).await;
385 ctx.buflen = 0; 427 ctx.buflen = 0;
386 428
429 // Load the HMAC key if provided.
430 if let Some(key) = ctx.key {
431 self.accumulate(key).await;
432 }
433
387 // Wait for completion. 434 // Wait for completion.
388 poll_fn(|cx| { 435 poll_fn(|cx| {
389 // Check if already done. 436 // Check if already done.
@@ -484,7 +531,7 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
484 } 531 }
485 532
486 /// Save the peripheral state to a context. 533 /// Save the peripheral state to a context.
487 fn store_context(&mut self, ctx: &mut Context) { 534 fn store_context<'c>(&mut self, ctx: &mut Context<'c>) {
488 // Block waiting for data in ready. 535 // Block waiting for data in ready.
489 while !T::regs().sr().read().dinis() {} 536 while !T::regs().sr().read().dinis() {}
490 537
diff --git a/examples/stm32f7/Cargo.toml b/examples/stm32f7/Cargo.toml
index a612c2554..736e81723 100644
--- a/examples/stm32f7/Cargo.toml
+++ b/examples/stm32f7/Cargo.toml
@@ -29,6 +29,7 @@ critical-section = "1.1"
29embedded-storage = "0.3.1" 29embedded-storage = "0.3.1"
30static_cell = "2" 30static_cell = "2"
31sha2 = { version = "0.10.8", default-features = false } 31sha2 = { version = "0.10.8", default-features = false }
32hmac = "0.12.1"
32 33
33[profile.release] 34[profile.release]
34debug = 2 35debug = 2
diff --git a/examples/stm32f7/src/bin/hash.rs b/examples/stm32f7/src/bin/hash.rs
index 96e50f84b..c2d1a7158 100644
--- a/examples/stm32f7/src/bin/hash.rs
+++ b/examples/stm32f7/src/bin/hash.rs
@@ -6,9 +6,12 @@ use embassy_executor::Spawner;
6use embassy_stm32::hash::*; 6use embassy_stm32::hash::*;
7use embassy_stm32::{bind_interrupts, hash, peripherals, Config}; 7use embassy_stm32::{bind_interrupts, hash, peripherals, Config};
8use embassy_time::Instant; 8use embassy_time::Instant;
9use hmac::{Hmac, Mac};
9use sha2::{Digest, Sha256}; 10use sha2::{Digest, Sha256};
10use {defmt_rtt as _, panic_probe as _}; 11use {defmt_rtt as _, panic_probe as _};
11 12
13type HmacSha256 = Hmac<Sha256>;
14
12bind_interrupts!(struct Irqs { 15bind_interrupts!(struct Irqs {
13 HASH_RNG => hash::InterruptHandler<peripherals::HASH>; 16 HASH_RNG => hash::InterruptHandler<peripherals::HASH>;
14}); 17});
@@ -26,7 +29,7 @@ async fn main(_spawner: Spawner) -> ! {
26 let hw_start_time = Instant::now(); 29 let hw_start_time = Instant::now();
27 30
28 // Compute a digest in hardware. 31 // Compute a digest in hardware.
29 let mut context = hw_hasher.start(Algorithm::SHA256, DataType::Width8); 32 let mut context = hw_hasher.start(Algorithm::SHA256, DataType::Width8, None);
30 hw_hasher.update(&mut context, test_1).await; 33 hw_hasher.update(&mut context, test_1).await;
31 hw_hasher.update(&mut context, test_2).await; 34 hw_hasher.update(&mut context, test_2).await;
32 let mut hw_digest: [u8; 32] = [0; 32]; 35 let mut hw_digest: [u8; 32] = [0; 32];
@@ -52,5 +55,24 @@ async fn main(_spawner: Spawner) -> ! {
52 info!("Software Execution Time: {:?}", sw_execution_time); 55 info!("Software Execution Time: {:?}", sw_execution_time);
53 assert_eq!(hw_digest, sw_digest[..]); 56 assert_eq!(hw_digest, sw_digest[..]);
54 57
58 let hmac_key: [u8; 64] = [0x55; 64];
59
60 // Compute HMAC in hardware.
61 let mut sha256hmac_context = hw_hasher.start(Algorithm::SHA256, DataType::Width8, Some(&hmac_key));
62 hw_hasher.update(&mut sha256hmac_context, test_1).await;
63 hw_hasher.update(&mut sha256hmac_context, test_2).await;
64 let mut hw_hmac: [u8; 32] = [0; 32];
65 hw_hasher.finish(sha256hmac_context, &mut hw_hmac).await;
66
67 // Compute HMAC in software.
68 let mut sw_mac = HmacSha256::new_from_slice(&hmac_key).unwrap();
69 sw_mac.update(test_1);
70 sw_mac.update(test_2);
71 let sw_hmac = sw_mac.finalize().into_bytes();
72
73 info!("Hardware HMAC: {:?}", hw_hmac);
74 info!("Software HMAC: {:?}", sw_hmac[..]);
75 assert_eq!(hw_hmac, sw_hmac[..]);
76
55 loop {} 77 loop {}
56} 78}
diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml
index fc4420687..d94045737 100644
--- a/tests/stm32/Cargo.toml
+++ b/tests/stm32/Cargo.toml
@@ -76,6 +76,7 @@ portable-atomic = { version = "1.5", features = [] }
76 76
77chrono = { version = "^0.4", default-features = false, optional = true} 77chrono = { version = "^0.4", default-features = false, optional = true}
78sha2 = { version = "0.10.8", default-features = false } 78sha2 = { version = "0.10.8", default-features = false }
79hmac = "0.12.1"
79 80
80# BEGIN TESTS 81# BEGIN TESTS
81# Generated by gen_test.py. DO NOT EDIT. 82# Generated by gen_test.py. DO NOT EDIT.
diff --git a/tests/stm32/src/bin/hash.rs b/tests/stm32/src/bin/hash.rs
index cfcf3d976..d1cfac5ce 100644
--- a/tests/stm32/src/bin/hash.rs
+++ b/tests/stm32/src/bin/hash.rs
@@ -9,9 +9,12 @@ use embassy_executor::Spawner;
9use embassy_stm32::dma::NoDma; 9use embassy_stm32::dma::NoDma;
10use embassy_stm32::hash::*; 10use embassy_stm32::hash::*;
11use embassy_stm32::{bind_interrupts, hash, peripherals}; 11use embassy_stm32::{bind_interrupts, hash, peripherals};
12use hmac::{Hmac, Mac};
12use sha2::{Digest, Sha224, Sha256}; 13use sha2::{Digest, Sha224, Sha256};
13use {defmt_rtt as _, panic_probe as _}; 14use {defmt_rtt as _, panic_probe as _};
14 15
16type HmacSha256 = Hmac<Sha256>;
17
15#[cfg(any(feature = "stm32l4a6zg", feature = "stm32h755zi", feature = "stm32h753zi"))] 18#[cfg(any(feature = "stm32l4a6zg", feature = "stm32h755zi", feature = "stm32h753zi"))]
16bind_interrupts!(struct Irqs { 19bind_interrupts!(struct Irqs {
17 HASH_RNG => hash::InterruptHandler<peripherals::HASH>; 20 HASH_RNG => hash::InterruptHandler<peripherals::HASH>;
@@ -38,11 +41,11 @@ async fn main(_spawner: Spawner) {
38 let test_3: &[u8] = b"a.ewtkluGWEBR.KAJRBTA,RMNRBG,FDMGB.kger.tkasjrbt.akrjtba.krjtba.ktmyna,nmbvtyliasd;gdrtba,sfvs.kgjzshd.gkbsr.tksejb.SDkfBSE.gkfgb>ESkfbSE>gkJSBESE>kbSE>fk"; 41 let test_3: &[u8] = b"a.ewtkluGWEBR.KAJRBTA,RMNRBG,FDMGB.kger.tkasjrbt.akrjtba.krjtba.ktmyna,nmbvtyliasd;gdrtba,sfvs.kgjzshd.gkbsr.tksejb.SDkfBSE.gkfgb>ESkfbSE>gkJSBESE>kbSE>fk";
39 42
40 // Start an SHA-256 digest. 43 // Start an SHA-256 digest.
41 let mut sha256context = hw_hasher.start(Algorithm::SHA256, DataType::Width8); 44 let mut sha256context = hw_hasher.start(Algorithm::SHA256, DataType::Width8, None);
42 hw_hasher.update_blocking(&mut sha256context, test_1); 45 hw_hasher.update_blocking(&mut sha256context, test_1);
43 46
44 // Interrupt the SHA-256 digest to compute an SHA-224 digest. 47 // Interrupt the SHA-256 digest to compute an SHA-224 digest.
45 let mut sha224context = hw_hasher.start(Algorithm::SHA224, DataType::Width8); 48 let mut sha224context = hw_hasher.start(Algorithm::SHA224, DataType::Width8, None);
46 hw_hasher.update_blocking(&mut sha224context, test_3); 49 hw_hasher.update_blocking(&mut sha224context, test_3);
47 let mut sha224_digest_buffer: [u8; 28] = [0; 28]; 50 let mut sha224_digest_buffer: [u8; 28] = [0; 28];
48 let _ = hw_hasher.finish_blocking(sha224context, &mut sha224_digest_buffer); 51 let _ = hw_hasher.finish_blocking(sha224context, &mut sha224_digest_buffer);
@@ -73,6 +76,25 @@ async fn main(_spawner: Spawner) {
73 info!("Software SHA-256 Digest: {:?}", sw_sha224_digest[..]); 76 info!("Software SHA-256 Digest: {:?}", sw_sha224_digest[..]);
74 defmt::assert!(sha224_digest_buffer == sw_sha224_digest[..]); 77 defmt::assert!(sha224_digest_buffer == sw_sha224_digest[..]);
75 78
79 let hmac_key: [u8; 64] = [0x55; 64];
80
81 // Compute HMAC in hardware.
82 let mut sha256hmac_context = hw_hasher.start(Algorithm::SHA256, DataType::Width8, Some(&hmac_key));
83 hw_hasher.update_blocking(&mut sha256hmac_context, test_1);
84 hw_hasher.update_blocking(&mut sha256hmac_context, test_2);
85 let mut hw_hmac: [u8; 32] = [0; 32];
86 hw_hasher.finish_blocking(sha256hmac_context, &mut hw_hmac);
87
88 // Compute HMAC in software.
89 let mut sw_mac = HmacSha256::new_from_slice(&hmac_key).unwrap();
90 sw_mac.update(test_1);
91 sw_mac.update(test_2);
92 let sw_hmac = sw_mac.finalize().into_bytes();
93
94 info!("Hardware HMAC: {:?}", hw_hmac);
95 info!("Software HMAC: {:?}", sw_hmac[..]);
96 defmt::assert!(hw_hmac == sw_hmac[..]);
97
76 info!("Test OK"); 98 info!("Test OK");
77 cortex_m::asm::bkpt(); 99 cortex_m::asm::bkpt();
78} 100}