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authorLiu Hancheng <[email protected]>2025-01-04 22:10:47 +0800
committerLiu Hancheng <[email protected]>2025-01-04 22:10:47 +0800
commit50e98a9a58bf7f3356aa8261ba301d4d1c6440aa (patch)
tree6960e9afc8e9c7f9b1c3a3acb36fa809d9dc0679
parent03dd50316c6f41a2bfab62289aa22abdaaa3189d (diff)
refactor: update DMA transfer functions to support separate memory and peripheral word types
-rw-r--r--embassy-stm32/src/dma/gpdma.rs32
-rw-r--r--embassy-stm32/src/timer/simple_pwm.rs4
2 files changed, 21 insertions, 15 deletions
diff --git a/embassy-stm32/src/dma/gpdma.rs b/embassy-stm32/src/dma/gpdma.rs
index a877bb8d4..e57bf04ed 100644
--- a/embassy-stm32/src/dma/gpdma.rs
+++ b/embassy-stm32/src/dma/gpdma.rs
@@ -143,27 +143,28 @@ impl<'a> Transfer<'a> {
143 buf.len(), 143 buf.len(),
144 true, 144 true,
145 W::size(), 145 W::size(),
146 W::size(),
146 options, 147 options,
147 ) 148 )
148 } 149 }
149 150
150 /// Create a new write DMA transfer (memory to peripheral). 151 /// Create a new write DMA transfer (memory to peripheral).
151 pub unsafe fn new_write<W: Word>( 152 pub unsafe fn new_write<MW: Word, PW: Word>(
152 channel: impl Peripheral<P = impl Channel> + 'a, 153 channel: impl Peripheral<P = impl Channel> + 'a,
153 request: Request, 154 request: Request,
154 buf: &'a [W], 155 buf: &'a [MW],
155 peri_addr: *mut W, 156 peri_addr: *mut PW,
156 options: TransferOptions, 157 options: TransferOptions,
157 ) -> Self { 158 ) -> Self {
158 Self::new_write_raw(channel, request, buf, peri_addr, options) 159 Self::new_write_raw(channel, request, buf, peri_addr, options)
159 } 160 }
160 161
161 /// Create a new write DMA transfer (memory to peripheral), using raw pointers. 162 /// Create a new write DMA transfer (memory to peripheral), using raw pointers.
162 pub unsafe fn new_write_raw<W: Word>( 163 pub unsafe fn new_write_raw<MW: Word, PW: Word>(
163 channel: impl Peripheral<P = impl Channel> + 'a, 164 channel: impl Peripheral<P = impl Channel> + 'a,
164 request: Request, 165 request: Request,
165 buf: *const [W], 166 buf: *const [MW],
166 peri_addr: *mut W, 167 peri_addr: *mut PW,
167 options: TransferOptions, 168 options: TransferOptions,
168 ) -> Self { 169 ) -> Self {
169 into_ref!(channel); 170 into_ref!(channel);
@@ -173,21 +174,22 @@ impl<'a> Transfer<'a> {
173 request, 174 request,
174 Dir::MemoryToPeripheral, 175 Dir::MemoryToPeripheral,
175 peri_addr as *const u32, 176 peri_addr as *const u32,
176 buf as *const W as *mut u32, 177 buf as *const MW as *mut u32,
177 buf.len(), 178 buf.len(),
178 true, 179 true,
179 W::size(), 180 MW::size(),
181 PW::size(),
180 options, 182 options,
181 ) 183 )
182 } 184 }
183 185
184 /// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly. 186 /// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly.
185 pub unsafe fn new_write_repeated<W: Word>( 187 pub unsafe fn new_write_repeated<MW: Word, PW: Word>(
186 channel: impl Peripheral<P = impl Channel> + 'a, 188 channel: impl Peripheral<P = impl Channel> + 'a,
187 request: Request, 189 request: Request,
188 repeated: &'a W, 190 repeated: &'a MW,
189 count: usize, 191 count: usize,
190 peri_addr: *mut W, 192 peri_addr: *mut PW,
191 options: TransferOptions, 193 options: TransferOptions,
192 ) -> Self { 194 ) -> Self {
193 into_ref!(channel); 195 into_ref!(channel);
@@ -197,10 +199,11 @@ impl<'a> Transfer<'a> {
197 request, 199 request,
198 Dir::MemoryToPeripheral, 200 Dir::MemoryToPeripheral,
199 peri_addr as *const u32, 201 peri_addr as *const u32,
200 repeated as *const W as *mut u32, 202 repeated as *const MW as *mut u32,
201 count, 203 count,
202 false, 204 false,
203 W::size(), 205 MW::size(),
206 PW::size(),
204 options, 207 options,
205 ) 208 )
206 } 209 }
@@ -214,6 +217,7 @@ impl<'a> Transfer<'a> {
214 mem_len: usize, 217 mem_len: usize,
215 incr_mem: bool, 218 incr_mem: bool,
216 data_size: WordSize, 219 data_size: WordSize,
220 dst_size: WordSize,
217 _options: TransferOptions, 221 _options: TransferOptions,
218 ) -> Self { 222 ) -> Self {
219 // BNDT is specified as bytes, not as number of transfers. 223 // BNDT is specified as bytes, not as number of transfers.
@@ -234,7 +238,7 @@ impl<'a> Transfer<'a> {
234 ch.llr().write(|_| {}); // no linked list 238 ch.llr().write(|_| {}); // no linked list
235 ch.tr1().write(|w| { 239 ch.tr1().write(|w| {
236 w.set_sdw(data_size.into()); 240 w.set_sdw(data_size.into());
237 w.set_ddw(data_size.into()); 241 w.set_ddw(dst_size.into());
238 w.set_sinc(dir == Dir::MemoryToPeripheral && incr_mem); 242 w.set_sinc(dir == Dir::MemoryToPeripheral && incr_mem);
239 w.set_dinc(dir == Dir::PeripheralToMemory && incr_mem); 243 w.set_dinc(dir == Dir::PeripheralToMemory && incr_mem);
240 }); 244 });
diff --git a/embassy-stm32/src/timer/simple_pwm.rs b/embassy-stm32/src/timer/simple_pwm.rs
index 757536c2d..5b3cf8fea 100644
--- a/embassy-stm32/src/timer/simple_pwm.rs
+++ b/embassy-stm32/src/timer/simple_pwm.rs
@@ -416,8 +416,10 @@ macro_rules! impl_waveform_chx {
416 } 416 }
417 #[cfg(not(any(stm32l0)))] 417 #[cfg(not(any(stm32l0)))]
418 TimerBits::Bits32 => { 418 TimerBits::Bits32 => {
419 #[cfg(not(any(bdma, gpdma)))]
420 panic!("unsupported timer bits");
421
419 #[cfg(any(bdma, gpdma))] 422 #[cfg(any(bdma, gpdma))]
420 panic("unsupported timer bits");
421 Transfer::new_write( 423 Transfer::new_write(
422 &mut dma, 424 &mut dma,
423 req, 425 req,