diff options
| author | Vincent Stakenburg <[email protected]> | 2022-08-19 15:27:11 +0200 |
|---|---|---|
| committer | Vincent Stakenburg <[email protected]> | 2022-08-19 15:27:11 +0200 |
| commit | 51359e7d24051c0fa70cf17cd2b9eb3cfceb67de (patch) | |
| tree | f4adc4234e58a3ad045fa73f5bea0b49e18447e2 | |
| parent | a833e02363dac8ba5b9a421804acc8b2b6bd751c (diff) | |
fix lpuart implementation when there isn't one present
| -rw-r--r-- | embassy-stm32/src/usart/mod.rs | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 511850971..2ad85c675 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs | |||
| @@ -6,7 +6,10 @@ use embassy_hal_common::{into_ref, PeripheralRef}; | |||
| 6 | 6 | ||
| 7 | use crate::dma::NoDma; | 7 | use crate::dma::NoDma; |
| 8 | use crate::gpio::sealed::AFType; | 8 | use crate::gpio::sealed::AFType; |
| 9 | use crate::pac::lpuart::{regs, vals}; | 9 | #[cfg(any(lpuart_v1, lpuart_v2))] |
| 10 | use crate::pac::lpuart::{regs, vals, Lpuart as Regs}; | ||
| 11 | #[cfg(not(any(lpuart_v1, lpuart_v2)))] | ||
| 12 | use crate::pac::usart::{regs, vals, Usart as Regs}; | ||
| 10 | use crate::{peripherals, Peripheral}; | 13 | use crate::{peripherals, Peripheral}; |
| 11 | 14 | ||
| 12 | #[derive(Clone, Copy, PartialEq, Eq, Debug)] | 15 | #[derive(Clone, Copy, PartialEq, Eq, Debug)] |
| @@ -362,7 +365,7 @@ cfg_if::cfg_if! { | |||
| 362 | if #[cfg(all(feature = "unstable-traits", feature = "nightly", feature = "_todo_embedded_hal_serial"))] { | 365 | if #[cfg(all(feature = "unstable-traits", feature = "nightly", feature = "_todo_embedded_hal_serial"))] { |
| 363 | use core::future::Future; | 366 | use core::future::Future; |
| 364 | 367 | ||
| 365 | impl<'d, T: UartInstance, TxDma> embedded_hal_async::serial::Write for UartTx<'d, T, TxDma> | 368 | impl<'d, T: BasicInstance, TxDma> embedded_hal_async::serial::Write for UartTx<'d, T, TxDma> |
| 366 | where | 369 | where |
| 367 | TxDma: crate::usart::TxDma<T>, | 370 | TxDma: crate::usart::TxDma<T>, |
| 368 | { | 371 | { |
| @@ -379,7 +382,7 @@ cfg_if::cfg_if! { | |||
| 379 | } | 382 | } |
| 380 | } | 383 | } |
| 381 | 384 | ||
| 382 | impl<'d, T: UartInstance, RxDma> embedded_hal_async::serial::Read for UartRx<'d, T, RxDma> | 385 | impl<'d, T: BasicInstance, RxDma> embedded_hal_async::serial::Read for UartRx<'d, T, RxDma> |
| 383 | where | 386 | where |
| 384 | RxDma: crate::usart::RxDma<T>, | 387 | RxDma: crate::usart::RxDma<T>, |
| 385 | { | 388 | { |
| @@ -390,7 +393,7 @@ cfg_if::cfg_if! { | |||
| 390 | } | 393 | } |
| 391 | } | 394 | } |
| 392 | 395 | ||
| 393 | impl<'d, T: UartInstance, TxDma, RxDma> embedded_hal_async::serial::Write for Uart<'d, T, TxDma, RxDma> | 396 | impl<'d, T: BasicInstance, TxDma, RxDma> embedded_hal_async::serial::Write for Uart<'d, T, TxDma, RxDma> |
| 394 | where | 397 | where |
| 395 | TxDma: crate::usart::TxDma<T>, | 398 | TxDma: crate::usart::TxDma<T>, |
| 396 | { | 399 | { |
| @@ -407,7 +410,7 @@ cfg_if::cfg_if! { | |||
| 407 | } | 410 | } |
| 408 | } | 411 | } |
| 409 | 412 | ||
| 410 | impl<'d, T: UartInstance, TxDma, RxDma> embedded_hal_async::serial::Read for Uart<'d, T, TxDma, RxDma> | 413 | impl<'d, T: BasicInstance, TxDma, RxDma> embedded_hal_async::serial::Read for Uart<'d, T, TxDma, RxDma> |
| 411 | where | 414 | where |
| 412 | RxDma: crate::usart::RxDma<T>, | 415 | RxDma: crate::usart::RxDma<T>, |
| 413 | { | 416 | { |
| @@ -442,38 +445,39 @@ fn sr(r: crate::pac::usart::Usart) -> crate::pac::common::Reg<regs::Sr, crate::p | |||
| 442 | 445 | ||
| 443 | #[cfg(usart_v1)] | 446 | #[cfg(usart_v1)] |
| 444 | #[allow(unused)] | 447 | #[allow(unused)] |
| 445 | unsafe fn clear_interrupt_flags(_r: crate::pac::usart::Usart, _sr: regs::Sr) { | 448 | unsafe fn clear_interrupt_flags(_r: Regs, _sr: regs::Sr) { |
| 446 | // On v1 the flags are cleared implicitly by reads and writes to DR. | 449 | // On v1 the flags are cleared implicitly by reads and writes to DR. |
| 447 | } | 450 | } |
| 448 | 451 | ||
| 449 | #[cfg(usart_v2)] | 452 | #[cfg(usart_v2)] |
| 450 | fn tdr(r: crate::pac::lpuart::Lpuart) -> *mut u8 { | 453 | fn tdr(r: Regs) -> *mut u8 { |
| 451 | r.tdr().ptr() as _ | 454 | r.tdr().ptr() as _ |
| 452 | } | 455 | } |
| 453 | 456 | ||
| 454 | #[cfg(usart_v2)] | 457 | #[cfg(usart_v2)] |
| 455 | fn rdr(r: crate::pac::lpuart::Lpuart) -> *mut u8 { | 458 | fn rdr(r: Regs) -> *mut u8 { |
| 456 | r.rdr().ptr() as _ | 459 | r.rdr().ptr() as _ |
| 457 | } | 460 | } |
| 458 | 461 | ||
| 459 | #[cfg(usart_v2)] | 462 | #[cfg(usart_v2)] |
| 460 | fn sr(r: crate::pac::lpuart::Lpuart) -> crate::pac::common::Reg<regs::Isr, crate::pac::common::R> { | 463 | fn sr(r: Regs) -> crate::pac::common::Reg<regs::Isr, crate::pac::common::R> { |
| 461 | r.isr() | 464 | r.isr() |
| 462 | } | 465 | } |
| 463 | 466 | ||
| 464 | #[cfg(usart_v2)] | 467 | #[cfg(usart_v2)] |
| 465 | #[allow(unused)] | 468 | #[allow(unused)] |
| 466 | unsafe fn clear_interrupt_flags(r: crate::pac::lpuart::Lpuart, sr: regs::Isr) { | 469 | unsafe fn clear_interrupt_flags(r: Regs, sr: regs::Isr) { |
| 467 | r.icr().write(|w| *w = regs::Icr(sr.0)); | 470 | r.icr().write(|w| *w = regs::Icr(sr.0)); |
| 468 | } | 471 | } |
| 469 | 472 | ||
| 470 | pub(crate) mod sealed { | 473 | pub(crate) mod sealed { |
| 474 | use super::*; | ||
| 471 | 475 | ||
| 472 | pub trait BasicInstance: crate::rcc::RccPeripheral { | 476 | pub trait BasicInstance: crate::rcc::RccPeripheral { |
| 473 | const MULTIPLIER: u32; | 477 | const MULTIPLIER: u32; |
| 474 | type Interrupt: crate::interrupt::Interrupt; | 478 | type Interrupt: crate::interrupt::Interrupt; |
| 475 | 479 | ||
| 476 | fn regs() -> crate::pac::lpuart::Lpuart; | 480 | fn regs() -> Regs; |
| 477 | } | 481 | } |
| 478 | 482 | ||
| 479 | pub trait FullInstance: BasicInstance { | 483 | pub trait FullInstance: BasicInstance { |
| @@ -500,27 +504,23 @@ macro_rules! impl_lpuart { | |||
| 500 | const MULTIPLIER: u32 = $mul; | 504 | const MULTIPLIER: u32 = $mul; |
| 501 | type Interrupt = crate::interrupt::$irq; | 505 | type Interrupt = crate::interrupt::$irq; |
| 502 | 506 | ||
| 503 | fn regs() -> crate::pac::lpuart::Lpuart { | 507 | fn regs() -> Regs { |
| 504 | crate::pac::lpuart::Lpuart(crate::pac::$inst.0) | 508 | Regs(crate::pac::$inst.0) |
| 505 | } | 509 | } |
| 506 | } | 510 | } |
| 511 | |||
| 512 | impl BasicInstance for peripherals::$inst {} | ||
| 507 | }; | 513 | }; |
| 508 | } | 514 | } |
| 509 | 515 | ||
| 510 | foreach_interrupt!( | 516 | foreach_interrupt!( |
| 511 | ($inst:ident, lpuart, LPUART, $signal_name:ident, $irq:ident) => { | 517 | ($inst:ident, lpuart, $block:ident, $signal_name:ident, $irq:ident) => { |
| 512 | impl_lpuart!($inst, $irq, 255); | 518 | impl_lpuart!($inst, $irq, 255); |
| 513 | |||
| 514 | impl BasicInstance for peripherals::$inst { | ||
| 515 | } | ||
| 516 | }; | 519 | }; |
| 517 | 520 | ||
| 518 | ($inst:ident, usart, USART, $signal_name:ident, $irq:ident) => { | 521 | ($inst:ident, usart, $block:ident, $signal_name:ident, $irq:ident) => { |
| 519 | impl_lpuart!($inst, $irq, 1); | 522 | impl_lpuart!($inst, $irq, 1); |
| 520 | 523 | ||
| 521 | impl BasicInstance for peripherals::$inst { | ||
| 522 | } | ||
| 523 | |||
| 524 | impl sealed::FullInstance for peripherals::$inst { | 524 | impl sealed::FullInstance for peripherals::$inst { |
| 525 | 525 | ||
| 526 | fn regs_uart() -> crate::pac::usart::Usart { | 526 | fn regs_uart() -> crate::pac::usart::Usart { |
