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authorbors[bot] <26634292+bors[bot]@users.noreply.github.com>2022-02-24 05:29:33 +0000
committerGitHub <[email protected]>2022-02-24 05:29:33 +0000
commit5163de6094455c230f84fa064c96da7987f5e3f8 (patch)
tree4fdbab02162b5b247dd89b17d621ab918d5adf5a
parentcb8a7d00d5e896129587f371f0f1e77580ce5e34 (diff)
parent14afe0f6e42572b5bc9f65b0cc1dca86b532e3d0 (diff)
Merge #643
643: stm32: build fixes for troublesome chips r=Dirbaio a=Dirbaio See individual commits. Co-authored-by: Dario Nieuwenhuis <[email protected]>
-rwxr-xr-xci.sh3
-rw-r--r--embassy-stm32/build.rs4
-rw-r--r--embassy-stm32/src/adc/v3.rs32
-rw-r--r--embassy-stm32/src/dac/v2.rs6
-rw-r--r--embassy-stm32/src/dma/bdma.rs9
-rw-r--r--embassy-stm32/src/dma/dmamux.rs2
-rw-r--r--embassy-stm32/src/exti.rs2
-rw-r--r--embassy-stm32/src/rcc/l0.rs7
-rw-r--r--embassy-stm32/src/rcc/mod.rs10
-rw-r--r--embassy-stm32/src/time_driver.rs108
m---------stm32-data0
11 files changed, 91 insertions, 92 deletions
diff --git a/ci.sh b/ci.sh
index 91c7cd3ba..b3429a0a3 100755
--- a/ci.sh
+++ b/ci.sh
@@ -46,10 +46,13 @@ cargo batch \
46 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f411ce,defmt,exti,time-driver-any,unstable-traits \ 46 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f411ce,defmt,exti,time-driver-any,unstable-traits \
47 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f429zi,log,exti,time-driver-any,unstable-traits \ 47 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f429zi,log,exti,time-driver-any,unstable-traits \
48 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h755zi-cm7,defmt,exti,time-driver-any,unstable-traits \ 48 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h755zi-cm7,defmt,exti,time-driver-any,unstable-traits \
49 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h7b3ai,defmt,exti,time-driver-any,unstable-traits \
49 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l476vg,defmt,exti,time-driver-any,unstable-traits \ 50 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l476vg,defmt,exti,time-driver-any,unstable-traits \
50 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l072cz,defmt,exti,time-driver-any,unstable-traits \ 51 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l072cz,defmt,exti,time-driver-any,unstable-traits \
52 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l041f6,defmt,exti,time-driver-any,unstable-traits \
51 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32l151cb-a,defmt,exti,time-driver-any,unstable-traits \ 53 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32l151cb-a,defmt,exti,time-driver-any,unstable-traits \
52 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f398ve,defmt,exti,time-driver-any,unstable-traits \ 54 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f398ve,defmt,exti,time-driver-any,unstable-traits \
55 --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32g0c1ve,defmt,exti,time-driver-any,unstable-traits \
53 --- build --release --manifest-path docs/modules/ROOT/examples/basic/Cargo.toml --target thumbv7em-none-eabi \ 56 --- build --release --manifest-path docs/modules/ROOT/examples/basic/Cargo.toml --target thumbv7em-none-eabi \
54 --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-pac/Cargo.toml --target thumbv7em-none-eabi \ 57 --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-pac/Cargo.toml --target thumbv7em-none-eabi \
55 --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-hal/Cargo.toml --target thumbv7em-none-eabi \ 58 --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-hal/Cargo.toml --target thumbv7em-none-eabi \
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index 2b642db84..1257e0152 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -49,7 +49,7 @@ fn main() {
49 // We *shouldn't* have singletons for these, but the HAL currently requires 49 // We *shouldn't* have singletons for these, but the HAL currently requires
50 // singletons, for using with RccPeripheral to enable/disable clocks to them. 50 // singletons, for using with RccPeripheral to enable/disable clocks to them.
51 "rcc" => { 51 "rcc" => {
52 if r.version == "h7" { 52 if r.version.starts_with("h7") {
53 singletons.push("MCO1".to_string()); 53 singletons.push("MCO1".to_string());
54 singletons.push("MCO2".to_string()); 54 singletons.push("MCO2".to_string());
55 } 55 }
@@ -436,7 +436,7 @@ fn main() {
436 // MCO is special 436 // MCO is special
437 if pin.signal.starts_with("MCO_") { 437 if pin.signal.starts_with("MCO_") {
438 // Supported in H7 only for now 438 // Supported in H7 only for now
439 if regs.version == "h7" { 439 if regs.version.starts_with("h7") {
440 peri = format_ident!("{}", pin.signal.replace("_", "")); 440 peri = format_ident!("{}", pin.signal.replace("_", ""));
441 } else { 441 } else {
442 continue; 442 continue;
diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 6f36daa23..387b62470 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -9,11 +9,11 @@ pub const VDDA_CALIB_MV: u32 = 3000;
9/// Sadly we cannot use `RccPeripheral::enable` since devices are quite inconsistent ADC clock 9/// Sadly we cannot use `RccPeripheral::enable` since devices are quite inconsistent ADC clock
10/// configuration. 10/// configuration.
11unsafe fn enable() { 11unsafe fn enable() {
12 #[cfg(rcc_h7)] 12 #[cfg(stm32h7)]
13 crate::pac::RCC.apb2enr().modify(|w| w.set_adcen(true)); 13 crate::pac::RCC.apb2enr().modify(|w| w.set_adcen(true));
14 #[cfg(rcc_g0)] 14 #[cfg(stm32g0)]
15 crate::pac::RCC.apbenr2().modify(|w| w.set_adcen(true)); 15 crate::pac::RCC.apbenr2().modify(|w| w.set_adcen(true));
16 #[cfg(rcc_l4)] 16 #[cfg(stm32l4)]
17 crate::pac::RCC.ahb2enr().modify(|w| w.set_adcen(true)); 17 crate::pac::RCC.ahb2enr().modify(|w| w.set_adcen(true));
18} 18}
19 19
@@ -54,9 +54,9 @@ pub struct Vref;
54impl<T: Instance> AdcPin<T> for Vref {} 54impl<T: Instance> AdcPin<T> for Vref {}
55impl<T: Instance> super::sealed::AdcPin<T> for Vref { 55impl<T: Instance> super::sealed::AdcPin<T> for Vref {
56 fn channel(&self) -> u8 { 56 fn channel(&self) -> u8 {
57 #[cfg(not(rcc_g0))] 57 #[cfg(not(stm32g0))]
58 let val = 0; 58 let val = 0;
59 #[cfg(rcc_g0)] 59 #[cfg(stm32g0)]
60 let val = 13; 60 let val = 13;
61 val 61 val
62 } 62 }
@@ -66,9 +66,9 @@ pub struct Temperature;
66impl<T: Instance> AdcPin<T> for Temperature {} 66impl<T: Instance> AdcPin<T> for Temperature {}
67impl<T: Instance> super::sealed::AdcPin<T> for Temperature { 67impl<T: Instance> super::sealed::AdcPin<T> for Temperature {
68 fn channel(&self) -> u8 { 68 fn channel(&self) -> u8 {
69 #[cfg(not(rcc_g0))] 69 #[cfg(not(stm32g0))]
70 let val = 17; 70 let val = 17;
71 #[cfg(rcc_g0)] 71 #[cfg(stm32g0)]
72 let val = 12; 72 let val = 12;
73 val 73 val
74 } 74 }
@@ -78,9 +78,9 @@ pub struct Vbat;
78impl<T: Instance> AdcPin<T> for Vbat {} 78impl<T: Instance> AdcPin<T> for Vbat {}
79impl<T: Instance> super::sealed::AdcPin<T> for Vbat { 79impl<T: Instance> super::sealed::AdcPin<T> for Vbat {
80 fn channel(&self) -> u8 { 80 fn channel(&self) -> u8 {
81 #[cfg(not(rcc_g0))] 81 #[cfg(not(stm32g0))]
82 let val = 18; 82 let val = 18;
83 #[cfg(rcc_g0)] 83 #[cfg(stm32g0)]
84 let val = 14; 84 let val = 14;
85 val 85 val
86 } 86 }
@@ -281,7 +281,7 @@ impl<'d, T: Instance> Adc<'d, T> {
281 /// Calculates the system VDDA by sampling the internal VREF channel and comparing 281 /// Calculates the system VDDA by sampling the internal VREF channel and comparing
282 /// the result with the value stored at the factory. If the chip's VDDA is not stable, run 282 /// the result with the value stored at the factory. If the chip's VDDA is not stable, run
283 /// this before each ADC conversion. 283 /// this before each ADC conversion.
284 #[cfg(not(rcc_g0))] // TODO is this supposed to be public? 284 #[cfg(not(stm32g0))] // TODO is this supposed to be public?
285 #[allow(unused)] // TODO is this supposed to be public? 285 #[allow(unused)] // TODO is this supposed to be public?
286 fn calibrate(&mut self, vref: &mut Vref) { 286 fn calibrate(&mut self, vref: &mut Vref) {
287 let vref_cal = unsafe { crate::pac::VREFINTCAL.data().read().value() }; 287 let vref_cal = unsafe { crate::pac::VREFINTCAL.data().read().value() };
@@ -363,11 +363,11 @@ impl<'d, T: Instance> Adc<'d, T> {
363 } 363 }
364 364
365 // Configure ADC 365 // Configure ADC
366 #[cfg(not(rcc_g0))] 366 #[cfg(not(stm32g0))]
367 T::regs() 367 T::regs()
368 .cfgr() 368 .cfgr()
369 .modify(|reg| reg.set_res(self.resolution.res())); 369 .modify(|reg| reg.set_res(self.resolution.res()));
370 #[cfg(rcc_g0)] 370 #[cfg(stm32g0)]
371 T::regs() 371 T::regs()
372 .cfgr1() 372 .cfgr1()
373 .modify(|reg| reg.set_res(self.resolution.res())); 373 .modify(|reg| reg.set_res(self.resolution.res()));
@@ -376,9 +376,9 @@ impl<'d, T: Instance> Adc<'d, T> {
376 Self::set_channel_sample_time(pin.channel(), self.sample_time); 376 Self::set_channel_sample_time(pin.channel(), self.sample_time);
377 377
378 // Select channel 378 // Select channel
379 #[cfg(not(rcc_g0))] 379 #[cfg(not(stm32g0))]
380 T::regs().sqr1().write(|reg| reg.set_sq(0, pin.channel())); 380 T::regs().sqr1().write(|reg| reg.set_sq(0, pin.channel()));
381 #[cfg(rcc_g0)] 381 #[cfg(stm32g0)]
382 T::regs() 382 T::regs()
383 .chselr() 383 .chselr()
384 .write(|reg| reg.set_chsel(pin.channel() as u32)); 384 .write(|reg| reg.set_chsel(pin.channel() as u32));
@@ -400,14 +400,14 @@ impl<'d, T: Instance> Adc<'d, T> {
400 } 400 }
401 } 401 }
402 402
403 #[cfg(rcc_g0)] 403 #[cfg(stm32g0)]
404 unsafe fn set_channel_sample_time(_ch: u8, sample_time: SampleTime) { 404 unsafe fn set_channel_sample_time(_ch: u8, sample_time: SampleTime) {
405 T::regs() 405 T::regs()
406 .smpr() 406 .smpr()
407 .modify(|reg| reg.set_smp1(sample_time.sample_time())); 407 .modify(|reg| reg.set_smp1(sample_time.sample_time()));
408 } 408 }
409 409
410 #[cfg(not(rcc_g0))] 410 #[cfg(not(stm32g0))]
411 unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) { 411 unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
412 if ch <= 9 { 412 if ch <= 9 {
413 T::regs() 413 T::regs()
diff --git a/embassy-stm32/src/dac/v2.rs b/embassy-stm32/src/dac/v2.rs
index 751eebf79..9fb01fa94 100644
--- a/embassy-stm32/src/dac/v2.rs
+++ b/embassy-stm32/src/dac/v2.rs
@@ -115,9 +115,11 @@ impl<'d, T: Instance> Dac<'d, T> {
115 // configuration. 115 // configuration.
116 #[cfg(rcc_h7)] 116 #[cfg(rcc_h7)]
117 crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(true)); 117 crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(true));
118 #[cfg(rcc_g0)] 118 #[cfg(rcc_h7ab)]
119 crate::pac::RCC.apb1lenr().modify(|w| w.set_dac1en(true));
120 #[cfg(stm32g0)]
119 crate::pac::RCC.apbenr1().modify(|w| w.set_dac1en(true)); 121 crate::pac::RCC.apbenr1().modify(|w| w.set_dac1en(true));
120 #[cfg(rcc_l4)] 122 #[cfg(stm32l4)]
121 crate::pac::RCC.apb1enr1().modify(|w| w.set_dac1en(true)); 123 crate::pac::RCC.apb1enr1().modify(|w| w.set_dac1en(true));
122 124
123 if channels >= 1 { 125 if channels >= 1 {
diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs
index a37de2d63..2f0715cf6 100644
--- a/embassy-stm32/src/dma/bdma.rs
+++ b/embassy-stm32/src/dma/bdma.rs
@@ -49,6 +49,12 @@ macro_rules! dma_num {
49 (BDMA) => { 49 (BDMA) => {
50 0 50 0
51 }; 51 };
52 (BDMA1) => {
53 0
54 };
55 (BDMA2) => {
56 1
57 };
52} 58}
53 59
54pub(crate) unsafe fn on_irq() { 60pub(crate) unsafe fn on_irq() {
@@ -80,6 +86,9 @@ pub(crate) unsafe fn init() {
80} 86}
81 87
82pac::dma_channels! { 88pac::dma_channels! {
89 ($channel_peri:ident, BDMA1, bdma, $channel_num:expr, $dmamux:tt) => {
90 // BDMA1 in H7 doesn't use DMAMUX, which breaks
91 };
83 ($channel_peri:ident, $dma_peri:ident, bdma, $channel_num:expr, $dmamux:tt) => { 92 ($channel_peri:ident, $dma_peri:ident, bdma, $channel_num:expr, $dmamux:tt) => {
84 impl crate::dma::sealed::Channel for crate::peripherals::$channel_peri { 93 impl crate::dma::sealed::Channel for crate::peripherals::$channel_peri {
85 94
diff --git a/embassy-stm32/src/dma/dmamux.rs b/embassy-stm32/src/dma/dmamux.rs
index fd076581b..971695a06 100644
--- a/embassy-stm32/src/dma/dmamux.rs
+++ b/embassy-stm32/src/dma/dmamux.rs
@@ -28,7 +28,7 @@ pub(crate) mod sealed {
28} 28}
29 29
30pub struct DMAMUX1; 30pub struct DMAMUX1;
31#[cfg(rcc_h7)] 31#[cfg(stm32h7)]
32pub struct DMAMUX2; 32pub struct DMAMUX2;
33 33
34pub trait MuxChannel: sealed::MuxChannel + super::Channel { 34pub trait MuxChannel: sealed::MuxChannel + super::Channel {
diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs
index 07d086843..909d0ee88 100644
--- a/embassy-stm32/src/exti.rs
+++ b/embassy-stm32/src/exti.rs
@@ -388,6 +388,6 @@ pub(crate) unsafe fn init() {
388 388
389 #[cfg(not(any(rcc_wb, rcc_wl5, rcc_f1)))] 389 #[cfg(not(any(rcc_wb, rcc_wl5, rcc_f1)))]
390 <crate::peripherals::SYSCFG as crate::rcc::sealed::RccPeripheral>::enable(); 390 <crate::peripherals::SYSCFG as crate::rcc::sealed::RccPeripheral>::enable();
391 #[cfg(rcc_f1)] 391 #[cfg(stm32f1)]
392 <crate::peripherals::AFIO as crate::rcc::sealed::RccPeripheral>::enable(); 392 <crate::peripherals::AFIO as crate::rcc::sealed::RccPeripheral>::enable();
393} 393}
diff --git a/embassy-stm32/src/rcc/l0.rs b/embassy-stm32/src/rcc/l0.rs
index e482dcc21..692791174 100644
--- a/embassy-stm32/src/rcc/l0.rs
+++ b/embassy-stm32/src/rcc/l0.rs
@@ -1,5 +1,7 @@
1use crate::pac::rcc::vals::{Hpre, Msirange, Plldiv, Pllmul, Pllsrc, Ppre, Sw}; 1use crate::pac::rcc::vals::{Hpre, Msirange, Plldiv, Pllmul, Pllsrc, Ppre, Sw};
2use crate::pac::{CRS, RCC, SYSCFG}; 2use crate::pac::RCC;
3#[cfg(crs)]
4use crate::pac::{CRS, SYSCFG};
3use crate::rcc::{set_freqs, Clocks}; 5use crate::rcc::{set_freqs, Clocks};
4use crate::time::Hertz; 6use crate::time::Hertz;
5use crate::time::U32Ext; 7use crate::time::U32Ext;
@@ -180,6 +182,7 @@ pub struct Config {
180 pub ahb_pre: AHBPrescaler, 182 pub ahb_pre: AHBPrescaler,
181 pub apb1_pre: APBPrescaler, 183 pub apb1_pre: APBPrescaler,
182 pub apb2_pre: APBPrescaler, 184 pub apb2_pre: APBPrescaler,
185 #[cfg(crs)]
183 pub enable_hsi48: bool, 186 pub enable_hsi48: bool,
184} 187}
185 188
@@ -191,6 +194,7 @@ impl Default for Config {
191 ahb_pre: AHBPrescaler::NotDivided, 194 ahb_pre: AHBPrescaler::NotDivided,
192 apb1_pre: APBPrescaler::NotDivided, 195 apb1_pre: APBPrescaler::NotDivided,
193 apb2_pre: APBPrescaler::NotDivided, 196 apb2_pre: APBPrescaler::NotDivided,
197 #[cfg(crs)]
194 enable_hsi48: false, 198 enable_hsi48: false,
195 } 199 }
196 } 200 }
@@ -312,6 +316,7 @@ pub(crate) unsafe fn init(config: Config) {
312 } 316 }
313 }; 317 };
314 318
319 #[cfg(crs)]
315 if config.enable_hsi48 { 320 if config.enable_hsi48 {
316 // Reset SYSCFG peripheral 321 // Reset SYSCFG peripheral
317 RCC.apb2rstr().modify(|w| w.set_syscfgrst(true)); 322 RCC.apb2rstr().modify(|w| w.set_syscfgrst(true));
diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs
index 5c223bc43..01c66f76f 100644
--- a/embassy-stm32/src/rcc/mod.rs
+++ b/embassy-stm32/src/rcc/mod.rs
@@ -33,18 +33,20 @@ pub struct Clocks {
33 pub apb2_tim: Hertz, 33 pub apb2_tim: Hertz,
34 #[cfg(any(rcc_wl5, rcc_u5))] 34 #[cfg(any(rcc_wl5, rcc_u5))]
35 pub apb3: Hertz, 35 pub apb3: Hertz,
36 #[cfg(any(rcc_h7))] 36 #[cfg(any(rcc_h7, rcc_h7ab))]
37 pub apb4: Hertz, 37 pub apb4: Hertz,
38 38
39 // AHB 39 // AHB
40 pub ahb1: Hertz, 40 pub ahb1: Hertz,
41 #[cfg(any( 41 #[cfg(any(
42 rcc_l4, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_g4, rcc_u5, rcc_wb, rcc_wl5 42 rcc_l4, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_g4, rcc_u5, rcc_wb, rcc_wl5
43 ))] 43 ))]
44 pub ahb2: Hertz, 44 pub ahb2: Hertz,
45 #[cfg(any(rcc_l4, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))] 45 #[cfg(any(
46 rcc_l4, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_u5, rcc_wb, rcc_wl5
47 ))]
46 pub ahb3: Hertz, 48 pub ahb3: Hertz,
47 #[cfg(any(rcc_h7))] 49 #[cfg(any(rcc_h7, rcc_h7ab))]
48 pub ahb4: Hertz, 50 pub ahb4: Hertz,
49 51
50 #[cfg(any(rcc_f4, rcc_f410, rcc_f7))] 52 #[cfg(any(rcc_f4, rcc_f410, rcc_f7))]
diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs
index 7efe0d3a5..98054e051 100644
--- a/embassy-stm32/src/time_driver.rs
+++ b/embassy-stm32/src/time_driver.rs
@@ -11,12 +11,12 @@ use embassy::time::TICKS_PER_SECOND;
11use stm32_metapac::timer::regs; 11use stm32_metapac::timer::regs;
12 12
13use crate::interrupt; 13use crate::interrupt;
14use crate::interrupt::{CriticalSection, Interrupt}; 14use crate::interrupt::CriticalSection;
15use crate::pac::timer::{vals, TimGp16}; 15use crate::pac::timer::vals;
16use crate::peripherals; 16use crate::peripherals;
17use crate::rcc::sealed::RccPeripheral; 17use crate::rcc::sealed::RccPeripheral;
18 18use crate::timer::sealed::Basic16bitInstance as BasicInstance;
19use self::sealed::Instance as _; 19use crate::timer::sealed::GeneralPurpose16bitInstance as Instance;
20 20
21const ALARM_COUNT: usize = 3; 21const ALARM_COUNT: usize = 3;
22 22
@@ -29,25 +29,35 @@ type T = peripherals::TIM4;
29#[cfg(time_driver_tim5)] 29#[cfg(time_driver_tim5)]
30type T = peripherals::TIM5; 30type T = peripherals::TIM5;
31 31
32#[cfg(time_driver_tim2)] 32crate::pac::interrupts! {
33#[interrupt] 33 (TIM2, timer, $block:ident, UP, $irq:ident) => {
34fn TIM2() { 34 #[cfg(time_driver_tim2)]
35 DRIVER.on_interrupt() 35 #[interrupt]
36} 36 fn $irq() {
37#[cfg(time_driver_tim3)] 37 DRIVER.on_interrupt()
38#[interrupt] 38 }
39fn TIM3() { 39 };
40 DRIVER.on_interrupt() 40 (TIM3, timer, $block:ident, UP, $irq:ident) => {
41} 41 #[cfg(time_driver_tim3)]
42#[cfg(time_driver_tim4)] 42 #[interrupt]
43#[interrupt] 43 fn $irq() {
44fn TIM4() { 44 DRIVER.on_interrupt()
45 DRIVER.on_interrupt() 45 }
46} 46 };
47#[cfg(time_driver_tim5)] 47 (TIM4, timer, $block:ident, UP, $irq:ident) => {
48#[interrupt] 48 #[cfg(time_driver_tim4)]
49fn TIM5() { 49 #[interrupt]
50 DRIVER.on_interrupt() 50 fn $irq() {
51 DRIVER.on_interrupt()
52 }
53 };
54 (TIM5, timer, $block:ident, UP, $irq:ident) => {
55 #[cfg(time_driver_tim5)]
56 #[interrupt]
57 fn $irq() {
58 DRIVER.on_interrupt()
59 }
60 };
51} 61}
52 62
53// Clock timekeeping works with something we call "periods", which are time intervals 63// Clock timekeeping works with something we call "periods", which are time intervals
@@ -93,6 +103,7 @@ impl AlarmState {
93} 103}
94 104
95struct RtcDriver { 105struct RtcDriver {
106 timer: T,
96 /// Number of 2^15 periods elapsed since boot. 107 /// Number of 2^15 periods elapsed since boot.
97 period: AtomicU32, 108 period: AtomicU32,
98 alarm_count: AtomicU8, 109 alarm_count: AtomicU8,
@@ -103,6 +114,7 @@ struct RtcDriver {
103const ALARM_STATE_NEW: AlarmState = AlarmState::new(); 114const ALARM_STATE_NEW: AlarmState = AlarmState::new();
104 115
105embassy::time_driver_impl!(static DRIVER: RtcDriver = RtcDriver { 116embassy::time_driver_impl!(static DRIVER: RtcDriver = RtcDriver {
117 timer: unsafe { core::mem::transmute(()) }, // steal is not const
106 period: AtomicU32::new(0), 118 period: AtomicU32::new(0),
107 alarm_count: AtomicU8::new(0), 119 alarm_count: AtomicU8::new(0),
108 alarms: Mutex::const_new(CriticalSectionRawMutex::new(), [ALARM_STATE_NEW; ALARM_COUNT]), 120 alarms: Mutex::const_new(CriticalSectionRawMutex::new(), [ALARM_STATE_NEW; ALARM_COUNT]),
@@ -110,10 +122,10 @@ embassy::time_driver_impl!(static DRIVER: RtcDriver = RtcDriver {
110 122
111impl RtcDriver { 123impl RtcDriver {
112 fn init(&'static self) { 124 fn init(&'static self) {
113 let r = T::regs(); 125 let r = self.timer.regs_gp16();
114 126
115 T::enable(); 127 <T as RccPeripheral>::enable();
116 T::reset(); 128 <T as RccPeripheral>::reset();
117 129
118 let timer_freq = T::frequency(); 130 let timer_freq = T::frequency();
119 131
@@ -142,7 +154,7 @@ impl RtcDriver {
142 // Enable CC0, disable others 154 // Enable CC0, disable others
143 r.dier().write(|w| w.set_ccie(0, true)); 155 r.dier().write(|w| w.set_ccie(0, true));
144 156
145 let irq: <T as sealed::Instance>::Interrupt = core::mem::transmute(()); 157 let irq: <T as BasicInstance>::Interrupt = core::mem::transmute(());
146 irq.unpend(); 158 irq.unpend();
147 irq.enable(); 159 irq.enable();
148 160
@@ -151,7 +163,7 @@ impl RtcDriver {
151 } 163 }
152 164
153 fn on_interrupt(&self) { 165 fn on_interrupt(&self) {
154 let r = T::regs(); 166 let r = self.timer.regs_gp16();
155 167
156 // NOTE(unsafe) Use critical section to access the methods 168 // NOTE(unsafe) Use critical section to access the methods
157 // XXX: reduce the size of this critical section ? 169 // XXX: reduce the size of this critical section ?
@@ -182,7 +194,7 @@ impl RtcDriver {
182 } 194 }
183 195
184 fn next_period(&self) { 196 fn next_period(&self) {
185 let r = T::regs(); 197 let r = self.timer.regs_gp16();
186 198
187 let period = self.period.fetch_add(1, Ordering::Relaxed) + 1; 199 let period = self.period.fetch_add(1, Ordering::Relaxed) + 1;
188 let t = (period as u64) << 15; 200 let t = (period as u64) << 15;
@@ -224,7 +236,7 @@ impl RtcDriver {
224 236
225impl Driver for RtcDriver { 237impl Driver for RtcDriver {
226 fn now(&self) -> u64 { 238 fn now(&self) -> u64 {
227 let r = T::regs(); 239 let r = self.timer.regs_gp16();
228 240
229 let period = self.period.load(Ordering::Relaxed); 241 let period = self.period.load(Ordering::Relaxed);
230 compiler_fence(Ordering::Acquire); 242 compiler_fence(Ordering::Acquire);
@@ -261,7 +273,7 @@ impl Driver for RtcDriver {
261 273
262 fn set_alarm(&self, alarm: AlarmHandle, timestamp: u64) { 274 fn set_alarm(&self, alarm: AlarmHandle, timestamp: u64) {
263 critical_section::with(|cs| { 275 critical_section::with(|cs| {
264 let r = T::regs(); 276 let r = self.timer.regs_gp16();
265 277
266 let n = alarm.id() as _; 278 let n = alarm.id() as _;
267 let alarm = self.get_alarm(cs, alarm); 279 let alarm = self.get_alarm(cs, alarm);
@@ -291,37 +303,3 @@ impl Driver for RtcDriver {
291pub(crate) fn init() { 303pub(crate) fn init() {
292 DRIVER.init() 304 DRIVER.init()
293} 305}
294
295// ------------------------------------------------------
296
297pub(crate) mod sealed {
298 use super::*;
299 pub trait Instance {
300 type Interrupt: Interrupt;
301
302 fn regs() -> TimGp16;
303 }
304}
305
306pub trait Instance: sealed::Instance + Sized + RccPeripheral + 'static {}
307
308macro_rules! impl_timer {
309 ($inst:ident) => {
310 impl sealed::Instance for peripherals::$inst {
311 type Interrupt = crate::interrupt::$inst;
312
313 fn regs() -> TimGp16 {
314 crate::pac::timer::TimGp16(crate::pac::$inst.0)
315 }
316 }
317
318 impl Instance for peripherals::$inst {}
319 };
320}
321
322crate::pac::peripherals!(
323 (timer, TIM2) => { impl_timer!(TIM2); };
324 (timer, TIM3) => { impl_timer!(TIM3); };
325 (timer, TIM4) => { impl_timer!(TIM4); };
326 (timer, TIM5) => { impl_timer!(TIM5); };
327);
diff --git a/stm32-data b/stm32-data
Subproject 608581a8960b95c4d472f59d0b028b47053d587 Subproject cb78ac90ba8607d6bb38296607c02e28c60391f