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authorbors[bot] <26634292+bors[bot]@users.noreply.github.com>2023-05-25 20:38:23 +0000
committerGitHub <[email protected]>2023-05-25 20:38:23 +0000
commit524a89cc722d2f01e1edcceb8ed116c5f2e12885 (patch)
tree9d168d016d6a5897a1f9418a852f3ce3da9ea0f6
parentd28dc08f095985283e23a2412647ec90509c48c9 (diff)
parentdc28a42fd2fde57d66a692dd12ada3bdafa3c295 (diff)
Merge #1487
1487: rp: Implement embedded_hal::serial::Write for Uart/UartTx r=Dirbaio a=Alpha-3 Uart/UartTx currently implements `embedded_hal_02::serial::Read<u8>` and `embedded_hal_02::blocking::serial::Write<u8>` but not `embedded_hal_02::serial::Write<u8>`. This implements the missing `embedded_hal_02::serial::Write<u8>` to allow use of Uart with crates that expect this interface, such as [defmt_serial](https://docs.rs/defmt-serial/latest/defmt_serial/). Co-authored-by: Alpha3__0 <Alpha3.0gmail.com>
-rw-r--r--embassy-rp/src/uart/mod.rs38
1 files changed, 38 insertions, 0 deletions
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs
index 7234336b4..44e0ca0f6 100644
--- a/embassy-rp/src/uart/mod.rs
+++ b/embassy-rp/src/uart/mod.rs
@@ -755,6 +755,32 @@ mod eh02 {
755 } 755 }
756 } 756 }
757 757
758 impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Write<u8> for UartTx<'d, T, M> {
759 type Error = Error;
760
761 fn write(&mut self, word: u8) -> Result<(), nb::Error<Self::Error>> {
762 let r = T::regs();
763 unsafe {
764 if r.uartfr().read().txff() {
765 return Err(nb::Error::WouldBlock);
766 }
767
768 r.uartdr().write(|w| w.set_data(word));
769 }
770 Ok(())
771 }
772
773 fn flush(&mut self) -> Result<(), nb::Error<Self::Error>> {
774 let r = T::regs();
775 unsafe {
776 if !r.uartfr().read().txfe() {
777 return Err(nb::Error::WouldBlock);
778 }
779 }
780 Ok(())
781 }
782 }
783
758 impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::serial::Write<u8> for UartTx<'d, T, M> { 784 impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::serial::Write<u8> for UartTx<'d, T, M> {
759 type Error = Error; 785 type Error = Error;
760 786
@@ -775,6 +801,18 @@ mod eh02 {
775 } 801 }
776 } 802 }
777 803
804 impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Write<u8> for Uart<'d, T, M> {
805 type Error = Error;
806
807 fn write(&mut self, word: u8) -> Result<(), nb::Error<Self::Error>> {
808 embedded_hal_02::serial::Write::write(&mut self.tx, word)
809 }
810
811 fn flush(&mut self) -> Result<(), nb::Error<Self::Error>> {
812 embedded_hal_02::serial::Write::flush(&mut self.tx)
813 }
814 }
815
778 impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::serial::Write<u8> for Uart<'d, T, M> { 816 impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::serial::Write<u8> for Uart<'d, T, M> {
779 type Error = Error; 817 type Error = Error;
780 818