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authorUlf Lilleengen <[email protected]>2024-05-29 07:39:06 +0000
committerGitHub <[email protected]>2024-05-29 07:39:06 +0000
commit53dedd2ff5076a5bb100eea26a1053cb70bf6c9d (patch)
tree8d60054a9b4a2608a255c8a8057286657748cbef
parent000b022ae2e52e9abaabbd10110b4c583fe4344c (diff)
parent9031ce7fa78b899d13e4b0966e57c5684adcd6e1 (diff)
Merge pull request #3015 from valleyflowerbear/main
Fix watchdog CTRL register getting overwritten
-rw-r--r--embassy-rp/src/watchdog.rs4
1 files changed, 2 insertions, 2 deletions
diff --git a/embassy-rp/src/watchdog.rs b/embassy-rp/src/watchdog.rs
index f1e986ec7..229a306fe 100644
--- a/embassy-rp/src/watchdog.rs
+++ b/embassy-rp/src/watchdog.rs
@@ -46,7 +46,7 @@ impl Watchdog {
46 /// or when JTAG is accessing bus fabric 46 /// or when JTAG is accessing bus fabric
47 pub fn pause_on_debug(&mut self, pause: bool) { 47 pub fn pause_on_debug(&mut self, pause: bool) {
48 let watchdog = pac::WATCHDOG; 48 let watchdog = pac::WATCHDOG;
49 watchdog.ctrl().write(|w| { 49 watchdog.ctrl().modify(|w| {
50 w.set_pause_dbg0(pause); 50 w.set_pause_dbg0(pause);
51 w.set_pause_dbg1(pause); 51 w.set_pause_dbg1(pause);
52 w.set_pause_jtag(pause); 52 w.set_pause_jtag(pause);
@@ -60,7 +60,7 @@ impl Watchdog {
60 60
61 fn enable(&self, bit: bool) { 61 fn enable(&self, bit: bool) {
62 let watchdog = pac::WATCHDOG; 62 let watchdog = pac::WATCHDOG;
63 watchdog.ctrl().write(|w| w.set_enable(bit)) 63 watchdog.ctrl().modify(|w| w.set_enable(bit))
64 } 64 }
65 65
66 // Configure which hardware will be reset by the watchdog 66 // Configure which hardware will be reset by the watchdog