diff options
| author | Ulf Lilleengen <[email protected]> | 2021-06-16 16:21:16 +0200 |
|---|---|---|
| committer | Ulf Lilleengen <[email protected]> | 2021-06-16 16:21:16 +0200 |
| commit | 56c5218292de2d0722e30ae033191de0ef8e4647 (patch) | |
| tree | 2e3289a91f45a83b4bff4d0a6d130eae8435183a | |
| parent | 383beb37b33fd1346150f756e3281ac1b3651f48 (diff) | |
Prescaler 1 means divide by 3 on WL55
| -rw-r--r-- | embassy-stm32/src/rcc/types.rs | 2 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/wl5x/mod.rs | 6 |
2 files changed, 6 insertions, 2 deletions
diff --git a/embassy-stm32/src/rcc/types.rs b/embassy-stm32/src/rcc/types.rs index df7917ab3..1fcaa27e9 100644 --- a/embassy-stm32/src/rcc/types.rs +++ b/embassy-stm32/src/rcc/types.rs | |||
| @@ -63,7 +63,7 @@ pub enum PLLMul { | |||
| 63 | } | 63 | } |
| 64 | 64 | ||
| 65 | /// AHB prescaler | 65 | /// AHB prescaler |
| 66 | #[derive(Clone, Copy)] | 66 | #[derive(Clone, Copy, PartialEq)] |
| 67 | pub enum AHBPrescaler { | 67 | pub enum AHBPrescaler { |
| 68 | NotDivided, | 68 | NotDivided, |
| 69 | Div2, | 69 | Div2, |
diff --git a/embassy-stm32/src/rcc/wl5x/mod.rs b/embassy-stm32/src/rcc/wl5x/mod.rs index 6fa31ce2d..554a27ca2 100644 --- a/embassy-stm32/src/rcc/wl5x/mod.rs +++ b/embassy-stm32/src/rcc/wl5x/mod.rs | |||
| @@ -164,7 +164,11 @@ impl RccExt for RCC { | |||
| 164 | unsafe { | 164 | unsafe { |
| 165 | rcc.cfgr().modify(|w| { | 165 | rcc.cfgr().modify(|w| { |
| 166 | w.set_sw(sw.into()); | 166 | w.set_sw(sw.into()); |
| 167 | w.set_hpre(cfgr.ahb_pre.into()); | 167 | if cfgr.ahb_pre == AHBPrescaler::NotDivided { |
| 168 | w.set_hpre(0); | ||
| 169 | } else { | ||
| 170 | w.set_hpre(cfgr.ahb_pre.into()); | ||
| 171 | } | ||
| 168 | w.set_ppre1(cfgr.apb1_pre.into()); | 172 | w.set_ppre1(cfgr.apb1_pre.into()); |
| 169 | w.set_ppre2(cfgr.apb2_pre.into()); | 173 | w.set_ppre2(cfgr.apb2_pre.into()); |
| 170 | }); | 174 | }); |
