Added a new rm2 feature flag

2 files changed, 9 insertions, 1 deletions

diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml
index 4e21c255f..794bf2479 100644
--- a/cyw43-pio/Cargo.toml
+++ b/cyw43-pio/Cargo.toml
@@ -13,6 +13,8 @@ documentation = "https://docs.embassy.dev/cyw43-pio"
 # If disabled, SPI runs at 31.25MHz
 # If enabled, SPI runs at 62.5MHz, which is 25% higher than 50Mhz which is the maximum according to the CYW43439 datasheet.
 overclock = []
+# If enabled the PIO runs at a speed that works with the rm2 module
+rm2 = []
 
 [dependencies]
 cyw43 = { version = "0.2.0", path = "../cyw43" }
diff --git a/cyw43-pio/src/lib.rs b/cyw43-pio/src/lib.rs
index 40cf63a17..1280e2059 100644
--- a/cyw43-pio/src/lib.rs
+++ b/cyw43-pio/src/lib.rs
@@ -120,7 +120,7 @@ where
             cfg.clock_divider = FixedU32::from_bits(0x0100);
         }
 
-        #[cfg(not(feature = "overclock"))]
+        #[cfg(not(any(feature = "overclock", feature = "rm2")))]
         {
             // same speed as pico-sdk, 62.5Mhz
             // This is actually the fastest we can go without overclocking.
@@ -132,6 +132,12 @@ where
             cfg.clock_divider = FixedU32::from_bits(0x0200);
         }
 
+        #[cfg(feature = "rm2")]
+        {
+            // This is found to work better with the RM2 module which is found on the Pimoroni Pico Plus 2 W
+            cfg.clock_divider = FixedU32::from_bits(0x0300);
+        }
+
         sm.set_config(&cfg);
 
         sm.set_pin_dirs(Direction::Out, &[&pin_clk, &pin_io]);