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authorMathias <[email protected]>2022-10-12 10:54:47 +0200
committerMathias <[email protected]>2022-10-12 10:54:47 +0200
commit5846b4ff7d6a3ab177abe1f1070b0b21d5a87f1d (patch)
treedf5bfbaf9815305d2c5be5c0deca8e51708aff8e
parent83fcc360fef662b1c9db121b9f9b73e0d5b8fde8 (diff)
Correctly enable RTC_IRQ when scheduling an RTC alarm
-rw-r--r--embassy-rp/src/rtc/mod.rs2
1 files changed, 2 insertions, 0 deletions
diff --git a/embassy-rp/src/rtc/mod.rs b/embassy-rp/src/rtc/mod.rs
index 7f3bbbe73..e4b6f0b1d 100644
--- a/embassy-rp/src/rtc/mod.rs
+++ b/embassy-rp/src/rtc/mod.rs
@@ -145,6 +145,8 @@ impl<'d, T: Instance> RealTimeClock<'d, T> {
145 filter.write_setup_1(w); 145 filter.write_setup_1(w);
146 }); 146 });
147 147
148 self.inner.regs().inte().modify(|w| w.set_rtc(true));
149
148 // Set the enable bit and check if it is set 150 // Set the enable bit and check if it is set
149 self.inner.regs().irq_setup_0().modify(|w| w.set_match_ena(true)); 151 self.inner.regs().irq_setup_0().modify(|w| w.set_match_ena(true));
150 while !self.inner.regs().irq_setup_0().read().match_active() { 152 while !self.inner.regs().irq_setup_0().read().match_active() {