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authorTimo Kröger <[email protected]>2021-07-23 14:24:38 +0200
committerTimo Kröger <[email protected]>2021-07-23 17:54:13 +0200
commit5ac91933ff0e4643823c77b357d90e82007fc9fb (patch)
tree5f252cde081a002f09659059bf746bf2896a3d16
parentec5d44333ab6c0711424699efb2e782baf0124c7 (diff)
stm32: No need to enable GPIO clocks manually
-rw-r--r--examples/stm32f4/src/bin/blinky.rs9
-rw-r--r--examples/stm32f4/src/bin/button.rs9
-rw-r--r--examples/stm32f4/src/bin/button_exti.rs9
-rw-r--r--examples/stm32f4/src/bin/spi.rs11
-rw-r--r--examples/stm32f4/src/bin/usart.rs9
-rw-r--r--examples/stm32h7/src/bin/blinky.rs13
-rw-r--r--examples/stm32h7/src/bin/dac.rs24
-rw-r--r--examples/stm32h7/src/bin/eth.rs12
-rw-r--r--examples/stm32h7/src/bin/usart.rs10
-rw-r--r--examples/stm32h7/src/bin/usart_dma.rs7
-rw-r--r--examples/stm32l4/Cargo.toml1
-rw-r--r--examples/stm32l4/src/bin/adc.rs40
-rw-r--r--examples/stm32l4/src/bin/blinky.rs9
-rw-r--r--examples/stm32l4/src/bin/button.rs9
-rw-r--r--examples/stm32l4/src/bin/button_exti.rs9
-rw-r--r--examples/stm32l4/src/bin/dac.rs40
-rw-r--r--examples/stm32l4/src/bin/spi.rs9
-rw-r--r--examples/stm32l4/src/bin/usart.rs9
-rw-r--r--examples/stm32l4/src/bin/usart_dma.rs9
-rw-r--r--examples/stm32wb55/Cargo.toml1
-rw-r--r--examples/stm32wb55/src/bin/blinky.rs8
21 files changed, 36 insertions, 221 deletions
diff --git a/examples/stm32f4/src/bin/blinky.rs b/examples/stm32f4/src/bin/blinky.rs
index 0e411d782..da512dcec 100644
--- a/examples/stm32f4/src/bin/blinky.rs
+++ b/examples/stm32f4/src/bin/blinky.rs
@@ -25,15 +25,6 @@ fn main() -> ! {
25 w.set_dbg_standby(true); 25 w.set_dbg_standby(true);
26 w.set_dbg_stop(true); 26 w.set_dbg_stop(true);
27 }); 27 });
28
29 pac::RCC.ahb1enr().modify(|w| {
30 w.set_gpioaen(true);
31 w.set_gpioben(true);
32 w.set_gpiocen(true);
33 w.set_gpioden(true);
34 w.set_gpioeen(true);
35 w.set_gpiofen(true);
36 });
37 } 28 }
38 29
39 let p = embassy_stm32::init(Default::default()); 30 let p = embassy_stm32::init(Default::default());
diff --git a/examples/stm32f4/src/bin/button.rs b/examples/stm32f4/src/bin/button.rs
index 901fce418..395ec4847 100644
--- a/examples/stm32f4/src/bin/button.rs
+++ b/examples/stm32f4/src/bin/button.rs
@@ -24,15 +24,6 @@ fn main() -> ! {
24 w.set_dbg_standby(true); 24 w.set_dbg_standby(true);
25 w.set_dbg_stop(true); 25 w.set_dbg_stop(true);
26 }); 26 });
27
28 pac::RCC.ahb1enr().modify(|w| {
29 w.set_gpioaen(true);
30 w.set_gpioben(true);
31 w.set_gpiocen(true);
32 w.set_gpioden(true);
33 w.set_gpioeen(true);
34 w.set_gpiofen(true);
35 });
36 } 27 }
37 28
38 let p = embassy_stm32::init(Default::default()); 29 let p = embassy_stm32::init(Default::default());
diff --git a/examples/stm32f4/src/bin/button_exti.rs b/examples/stm32f4/src/bin/button_exti.rs
index 63c273b1a..bccd3870d 100644
--- a/examples/stm32f4/src/bin/button_exti.rs
+++ b/examples/stm32f4/src/bin/button_exti.rs
@@ -48,15 +48,6 @@ fn main() -> ! {
48 w.set_dbg_stop(true); 48 w.set_dbg_stop(true);
49 }); 49 });
50 50
51 pac::RCC.ahb1enr().modify(|w| {
52 w.set_gpioaen(true);
53 w.set_gpioben(true);
54 w.set_gpiocen(true);
55 w.set_gpioden(true);
56 w.set_gpioeen(true);
57 w.set_gpiofen(true);
58 });
59
60 // EXTI clock 51 // EXTI clock
61 pac::RCC.apb2enr().modify(|w| { 52 pac::RCC.apb2enr().modify(|w| {
62 w.set_syscfgen(true); 53 w.set_syscfgen(true);
diff --git a/examples/stm32f4/src/bin/spi.rs b/examples/stm32f4/src/bin/spi.rs
index f8c9997ed..40b0748d7 100644
--- a/examples/stm32f4/src/bin/spi.rs
+++ b/examples/stm32f4/src/bin/spi.rs
@@ -14,11 +14,11 @@ use embedded_hal::digital::v2::OutputPin;
14use example_common::*; 14use example_common::*;
15 15
16use cortex_m_rt::entry; 16use cortex_m_rt::entry;
17use embassy_stm32::dbgmcu::Dbgmcu;
17use embassy_stm32::pac; 18use embassy_stm32::pac;
18use embassy_stm32::spi::{Config, Spi}; 19use embassy_stm32::spi::{Config, Spi};
19use embassy_stm32::time::Hertz; 20use embassy_stm32::time::Hertz;
20use embedded_hal::blocking::spi::Transfer; 21use embedded_hal::blocking::spi::Transfer;
21use embassy_stm32::dbgmcu::Dbgmcu;
22 22
23#[entry] 23#[entry]
24fn main() -> ! { 24fn main() -> ! {
@@ -26,15 +26,6 @@ fn main() -> ! {
26 26
27 unsafe { 27 unsafe {
28 Dbgmcu::enable_all(); 28 Dbgmcu::enable_all();
29
30 pac::RCC.ahb1enr().modify(|w| {
31 w.set_gpioaen(true);
32 w.set_gpioben(true);
33 w.set_gpiocen(true);
34 w.set_gpioden(true);
35 w.set_gpioeen(true);
36 w.set_gpiofen(true);
37 });
38 } 29 }
39 30
40 let p = embassy_stm32::init(Default::default()); 31 let p = embassy_stm32::init(Default::default());
diff --git a/examples/stm32f4/src/bin/usart.rs b/examples/stm32f4/src/bin/usart.rs
index dbe17c910..51a2e0fd0 100644
--- a/examples/stm32f4/src/bin/usart.rs
+++ b/examples/stm32f4/src/bin/usart.rs
@@ -47,15 +47,6 @@ fn main() -> ! {
47 w.set_dbg_standby(true); 47 w.set_dbg_standby(true);
48 w.set_dbg_stop(true); 48 w.set_dbg_stop(true);
49 }); 49 });
50
51 pac::RCC.ahb1enr().modify(|w| {
52 w.set_gpioaen(true);
53 w.set_gpioben(true);
54 w.set_gpiocen(true);
55 w.set_gpioden(true);
56 w.set_gpioeen(true);
57 w.set_gpiofen(true);
58 });
59 } 50 }
60 51
61 let executor = EXECUTOR.put(Executor::new()); 52 let executor = EXECUTOR.put(Executor::new());
diff --git a/examples/stm32h7/src/bin/blinky.rs b/examples/stm32h7/src/bin/blinky.rs
index c41cc789d..54e139e79 100644
--- a/examples/stm32h7/src/bin/blinky.rs
+++ b/examples/stm32h7/src/bin/blinky.rs
@@ -28,8 +28,7 @@ fn main() -> ! {
28 28
29 let rcc = pp.RCC.constrain(); 29 let rcc = pp.RCC.constrain();
30 30
31 rcc 31 rcc.sys_ck(96.mhz())
32 .sys_ck(96.mhz())
33 .pclk1(48.mhz()) 32 .pclk1(48.mhz())
34 .pclk2(48.mhz()) 33 .pclk2(48.mhz())
35 .pclk3(48.mhz()) 34 .pclk3(48.mhz())
@@ -47,16 +46,6 @@ fn main() -> ! {
47 w 46 w
48 }); 47 });
49 48
50 pp.RCC.ahb4enr.modify(|_, w| {
51 w.gpioaen().set_bit();
52 w.gpioben().set_bit();
53 w.gpiocen().set_bit();
54 w.gpioden().set_bit();
55 w.gpioeen().set_bit();
56 w.gpiofen().set_bit();
57 w
58 });
59
60 let p = embassy_stm32::init(Default::default()); 49 let p = embassy_stm32::init(Default::default());
61 50
62 let mut led = Output::new(p.PB14, Level::High, Speed::Low); 51 let mut led = Output::new(p.PB14, Level::High, Speed::Low);
diff --git a/examples/stm32h7/src/bin/dac.rs b/examples/stm32h7/src/bin/dac.rs
index 121956755..330f69aa1 100644
--- a/examples/stm32h7/src/bin/dac.rs
+++ b/examples/stm32h7/src/bin/dac.rs
@@ -13,9 +13,9 @@ use embassy_stm32::gpio::NoPin;
13use example_common::*; 13use example_common::*;
14 14
15use cortex_m_rt::entry; 15use cortex_m_rt::entry;
16use embassy_stm32::dac::{Channel, Dac, Value};
16use stm32h7::stm32h743 as pac; 17use stm32h7::stm32h743 as pac;
17use stm32h7xx_hal::prelude::*; 18use stm32h7xx_hal::prelude::*;
18use embassy_stm32::dac::{Dac, Value, Channel};
19 19
20#[entry] 20#[entry]
21fn main() -> ! { 21fn main() -> ! {
@@ -23,13 +23,11 @@ fn main() -> ! {
23 23
24 let pp = pac::Peripherals::take().unwrap(); 24 let pp = pac::Peripherals::take().unwrap();
25 25
26 let pwrcfg = pp.PWR.constrain() 26 let pwrcfg = pp.PWR.constrain().freeze();
27 .freeze();
28 27
29 let rcc = pp.RCC.constrain(); 28 let rcc = pp.RCC.constrain();
30 29
31 rcc 30 rcc.sys_ck(96.mhz())
32 .sys_ck(96.mhz())
33 .pclk1(48.mhz()) 31 .pclk1(48.mhz())
34 .pclk2(48.mhz()) 32 .pclk2(48.mhz())
35 .pclk3(48.mhz()) 33 .pclk3(48.mhz())
@@ -47,21 +45,11 @@ fn main() -> ! {
47 w 45 w
48 }); 46 });
49 47
50 pp.RCC.apb1lenr.modify(|_, w|{ 48 pp.RCC.apb1lenr.modify(|_, w| {
51 w.dac12en().set_bit(); 49 w.dac12en().set_bit();
52 w 50 w
53 }); 51 });
54 52
55 pp.RCC.ahb4enr.modify(|_, w| {
56 w.gpioaen().set_bit();
57 w.gpioben().set_bit();
58 w.gpiocen().set_bit();
59 w.gpioden().set_bit();
60 w.gpioeen().set_bit();
61 w.gpiofen().set_bit();
62 w
63 });
64
65 let p = embassy_stm32::init(Default::default()); 53 let p = embassy_stm32::init(Default::default());
66 54
67 let mut dac = Dac::new(p.DAC1, p.PA4, NoPin); 55 let mut dac = Dac::new(p.DAC1, p.PA4, NoPin);
@@ -79,11 +67,11 @@ use micromath::F32Ext;
79fn to_sine_wave(v: u8) -> u8 { 67fn to_sine_wave(v: u8) -> u8 {
80 if v >= 128 { 68 if v >= 128 {
81 // top half 69 // top half
82 let r = 3.14 * ( (v-128) as f32/ 128.0) ; 70 let r = 3.14 * ((v - 128) as f32 / 128.0);
83 (r.sin() * 128.0 + 127.0) as u8 71 (r.sin() * 128.0 + 127.0) as u8
84 } else { 72 } else {
85 // bottom half 73 // bottom half
86 let r = 3.14 + 3.14 * (v as f32/ 128.0); 74 let r = 3.14 + 3.14 * (v as f32 / 128.0);
87 (r.sin() * 128.0 + 127.0) as u8 75 (r.sin() * 128.0 + 127.0) as u8
88 } 76 }
89} 77}
diff --git a/examples/stm32h7/src/bin/eth.rs b/examples/stm32h7/src/bin/eth.rs
index 7dc02a75a..7ae80d6e3 100644
--- a/examples/stm32h7/src/bin/eth.rs
+++ b/examples/stm32h7/src/bin/eth.rs
@@ -106,8 +106,6 @@ static NET_RESOURCES: Forever<StackResources<1, 2, 8>> = Forever::new();
106 106
107#[entry] 107#[entry]
108fn main() -> ! { 108fn main() -> ! {
109 use stm32_metapac::RCC;
110
111 info!("Hello World!"); 109 info!("Hello World!");
112 110
113 info!("Setup RCC..."); 111 info!("Setup RCC...");
@@ -123,16 +121,6 @@ fn main() -> ! {
123 let mut rcc = Rcc::new(&mut p.RCC, RccConfig::default()); 121 let mut rcc = Rcc::new(&mut p.RCC, RccConfig::default());
124 rcc.enable_debug_wfe(&mut p.DBGMCU, true); 122 rcc.enable_debug_wfe(&mut p.DBGMCU, true);
125 123
126 unsafe {
127 RCC.ahb4enr().modify(|w| {
128 w.set_gpioaen(true);
129 w.set_gpioben(true);
130 w.set_gpiocen(true);
131 w.set_gpioden(true);
132 w.set_gpioien(true);
133 });
134 }
135
136 let rtc_int = interrupt_take!(TIM2); 124 let rtc_int = interrupt_take!(TIM2);
137 let rtc = TIMER_RTC.put(Clock::new(p.TIM2, rtc_int)); 125 let rtc = TIMER_RTC.put(Clock::new(p.TIM2, rtc_int));
138 rtc.start(); 126 rtc.start();
diff --git a/examples/stm32h7/src/bin/usart.rs b/examples/stm32h7/src/bin/usart.rs
index 143f94491..11e04f33c 100644
--- a/examples/stm32h7/src/bin/usart.rs
+++ b/examples/stm32h7/src/bin/usart.rs
@@ -77,16 +77,6 @@ fn main() -> ! {
77 w 77 w
78 }); 78 });
79 79
80 pp.RCC.ahb4enr.modify(|_, w| {
81 w.gpioaen().set_bit();
82 w.gpioben().set_bit();
83 w.gpiocen().set_bit();
84 w.gpioden().set_bit();
85 w.gpioeen().set_bit();
86 w.gpiofen().set_bit();
87 w
88 });
89
90 unsafe { embassy::time::set_clock(&ZeroClock) }; 80 unsafe { embassy::time::set_clock(&ZeroClock) };
91 81
92 let executor = EXECUTOR.put(Executor::new()); 82 let executor = EXECUTOR.put(Executor::new());
diff --git a/examples/stm32h7/src/bin/usart_dma.rs b/examples/stm32h7/src/bin/usart_dma.rs
index 907356500..fe59a2162 100644
--- a/examples/stm32h7/src/bin/usart_dma.rs
+++ b/examples/stm32h7/src/bin/usart_dma.rs
@@ -12,18 +12,18 @@ use core::fmt::Write;
12use embassy::executor::Executor; 12use embassy::executor::Executor;
13use embassy::time::Clock; 13use embassy::time::Clock;
14use embassy::util::Forever; 14use embassy::util::Forever;
15use embassy_stm32::dbgmcu::Dbgmcu;
15use embassy_stm32::dma::NoDma; 16use embassy_stm32::dma::NoDma;
16use embassy_stm32::usart::{Config, Uart}; 17use embassy_stm32::usart::{Config, Uart};
17use embassy_stm32::dbgmcu::Dbgmcu;
18use example_common::*;
19use embassy_traits::uart::Write as _Write; 18use embassy_traits::uart::Write as _Write;
19use example_common::*;
20 20
21use hal::prelude::*; 21use hal::prelude::*;
22use stm32h7xx_hal as hal; 22use stm32h7xx_hal as hal;
23 23
24use cortex_m_rt::entry; 24use cortex_m_rt::entry;
25use stm32h7::stm32h743 as pac;
26use heapless::String; 25use heapless::String;
26use stm32h7::stm32h743 as pac;
27 27
28#[embassy::task] 28#[embassy::task]
29async fn main_task() { 29async fn main_task() {
@@ -40,7 +40,6 @@ async fn main_task() {
40 40
41 info!("wrote DMA"); 41 info!("wrote DMA");
42 } 42 }
43
44} 43}
45 44
46struct ZeroClock; 45struct ZeroClock;
diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml
index 069c1434d..41c189c69 100644
--- a/examples/stm32l4/Cargo.toml
+++ b/examples/stm32l4/Cargo.toml
@@ -21,7 +21,6 @@ embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt", "def
21embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] } 21embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] }
22embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "unstable-pac", "stm32l4s5vi"] } 22embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "unstable-pac", "stm32l4s5vi"] }
23embassy-extras = {version = "0.1.0", path = "../../embassy-extras" } 23embassy-extras = {version = "0.1.0", path = "../../embassy-extras" }
24stm32l4 = { version = "0.13", features = ["stm32l4x5" ] }
25stm32l4xx-hal = { version = "0.6.0", features = ["stm32l4x5"] } 24stm32l4xx-hal = { version = "0.6.0", features = ["stm32l4x5"] }
26 25
27defmt = "0.2.0" 26defmt = "0.2.0"
diff --git a/examples/stm32l4/src/bin/adc.rs b/examples/stm32l4/src/bin/adc.rs
index a3c44d3c1..6894d664a 100644
--- a/examples/stm32l4/src/bin/adc.rs
+++ b/examples/stm32l4/src/bin/adc.rs
@@ -11,11 +11,10 @@ mod example_common;
11 11
12use example_common::*; 12use example_common::*;
13 13
14use cortex_m_rt::entry;
15//use stm32f4::stm32f429 as pac;
16use cortex_m::delay::Delay; 14use cortex_m::delay::Delay;
15use cortex_m_rt::entry;
17use embassy_stm32::adc::{Adc, Resolution}; 16use embassy_stm32::adc::{Adc, Resolution};
18use stm32l4::stm32l4x5 as pac; 17use embassy_stm32::pac;
19use stm32l4xx_hal::prelude::*; 18use stm32l4xx_hal::prelude::*;
20use stm32l4xx_hal::rcc::PllSource; 19use stm32l4xx_hal::rcc::PllSource;
21 20
@@ -40,31 +39,16 @@ fn main() -> ! {
40 .pll_source(PllSource::HSI16) 39 .pll_source(PllSource::HSI16)
41 .freeze(&mut flash.acr, &mut pwr); 40 .freeze(&mut flash.acr, &mut pwr);
42 41
43 let pp = unsafe { pac::Peripherals::steal() }; 42 unsafe {
44 43 pac::RCC.ccipr().modify(|w| {
45 pp.RCC.ccipr.modify(|_, w| { 44 w.set_adcsel(0b11);
46 unsafe { 45 });
47 w.adcsel().bits(0b11); 46 pac::DBGMCU.cr().modify(|w| {
48 } 47 w.set_dbg_sleep(true);
49 w 48 w.set_dbg_standby(true);
50 }); 49 w.set_dbg_stop(true);
51 50 });
52 pp.DBGMCU.cr.modify(|_, w| { 51 }
53 w.dbg_sleep().set_bit();
54 w.dbg_standby().set_bit();
55 w.dbg_stop().set_bit()
56 });
57
58 pp.RCC.ahb2enr.modify(|_, w| {
59 w.adcen().set_bit();
60 w.gpioaen().set_bit();
61 w.gpioben().set_bit();
62 w.gpiocen().set_bit();
63 w.gpioden().set_bit();
64 w.gpioeen().set_bit();
65 w.gpiofen().set_bit();
66 w
67 });
68 52
69 let p = embassy_stm32::init(Default::default()); 53 let p = embassy_stm32::init(Default::default());
70 54
diff --git a/examples/stm32l4/src/bin/blinky.rs b/examples/stm32l4/src/bin/blinky.rs
index 0af16867f..ba271b9ee 100644
--- a/examples/stm32l4/src/bin/blinky.rs
+++ b/examples/stm32l4/src/bin/blinky.rs
@@ -24,15 +24,6 @@ fn main() -> ! {
24 w.set_dbg_standby(true); 24 w.set_dbg_standby(true);
25 w.set_dbg_stop(true); 25 w.set_dbg_stop(true);
26 }); 26 });
27
28 pac::RCC.ahb2enr().modify(|w| {
29 w.set_gpioaen(true);
30 w.set_gpioben(true);
31 w.set_gpiocen(true);
32 w.set_gpioden(true);
33 w.set_gpioeen(true);
34 w.set_gpiofen(true);
35 });
36 } 27 }
37 28
38 let p = embassy_stm32::init(Default::default()); 29 let p = embassy_stm32::init(Default::default());
diff --git a/examples/stm32l4/src/bin/button.rs b/examples/stm32l4/src/bin/button.rs
index c72463605..9d2fc2f21 100644
--- a/examples/stm32l4/src/bin/button.rs
+++ b/examples/stm32l4/src/bin/button.rs
@@ -28,15 +28,6 @@ fn main() -> ! {
28 pac::RCC.apb2enr().modify(|w| { 28 pac::RCC.apb2enr().modify(|w| {
29 w.set_syscfgen(true); 29 w.set_syscfgen(true);
30 }); 30 });
31
32 pac::RCC.ahb2enr().modify(|w| {
33 w.set_gpioaen(true);
34 w.set_gpioben(true);
35 w.set_gpiocen(true);
36 w.set_gpioden(true);
37 w.set_gpioeen(true);
38 w.set_gpiofen(true);
39 });
40 } 31 }
41 32
42 let p = embassy_stm32::init(Default::default()); 33 let p = embassy_stm32::init(Default::default());
diff --git a/examples/stm32l4/src/bin/button_exti.rs b/examples/stm32l4/src/bin/button_exti.rs
index 6a06e4370..83537d92e 100644
--- a/examples/stm32l4/src/bin/button_exti.rs
+++ b/examples/stm32l4/src/bin/button_exti.rs
@@ -59,15 +59,6 @@ fn main() -> ! {
59 pac::RCC.apb2enr().modify(|w| { 59 pac::RCC.apb2enr().modify(|w| {
60 w.set_syscfgen(true); 60 w.set_syscfgen(true);
61 }); 61 });
62
63 pac::RCC.ahb2enr().modify(|w| {
64 w.set_gpioaen(true);
65 w.set_gpioben(true);
66 w.set_gpiocen(true);
67 w.set_gpioden(true);
68 w.set_gpioeen(true);
69 w.set_gpiofen(true);
70 });
71 } 62 }
72 63
73 unsafe { embassy::time::set_clock(&ZeroClock) }; 64 unsafe { embassy::time::set_clock(&ZeroClock) };
diff --git a/examples/stm32l4/src/bin/dac.rs b/examples/stm32l4/src/bin/dac.rs
index 5317ac35f..1f7f8d46a 100644
--- a/examples/stm32l4/src/bin/dac.rs
+++ b/examples/stm32l4/src/bin/dac.rs
@@ -13,11 +13,10 @@ use embassy_stm32::gpio::NoPin;
13use example_common::*; 13use example_common::*;
14 14
15use cortex_m_rt::entry; 15use cortex_m_rt::entry;
16//use stm32f4::stm32f429 as pac;
17use embassy_stm32::dac::{Channel, Dac, Value}; 16use embassy_stm32::dac::{Channel, Dac, Value};
18use stm32l4::stm32l4x5 as pac; 17use embassy_stm32::pac;
18use stm32l4xx_hal::prelude::*;
19use stm32l4xx_hal::rcc::PllSource; 19use stm32l4xx_hal::rcc::PllSource;
20use stm32l4xx_hal::{prelude::*};
21 20
22#[entry] 21#[entry]
23fn main() -> ! { 22fn main() -> ! {
@@ -30,36 +29,23 @@ fn main() -> ! {
30 29
31 // TRY the other clock configuration 30 // TRY the other clock configuration
32 // let clocks = rcc.cfgr.freeze(&mut flash.acr); 31 // let clocks = rcc.cfgr.freeze(&mut flash.acr);
33 rcc 32 rcc.cfgr
34 .cfgr
35 .sysclk(80.mhz()) 33 .sysclk(80.mhz())
36 .pclk1(80.mhz()) 34 .pclk1(80.mhz())
37 .pclk2(80.mhz()) 35 .pclk2(80.mhz())
38 .pll_source(PllSource::HSI16) 36 .pll_source(PllSource::HSI16)
39 .freeze(&mut flash.acr, &mut pwr); 37 .freeze(&mut flash.acr, &mut pwr);
40 38
41 let pp = unsafe { pac::Peripherals::steal() }; 39 unsafe {
42 40 pac::DBGMCU.cr().modify(|w| {
43 pp.DBGMCU.cr.modify(|_, w| { 41 w.set_dbg_sleep(true);
44 w.dbg_sleep().set_bit(); 42 w.set_dbg_standby(true);
45 w.dbg_standby().set_bit(); 43 w.set_dbg_stop(true);
46 w.dbg_stop().set_bit() 44 });
47 }); 45 pac::RCC.apb1enr1().modify(|w| {
48 46 w.set_dac1en(true);
49 pp.RCC.apb1enr1.modify(|_, w| { 47 });
50 w.dac1en().set_bit(); 48 }
51 w
52 });
53
54 pp.RCC.ahb2enr.modify(|_, w| {
55 w.gpioaen().set_bit();
56 w.gpioben().set_bit();
57 w.gpiocen().set_bit();
58 w.gpioden().set_bit();
59 w.gpioeen().set_bit();
60 w.gpiofen().set_bit();
61 w
62 });
63 49
64 let p = embassy_stm32::init(Default::default()); 50 let p = embassy_stm32::init(Default::default());
65 51
diff --git a/examples/stm32l4/src/bin/spi.rs b/examples/stm32l4/src/bin/spi.rs
index 7cac01fd4..8702fe0cc 100644
--- a/examples/stm32l4/src/bin/spi.rs
+++ b/examples/stm32l4/src/bin/spi.rs
@@ -32,15 +32,6 @@ fn main() -> ! {
32 pac::RCC.apb2enr().modify(|w| { 32 pac::RCC.apb2enr().modify(|w| {
33 w.set_syscfgen(true); 33 w.set_syscfgen(true);
34 }); 34 });
35
36 pac::RCC.ahb2enr().modify(|w| {
37 w.set_gpioaen(true);
38 w.set_gpioben(true);
39 w.set_gpiocen(true);
40 w.set_gpioden(true);
41 w.set_gpioeen(true);
42 w.set_gpiofen(true);
43 });
44 } 35 }
45 36
46 let p = embassy_stm32::init(Default::default()); 37 let p = embassy_stm32::init(Default::default());
diff --git a/examples/stm32l4/src/bin/usart.rs b/examples/stm32l4/src/bin/usart.rs
index f572b1eff..1c2a861e2 100644
--- a/examples/stm32l4/src/bin/usart.rs
+++ b/examples/stm32l4/src/bin/usart.rs
@@ -60,15 +60,6 @@ fn main() -> ! {
60 w.set_dma1en(true); 60 w.set_dma1en(true);
61 }); 61 });
62 62
63 pac::RCC.ahb2enr().modify(|w| {
64 w.set_gpioaen(true);
65 w.set_gpioben(true);
66 w.set_gpiocen(true);
67 w.set_gpioden(true);
68 w.set_gpioeen(true);
69 w.set_gpiofen(true);
70 });
71
72 pac::RCC.apb1enr1().modify(|w| { 63 pac::RCC.apb1enr1().modify(|w| {
73 w.set_uart4en(true); 64 w.set_uart4en(true);
74 }); 65 });
diff --git a/examples/stm32l4/src/bin/usart_dma.rs b/examples/stm32l4/src/bin/usart_dma.rs
index e325e3da3..b51699acf 100644
--- a/examples/stm32l4/src/bin/usart_dma.rs
+++ b/examples/stm32l4/src/bin/usart_dma.rs
@@ -67,15 +67,6 @@ fn main() -> ! {
67 w.set_dma1en(true); 67 w.set_dma1en(true);
68 w.set_dma2en(true); 68 w.set_dma2en(true);
69 }); 69 });
70
71 pac::RCC.ahb2enr().modify(|w| {
72 w.set_gpioaen(true);
73 w.set_gpioben(true);
74 w.set_gpiocen(true);
75 w.set_gpioden(true);
76 w.set_gpioeen(true);
77 w.set_gpiofen(true);
78 });
79 } 70 }
80 71
81 unsafe { embassy::time::set_clock(&ZeroClock) }; 72 unsafe { embassy::time::set_clock(&ZeroClock) };
diff --git a/examples/stm32wb55/Cargo.toml b/examples/stm32wb55/Cargo.toml
index d3d128e87..92813ccd0 100644
--- a/examples/stm32wb55/Cargo.toml
+++ b/examples/stm32wb55/Cargo.toml
@@ -21,7 +21,6 @@ embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt", "def
21embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] } 21embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] }
22embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "stm32wb55cc"] } 22embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "stm32wb55cc"] }
23embassy-extras = {version = "0.1.0", path = "../../embassy-extras" } 23embassy-extras = {version = "0.1.0", path = "../../embassy-extras" }
24stm32wb-pac = "0.2"
25 24
26defmt = "0.2.0" 25defmt = "0.2.0"
27defmt-rtt = "0.2.0" 26defmt-rtt = "0.2.0"
diff --git a/examples/stm32wb55/src/bin/blinky.rs b/examples/stm32wb55/src/bin/blinky.rs
index d53ad611a..ae11c9861 100644
--- a/examples/stm32wb55/src/bin/blinky.rs
+++ b/examples/stm32wb55/src/bin/blinky.rs
@@ -13,19 +13,11 @@ use embedded_hal::digital::v2::OutputPin;
13use example_common::*; 13use example_common::*;
14 14
15use cortex_m_rt::entry; 15use cortex_m_rt::entry;
16use stm32wb_pac as pac;
17 16
18#[entry] 17#[entry]
19fn main() -> ! { 18fn main() -> ! {
20 info!("Hello World!"); 19 info!("Hello World!");
21 20
22 let pp = pac::Peripherals::take().unwrap();
23
24 pp.RCC.ahb2enr.modify(|_, w| {
25 w.gpioben().set_bit();
26 w
27 });
28
29 let p = embassy_stm32::init(Default::default()); 21 let p = embassy_stm32::init(Default::default());
30 22
31 let mut led = Output::new(p.PB0, Level::High, Speed::Low); 23 let mut led = Output::new(p.PB0, Level::High, Speed::Low);