diff options
| author | Joël Schulz-Ansres <[email protected]> | 2024-05-24 01:05:56 +0200 |
|---|---|---|
| committer | Joël Schulz-Ansres <[email protected]> | 2024-05-24 01:05:56 +0200 |
| commit | 5cba97821f6f3e716452d38bb0c645b51592abc0 (patch) | |
| tree | 8dd13bd785c2f2183f3241558e3ea58026cb3a43 | |
| parent | f285a545be80772d1b9dd0d98f8ec89184deb388 (diff) | |
Naming: Change pullup to pull
| -rw-r--r-- | embassy-stm32/src/spi/mod.rs | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 9238e0f6f..5fc8691ac 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs | |||
| @@ -54,7 +54,7 @@ pub struct Config { | |||
| 54 | /// | 54 | /// |
| 55 | /// There are some ICs that require a pull-up on the MISO pin for some applications. | 55 | /// There are some ICs that require a pull-up on the MISO pin for some applications. |
| 56 | /// If you are unsure, you probably don't need this. | 56 | /// If you are unsure, you probably don't need this. |
| 57 | pub miso_pullup: Pull, | 57 | pub miso_pull: Pull, |
| 58 | } | 58 | } |
| 59 | 59 | ||
| 60 | impl Default for Config { | 60 | impl Default for Config { |
| @@ -63,7 +63,7 @@ impl Default for Config { | |||
| 63 | mode: MODE_0, | 63 | mode: MODE_0, |
| 64 | bit_order: BitOrder::MsbFirst, | 64 | bit_order: BitOrder::MsbFirst, |
| 65 | frequency: Hertz(1_000_000), | 65 | frequency: Hertz(1_000_000), |
| 66 | miso_pullup: Pull::None, | 66 | miso_pull: Pull::None, |
| 67 | } | 67 | } |
| 68 | } | 68 | } |
| 69 | } | 69 | } |
| @@ -279,7 +279,7 @@ impl<'d, M: PeriMode> Spi<'d, M> { | |||
| 279 | BitOrder::MsbFirst | 279 | BitOrder::MsbFirst |
| 280 | }; | 280 | }; |
| 281 | 281 | ||
| 282 | let miso_pullup = match &self.miso { | 282 | let miso_pull = match &self.miso { |
| 283 | None => Pull::None, | 283 | None => Pull::None, |
| 284 | Some(pin) => pin.pull(), | 284 | Some(pin) => pin.pull(), |
| 285 | }; | 285 | }; |
| @@ -295,7 +295,7 @@ impl<'d, M: PeriMode> Spi<'d, M> { | |||
| 295 | mode: Mode { polarity, phase }, | 295 | mode: Mode { polarity, phase }, |
| 296 | bit_order, | 296 | bit_order, |
| 297 | frequency, | 297 | frequency, |
| 298 | miso_pullup, | 298 | miso_pull, |
| 299 | } | 299 | } |
| 300 | } | 300 | } |
| 301 | 301 | ||
| @@ -418,7 +418,7 @@ impl<'d> Spi<'d, Blocking> { | |||
| 418 | peri, | 418 | peri, |
| 419 | new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), | 419 | new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), |
| 420 | new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), | 420 | new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), |
| 421 | new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pullup), | 421 | new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pull), |
| 422 | None, | 422 | None, |
| 423 | None, | 423 | None, |
| 424 | config, | 424 | config, |
| @@ -436,7 +436,7 @@ impl<'d> Spi<'d, Blocking> { | |||
| 436 | peri, | 436 | peri, |
| 437 | new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), | 437 | new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), |
| 438 | None, | 438 | None, |
| 439 | new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pullup), | 439 | new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pull), |
| 440 | None, | 440 | None, |
| 441 | None, | 441 | None, |
| 442 | config, | 442 | config, |
