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authorThales Fragoso <[email protected]>2021-07-28 17:32:36 -0300
committerThales Fragoso <[email protected]>2021-07-29 18:43:15 -0300
commit5cfb9adad807954148310bb56ad98e74718ceca6 (patch)
treea2795928042322256f480c619c0be19a57f57b0d
parente7714983b3f6ff5084e1cb27bc4de794f98081fd (diff)
f4-pll: Add max values per chip
Diffstat
-rw-r--r--embassy-stm32/src/rcc/f4/max.rs268
-rw-r--r--embassy-stm32/src/rcc/f4/mod.rs16
-rw-r--r--examples/stm32f4/src/bin/hello.rs2
3 files changed, 273 insertions, 13 deletions
diff --git a/embassy-stm32/src/rcc/f4/max.rs b/embassy-stm32/src/rcc/f4/max.rs
new file mode 100644
index 000000000..03e1e9833
--- /dev/null
+++ b/embassy-stm32/src/rcc/f4/max.rs
@@ -0,0 +1,268 @@
1#[cfg(any(
2 feature = "stm32f401cb",
3 feature = "stm32f401cc",
4 feature = "stm32f401cd",
5 feature = "stm32f401ce",
6 feature = "stm32f401rb",
7 feature = "stm32f401rc",
8 feature = "stm32f401rd",
9 feature = "stm32f401re",
10 feature = "stm32f401vb",
11 feature = "stm32f401vc",
12 feature = "stm32f401vd",
13 feature = "stm32f401ve",
14))]
15pub(crate) const SYSCLK_MAX: u32 = 84_000_000;
16
17#[cfg(any(
18 feature = "stm32f405oe",
19 feature = "stm32f405og",
20 feature = "stm32f405rg",
21 feature = "stm32f405vg",
22 feature = "stm32f405zg",
23 feature = "stm32f407ie",
24 feature = "stm32f407ig",
25 feature = "stm32f407ve",
26 feature = "stm32f407vg",
27 feature = "stm32f407ze",
28 feature = "stm32f407zg",
29 feature = "stm32f415og",
30 feature = "stm32f415rg",
31 feature = "stm32f415vg",
32 feature = "stm32f415zg",
33 feature = "stm32f417ie",
34 feature = "stm32f417ig",
35 feature = "stm32f417ve",
36 feature = "stm32f417vg",
37 feature = "stm32f417ze",
38 feature = "stm32f417zg",
39))]
40pub(crate) const SYSCLK_MAX: u32 = 168_000_000;
41
42#[cfg(any(
43 feature = "stm32f410c8",
44 feature = "stm32f410cb",
45 feature = "stm32f410r8",
46 feature = "stm32f410rb",
47 feature = "stm32f410t8",
48 feature = "stm32f410tb",
49 feature = "stm32f411cc",
50 feature = "stm32f411ce",
51 feature = "stm32f411rc",
52 feature = "stm32f411re",
53 feature = "stm32f411vc",
54 feature = "stm32f411ve",
55 feature = "stm32f412ce",
56 feature = "stm32f412cg",
57 feature = "stm32f412re",
58 feature = "stm32f412rg",
59 feature = "stm32f412ve",
60 feature = "stm32f412vg",
61 feature = "stm32f412ze",
62 feature = "stm32f412zg",
63 feature = "stm32f413cg",
64 feature = "stm32f413ch",
65 feature = "stm32f413mg",
66 feature = "stm32f413mh",
67 feature = "stm32f413rg",
68 feature = "stm32f413rh",
69 feature = "stm32f413vg",
70 feature = "stm32f413vh",
71 feature = "stm32f413zg",
72 feature = "stm32f413zh",
73 feature = "stm32f423ch",
74 feature = "stm32f423mh",
75 feature = "stm32f423rh",
76 feature = "stm32f423vh",
77 feature = "stm32f423zh",
78))]
79pub(crate) const SYSCLK_MAX: u32 = 100_000_000;
80
81#[cfg(any(
82 feature = "stm32f427ag",
83 feature = "stm32f427ai",
84 feature = "stm32f427ig",
85 feature = "stm32f427ii",
86 feature = "stm32f427vg",
87 feature = "stm32f427vi",
88 feature = "stm32f427zg",
89 feature = "stm32f427zi",
90 feature = "stm32f429ag",
91 feature = "stm32f429ai",
92 feature = "stm32f429be",
93 feature = "stm32f429bg",
94 feature = "stm32f429bi",
95 feature = "stm32f429ie",
96 feature = "stm32f429ig",
97 feature = "stm32f429ii",
98 feature = "stm32f429ne",
99 feature = "stm32f429ng",
100 feature = "stm32f429ni",
101 feature = "stm32f429ve",
102 feature = "stm32f429vg",
103 feature = "stm32f429vi",
104 feature = "stm32f429ze",
105 feature = "stm32f429zg",
106 feature = "stm32f429zi",
107 feature = "stm32f437ai",
108 feature = "stm32f437ig",
109 feature = "stm32f437ii",
110 feature = "stm32f437vg",
111 feature = "stm32f437vi",
112 feature = "stm32f437zg",
113 feature = "stm32f437zi",
114 feature = "stm32f439ai",
115 feature = "stm32f439bg",
116 feature = "stm32f439bi",
117 feature = "stm32f439ig",
118 feature = "stm32f439ii",
119 feature = "stm32f439ng",
120 feature = "stm32f439ni",
121 feature = "stm32f439vg",
122 feature = "stm32f439vi",
123 feature = "stm32f439zg",
124 feature = "stm32f439zi",
125 feature = "stm32f446mc",
126 feature = "stm32f446me",
127 feature = "stm32f446rc",
128 feature = "stm32f446re",
129 feature = "stm32f446vc",
130 feature = "stm32f446ve",
131 feature = "stm32f446zc",
132 feature = "stm32f446ze",
133 feature = "stm32f469ae",
134 feature = "stm32f469ag",
135 feature = "stm32f469ai",
136 feature = "stm32f469be",
137 feature = "stm32f469bg",
138 feature = "stm32f469bi",
139 feature = "stm32f469ie",
140 feature = "stm32f469ig",
141 feature = "stm32f469ii",
142 feature = "stm32f469ne",
143 feature = "stm32f469ng",
144 feature = "stm32f469ni",
145 feature = "stm32f469ve",
146 feature = "stm32f469vg",
147 feature = "stm32f469vi",
148 feature = "stm32f469ze",
149 feature = "stm32f469zg",
150 feature = "stm32f469zi",
151 feature = "stm32f479ag",
152 feature = "stm32f479ai",
153 feature = "stm32f479bg",
154 feature = "stm32f479bi",
155 feature = "stm32f479ig",
156 feature = "stm32f479ii",
157 feature = "stm32f479ng",
158 feature = "stm32f479ni",
159 feature = "stm32f479vg",
160 feature = "stm32f479vi",
161 feature = "stm32f479zg",
162 feature = "stm32f479zi",
163))]
164pub(crate) const SYSCLK_MAX: u32 = 180_000_000;
165
166#[cfg(any(
167 feature = "stm32f401cb",
168 feature = "stm32f401cc",
169 feature = "stm32f401cd",
170 feature = "stm32f401ce",
171 feature = "stm32f401rb",
172 feature = "stm32f401rc",
173 feature = "stm32f401rd",
174 feature = "stm32f401re",
175 feature = "stm32f401vb",
176 feature = "stm32f401vc",
177 feature = "stm32f401vd",
178 feature = "stm32f401ve",
179 feature = "stm32f410c8",
180 feature = "stm32f410cb",
181 feature = "stm32f410r8",
182 feature = "stm32f410rb",
183 feature = "stm32f410t8",
184 feature = "stm32f410tb",
185 feature = "stm32f411cc",
186 feature = "stm32f411ce",
187 feature = "stm32f411rc",
188 feature = "stm32f411re",
189 feature = "stm32f411vc",
190 feature = "stm32f411ve",
191 feature = "stm32f412ce",
192 feature = "stm32f412cg",
193 feature = "stm32f412re",
194 feature = "stm32f412rg",
195 feature = "stm32f412ve",
196 feature = "stm32f412vg",
197 feature = "stm32f412ze",
198 feature = "stm32f412zg",
199 feature = "stm32f413cg",
200 feature = "stm32f413ch",
201 feature = "stm32f413mg",
202 feature = "stm32f413mh",
203 feature = "stm32f413rg",
204 feature = "stm32f413rh",
205 feature = "stm32f413vg",
206 feature = "stm32f413vh",
207 feature = "stm32f413zg",
208 feature = "stm32f413zh",
209 feature = "stm32f423ch",
210 feature = "stm32f423mh",
211 feature = "stm32f423rh",
212 feature = "stm32f423vh",
213 feature = "stm32f423zh",
214))]
215pub(crate) const PCLK2_MAX: u32 = SYSCLK_MAX;
216
217#[cfg(not(any(
218 feature = "stm32f401cb",
219 feature = "stm32f401cc",
220 feature = "stm32f401cd",
221 feature = "stm32f401ce",
222 feature = "stm32f401rb",
223 feature = "stm32f401rc",
224 feature = "stm32f401rd",
225 feature = "stm32f401re",
226 feature = "stm32f401vb",
227 feature = "stm32f401vc",
228 feature = "stm32f401vd",
229 feature = "stm32f401ve",
230 feature = "stm32f410c8",
231 feature = "stm32f410cb",
232 feature = "stm32f410r8",
233 feature = "stm32f410rb",
234 feature = "stm32f410t8",
235 feature = "stm32f410tb",
236 feature = "stm32f411cc",
237 feature = "stm32f411ce",
238 feature = "stm32f411rc",
239 feature = "stm32f411re",
240 feature = "stm32f411vc",
241 feature = "stm32f411ve",
242 feature = "stm32f412ce",
243 feature = "stm32f412cg",
244 feature = "stm32f412re",
245 feature = "stm32f412rg",
246 feature = "stm32f412ve",
247 feature = "stm32f412vg",
248 feature = "stm32f412ze",
249 feature = "stm32f412zg",
250 feature = "stm32f413cg",
251 feature = "stm32f413ch",
252 feature = "stm32f413mg",
253 feature = "stm32f413mh",
254 feature = "stm32f413rg",
255 feature = "stm32f413rh",
256 feature = "stm32f413vg",
257 feature = "stm32f413vh",
258 feature = "stm32f413zg",
259 feature = "stm32f413zh",
260 feature = "stm32f423ch",
261 feature = "stm32f423mh",
262 feature = "stm32f423rh",
263 feature = "stm32f423vh",
264 feature = "stm32f423zh",
265)))]
266pub(crate) const PCLK2_MAX: u32 = SYSCLK_MAX / 2;
267
268pub(crate) const PCLK1_MAX: u32 = PCLK2_MAX / 2;
diff --git a/embassy-stm32/src/rcc/f4/mod.rs b/embassy-stm32/src/rcc/f4/mod.rs
index a5773ec13..0962d252c 100644
--- a/embassy-stm32/src/rcc/f4/mod.rs
+++ b/embassy-stm32/src/rcc/f4/mod.rs
@@ -5,13 +5,10 @@ use crate::time::Hertz;
5use core::marker::PhantomData; 5use core::marker::PhantomData;
6use embassy::util::Unborrow; 6use embassy::util::Unborrow;
7 7
8const HSI: u32 = 16_000_000; 8mod max;
9use max::{PCLK1_MAX, PCLK2_MAX};
9 10
10// TODO: This is for the F401, find a way to make it compile time configurable 11const HSI: u32 = 16_000_000;
11const SYSCLK_MIN: u32 = 24_000_000;
12const SYSCLK_MAX: u32 = 84_000_000;
13const PCLK2_MAX: u32 = SYSCLK_MAX;
14const PCLK1_MAX: u32 = PCLK2_MAX / 2;
15 12
16/// Clocks configutation 13/// Clocks configutation
17#[non_exhaustive] 14#[non_exhaustive]
@@ -69,7 +66,6 @@ impl<'d> Rcc<'d> {
69 } else { 66 } else {
70 sysclk 67 sysclk
71 }; 68 };
72 assert!((SYSCLK_MIN..=SYSCLK_MAX).contains(&sysclk), "sysclk");
73 69
74 let hclk = self.config.hclk.map(|h| h.0).unwrap_or(sysclk); 70 let hclk = self.config.hclk.map(|h| h.0).unwrap_or(sysclk);
75 let (hpre_bits, hpre_div) = match (sysclk + hclk - 1) / hclk { 71 let (hpre_bits, hpre_div) = match (sysclk + hclk - 1) / hclk {
@@ -247,7 +243,7 @@ impl<'d> Rcc<'d> {
247 .unwrap(); 243 .unwrap();
248 244
249 let vco_in = pllsrcclk / pllm; 245 let vco_in = pllsrcclk / pllm;
250 assert!((1_000_000..=2_000_000).contains(&vco_in), "vco_in"); 246 assert!((1_000_000..=2_000_000).contains(&vco_in));
251 247
252 // Main scaler, must result in >= 100MHz (>= 192MHz for F401) 248 // Main scaler, must result in >= 100MHz (>= 192MHz for F401)
253 // and <= 432MHz, min 50, max 432 249 // and <= 432MHz, min 50, max 432
@@ -266,10 +262,6 @@ impl<'d> Rcc<'d> {
266 } else { 262 } else {
267 sysclk * sysclk_div / vco_in 263 sysclk * sysclk_div / vco_in
268 }; 264 };
269 assert!(
270 (192_000_000..=432_000_000).contains(&(vco_in * plln)),
271 "plln"
272 );
273 265
274 let pllp = (sysclk_div / 2) - 1; 266 let pllp = (sysclk_div / 2) - 1;
275 267
diff --git a/examples/stm32f4/src/bin/hello.rs b/examples/stm32f4/src/bin/hello.rs
index 8d4be7150..8ee6c1ef8 100644
--- a/examples/stm32f4/src/bin/hello.rs
+++ b/examples/stm32f4/src/bin/hello.rs
@@ -19,7 +19,7 @@ mod example_common;
19 19
20fn config() -> Config { 20fn config() -> Config {
21 let mut rcc_config = RccConfig::default(); 21 let mut rcc_config = RccConfig::default();
22 rcc_config.sys_ck = Some(Hertz(32_000_000)); 22 rcc_config.sys_ck = Some(Hertz(84_000_000));
23 rcc_config.enable_debug_wfe = true; 23 rcc_config.enable_debug_wfe = true;
24 24
25 Config::default().rcc(rcc_config) 25 Config::default().rcc(rcc_config)
generated by cgit (git 2.34.1) at 2026-04-05 23:46:44 +0000