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| author | Dario Nieuwenhuis <[email protected]> | 2024-02-06 15:57:53 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2024-02-06 15:57:53 +0000 |
| commit | 5e09e7b01498a3cf22c12d2b1ec6a0844edca4a8 (patch) | |
| tree | f4344a3bd7a89523346f9896c5ec37e2f7dca8b6 | |
| parent | ad7d4494fad12f98c7e8e2b776bc12453a66be9a (diff) | |
| parent | e72cc9fb24340ddf1151078779b3f00de9bff3ab (diff) | |
Merge pull request #2537 from badrbouslikhin/main
fix(stm32/h7): use correct unit in vco clock check
| -rw-r--r-- | embassy-stm32/src/rcc/h.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs index 9ac2115f0..352e10816 100644 --- a/embassy-stm32/src/rcc/h.rs +++ b/embassy-stm32/src/rcc/h.rs | |||
| @@ -721,7 +721,7 @@ fn init_pll(num: usize, config: Option<Pll>, input: &PllInput) -> PllOutput { | |||
| 721 | } else if wide_allowed && VCO_WIDE_RANGE.contains(&vco_clk) { | 721 | } else if wide_allowed && VCO_WIDE_RANGE.contains(&vco_clk) { |
| 722 | Pllvcosel::WIDEVCO | 722 | Pllvcosel::WIDEVCO |
| 723 | } else { | 723 | } else { |
| 724 | panic!("pll vco_clk out of range: {} mhz", vco_clk.0) | 724 | panic!("pll vco_clk out of range: {} hz", vco_clk.0) |
| 725 | }; | 725 | }; |
| 726 | 726 | ||
| 727 | let p = config.divp.map(|div| { | 727 | let p = config.divp.map(|div| { |
