Use a critical section to listen on GPIO pins

2 files changed, 27 insertions, 29 deletions

diff --git a/embassy-stm32l0/src/exti.rs b/embassy-stm32l0/src/exti.rs
index 84c38ccc7..ca699a086 100644
--- a/embassy-stm32l0/src/exti.rs
+++ b/embassy-stm32l0/src/exti.rs
@@ -39,26 +39,32 @@ impl<'a> ExtiManager {
 pub struct ExtiPin<T, I> {
     pin: T,
     interrupt: I,
-    mgr: &'static mut ExtiManager,
+    mgr: &'static ExtiManager,
 }
 
-impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> WaitForRisingEdge
-    for ExtiPin<T, I>
-{
-    type Future<'a> = impl Future<Output = ()> + 'a;
-
-    fn wait_for_rising_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> {
+impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> ExtiPin<T, I> {
+    fn wait_for_edge<'a>(
+        self: Pin<&'a mut Self>,
+        edge: TriggerEdge,
+    ) -> impl Future<Output = ()> + 'a {
+        let line = self.pin.line();
         let s = unsafe { self.get_unchecked_mut() };
 
-        let line = s.pin.line();
         Exti::unpend(line);
 
         async move {
             let exti: EXTI = unsafe { mem::transmute(()) };
             let mut exti = Exti::new(exti);
+
             let fut = InterruptFuture::new(&mut s.interrupt);
 
-            exti.listen_gpio(&mut s.mgr.syscfg, s.pin.port(), line, TriggerEdge::Rising);
+            let port = s.pin.port();
+            let syscfg = &s.mgr.syscfg as *const _ as *mut SYSCFG;
+            cortex_m::interrupt::free(|_| {
+                let syscfg = unsafe { &mut *syscfg };
+                exti.listen_gpio(syscfg, port, line, edge);
+            });
+
             fut.await;
 
             Exti::unpend(line);
@@ -66,27 +72,23 @@ impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> WaitF
     }
 }
 
-impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> WaitForFallingEdge
+impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> WaitForRisingEdge
     for ExtiPin<T, I>
 {
     type Future<'a> = impl Future<Output = ()> + 'a;
 
-    fn wait_for_falling_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> {
-        let s = unsafe { self.get_unchecked_mut() };
-
-        let line = s.pin.line();
-        Exti::unpend(line);
-
-        async move {
-            let exti: EXTI = unsafe { mem::transmute(()) };
-            let mut exti = Exti::new(exti);
-            let fut = InterruptFuture::new(&mut s.interrupt);
+    fn wait_for_rising_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> {
+        self.wait_for_edge(TriggerEdge::Rising)
+    }
+}
 
-            exti.listen_gpio(&mut s.mgr.syscfg, s.pin.port(), line, TriggerEdge::Falling);
-            fut.await;
+impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> WaitForFallingEdge
+    for ExtiPin<T, I>
+{
+    type Future<'a> = impl Future<Output = ()> + 'a;
 
-            Exti::unpend(line);
-        }
+    fn wait_for_falling_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> {
+        self.wait_for_edge(TriggerEdge::Falling)
     }
 }
 
diff --git a/embassy-stm32l0/src/lib.rs b/embassy-stm32l0/src/lib.rs
index c4fa15c54..62f0f0375 100644
--- a/embassy-stm32l0/src/lib.rs
+++ b/embassy-stm32l0/src/lib.rs
@@ -4,11 +4,7 @@
 #![feature(type_alias_impl_trait)]
 #![allow(incomplete_features)]
 
-#[cfg(not(any(
-    feature = "stm32l0x1",
-    feature = "stm32l0x2",
-    feature = "stm32l0x3",
-)))]
+#[cfg(not(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",)))]
 compile_error!(
     "No chip feature activated. You must activate exactly one of the following features: "
 );