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authorROMemories <[email protected]>2025-05-21 11:17:59 +0200
committerROMemories <[email protected]>2025-05-21 14:18:43 +0200
commit65a22439d587746f6311ed05af740fd0cd455644 (patch)
treeb0af3fba79551eb3a40ca70c15e8abd79a59a614
parent156bf00009495bbdffefd67f920919b4cd35c418 (diff)
feat(stm32-l): provide a `const` constructor on `rcc::Config`
-rw-r--r--embassy-stm32/src/rcc/bd.rs18
-rw-r--r--embassy-stm32/src/rcc/hsi48.rs8
-rw-r--r--embassy-stm32/src/rcc/l.rs17
3 files changed, 30 insertions, 13 deletions
diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs
index 57aaba1c7..939c05907 100644
--- a/embassy-stm32/src/rcc/bd.rs
+++ b/embassy-stm32/src/rcc/bd.rs
@@ -92,6 +92,16 @@ pub struct LsConfig {
92} 92}
93 93
94impl LsConfig { 94impl LsConfig {
95 pub const fn new() -> Self {
96 // on L5, just the fact that LSI is enabled makes things crash.
97 // TODO: investigate.
98
99 #[cfg(not(stm32l5))]
100 return Self::default_lsi();
101 #[cfg(stm32l5)]
102 return Self::off();
103 }
104
95 pub const fn default_lse() -> Self { 105 pub const fn default_lse() -> Self {
96 Self { 106 Self {
97 rtc: RtcClockSource::LSE, 107 rtc: RtcClockSource::LSE,
@@ -124,13 +134,7 @@ impl LsConfig {
124 134
125impl Default for LsConfig { 135impl Default for LsConfig {
126 fn default() -> Self { 136 fn default() -> Self {
127 // on L5, just the fact that LSI is enabled makes things crash. 137 Self::new()
128 // TODO: investigate.
129
130 #[cfg(not(stm32l5))]
131 return Self::default_lsi();
132 #[cfg(stm32l5)]
133 return Self::off();
134 } 138 }
135} 139}
136 140
diff --git a/embassy-stm32/src/rcc/hsi48.rs b/embassy-stm32/src/rcc/hsi48.rs
index efabd059f..3ea5c96c9 100644
--- a/embassy-stm32/src/rcc/hsi48.rs
+++ b/embassy-stm32/src/rcc/hsi48.rs
@@ -18,9 +18,15 @@ pub struct Hsi48Config {
18 pub sync_from_usb: bool, 18 pub sync_from_usb: bool,
19} 19}
20 20
21impl Hsi48Config {
22 pub const fn new() -> Self {
23 Self { sync_from_usb: false }
24 }
25}
26
21impl Default for Hsi48Config { 27impl Default for Hsi48Config {
22 fn default() -> Self { 28 fn default() -> Self {
23 Self { sync_from_usb: false } 29 Self::new()
24 } 30 }
25} 31}
26 32
diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs
index 863942f1a..91e6ae07e 100644
--- a/embassy-stm32/src/rcc/l.rs
+++ b/embassy-stm32/src/rcc/l.rs
@@ -68,9 +68,9 @@ pub struct Config {
68 pub mux: super::mux::ClockMux, 68 pub mux: super::mux::ClockMux,
69} 69}
70 70
71impl Default for Config { 71impl Config {
72 #[inline] 72 #[inline]
73 fn default() -> Config { 73 pub const fn new() -> Self {
74 Config { 74 Config {
75 hse: None, 75 hse: None,
76 hsi: false, 76 hsi: false,
@@ -90,15 +90,22 @@ impl Default for Config {
90 #[cfg(any(stm32l47x, stm32l48x, stm32l49x, stm32l4ax, rcc_l4plus, stm32l5))] 90 #[cfg(any(stm32l47x, stm32l48x, stm32l49x, stm32l4ax, rcc_l4plus, stm32l5))]
91 pllsai2: None, 91 pllsai2: None,
92 #[cfg(crs)] 92 #[cfg(crs)]
93 hsi48: Some(Default::default()), 93 hsi48: Some(crate::rcc::Hsi48Config::new()),
94 ls: Default::default(), 94 ls: crate::rcc::LsConfig::new(),
95 #[cfg(any(stm32l0, stm32l1))] 95 #[cfg(any(stm32l0, stm32l1))]
96 voltage_scale: VoltageScale::RANGE1, 96 voltage_scale: VoltageScale::RANGE1,
97 mux: Default::default(), 97 mux: super::mux::ClockMux::default(),
98 } 98 }
99 } 99 }
100} 100}
101 101
102impl Default for Config {
103 #[inline]
104 fn default() -> Config {
105 Self::new()
106 }
107}
108
102#[cfg(stm32wb)] 109#[cfg(stm32wb)]
103pub const WPAN_DEFAULT: Config = Config { 110pub const WPAN_DEFAULT: Config = Config {
104 hse: Some(Hse { 111 hse: Some(Hse {