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| author | Dario Nieuwenhuis <[email protected]> | 2025-05-30 11:12:50 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2025-05-30 11:12:50 +0000 |
| commit | 675dd81a0f3da79feb35e8deaa81436e5e39b64e (patch) | |
| tree | b960a24443799eb4d09381ef20e2d468ed4f3843 | |
| parent | b024d5e892618947f81efd72f2c4224ae830d891 (diff) | |
| parent | 3d617007a257b814459e6e8c8c3ee4bce77469e3 (diff) | |
Merge pull request #4268 from Willdew/stm32-fix-ringbuffered-adc-set-sq
[embassy-stm32] Fixed runtime assertion failure on more the 6 ringbuffered ADC channels
| -rw-r--r-- | embassy-stm32/src/adc/ringbuffered_v2.rs | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs index fabf0284b..6f69e8486 100644 --- a/embassy-stm32/src/adc/ringbuffered_v2.rs +++ b/embassy-stm32/src/adc/ringbuffered_v2.rs | |||
| @@ -199,16 +199,16 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { | |||
| 199 | Sequence::Four => T::regs().sqr3().modify(|w| w.set_sq(3, channel.channel())), | 199 | Sequence::Four => T::regs().sqr3().modify(|w| w.set_sq(3, channel.channel())), |
| 200 | Sequence::Five => T::regs().sqr3().modify(|w| w.set_sq(4, channel.channel())), | 200 | Sequence::Five => T::regs().sqr3().modify(|w| w.set_sq(4, channel.channel())), |
| 201 | Sequence::Six => T::regs().sqr3().modify(|w| w.set_sq(5, channel.channel())), | 201 | Sequence::Six => T::regs().sqr3().modify(|w| w.set_sq(5, channel.channel())), |
| 202 | Sequence::Seven => T::regs().sqr2().modify(|w| w.set_sq(6, channel.channel())), | 202 | Sequence::Seven => T::regs().sqr2().modify(|w| w.set_sq(0, channel.channel())), |
| 203 | Sequence::Eight => T::regs().sqr2().modify(|w| w.set_sq(7, channel.channel())), | 203 | Sequence::Eight => T::regs().sqr2().modify(|w| w.set_sq(1, channel.channel())), |
| 204 | Sequence::Nine => T::regs().sqr2().modify(|w| w.set_sq(8, channel.channel())), | 204 | Sequence::Nine => T::regs().sqr2().modify(|w| w.set_sq(2, channel.channel())), |
| 205 | Sequence::Ten => T::regs().sqr2().modify(|w| w.set_sq(9, channel.channel())), | 205 | Sequence::Ten => T::regs().sqr2().modify(|w| w.set_sq(3, channel.channel())), |
| 206 | Sequence::Eleven => T::regs().sqr2().modify(|w| w.set_sq(10, channel.channel())), | 206 | Sequence::Eleven => T::regs().sqr2().modify(|w| w.set_sq(4, channel.channel())), |
| 207 | Sequence::Twelve => T::regs().sqr2().modify(|w| w.set_sq(11, channel.channel())), | 207 | Sequence::Twelve => T::regs().sqr2().modify(|w| w.set_sq(5, channel.channel())), |
| 208 | Sequence::Thirteen => T::regs().sqr1().modify(|w| w.set_sq(12, channel.channel())), | 208 | Sequence::Thirteen => T::regs().sqr1().modify(|w| w.set_sq(0, channel.channel())), |
| 209 | Sequence::Fourteen => T::regs().sqr1().modify(|w| w.set_sq(13, channel.channel())), | 209 | Sequence::Fourteen => T::regs().sqr1().modify(|w| w.set_sq(1, channel.channel())), |
| 210 | Sequence::Fifteen => T::regs().sqr1().modify(|w| w.set_sq(14, channel.channel())), | 210 | Sequence::Fifteen => T::regs().sqr1().modify(|w| w.set_sq(2, channel.channel())), |
| 211 | Sequence::Sixteen => T::regs().sqr1().modify(|w| w.set_sq(15, channel.channel())), | 211 | Sequence::Sixteen => T::regs().sqr1().modify(|w| w.set_sq(3, channel.channel())), |
| 212 | }; | 212 | }; |
| 213 | 213 | ||
| 214 | if !was_on { | 214 | if !was_on { |
